公开(公告)号：US11908913B2

公开(公告)日：2024-02-20

申请号：US17661187

申请日：2022-04-28

申请人： Micron Technology, Inc.

发明人： Durai Vishak Nirmal Ramaswamy ,  Ramanathan Gandhi ,  Scott E. Sills

IPC分类号： H01L29/45 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78 ,  H10B12/00

CPC分类号： H01L29/45 ,  H01L29/42356 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/78642 ,  H01L29/78693 ,  H01L29/7827 ,  H10B12/05 ,  H10B12/30

摘要： A semiconductor device is disclosed. The semiconductor device includes a transistor including a source contact, a drain contact, and a channel region including an oxide semiconductor material as the channel material. At least one of the drain contact or the source contact includes a conductive material, such as ruthenium, to reduce the Schottky effects at the interface with the channel material.

公开(公告)号：US20240047573A1

公开(公告)日：2024-02-08

申请号：US18487505

申请日：2023-10-16

申请人： Infineon Technologies Austria AG

发明人： Stefan Tegen ,  Matthias Kroenke

IPC分类号： H01L29/78 ,  H01L29/40 ,  H01L29/66 ,  H01L29/423 ,  H01L29/739

CPC分类号： H01L29/7813 ,  H01L29/401 ,  H01L29/402 ,  H01L29/66734 ,  H01L29/7811 ,  H01L29/66666 ,  H01L29/4236 ,  H01L29/42356 ,  H01L29/7827 ,  H01L29/407 ,  H01L29/404 ,  H01L29/7397 ,  H01L29/66348 ,  H01L29/42368

摘要： A transistor device includes a semiconductor substrate having a first major surface, a cell field and an edge termination region laterally surrounding the cell field. The cell field includes: elongate active trenches that extend from the first major surface into the semiconductor substrate, a field plate and a gate electrode being positioned in each elongate active trench, the gate electrode being arranged above and electrically insulated from the field plate; and elongate mesas, each elongate mesa being formed between neighbouring elongate active trenches, the elongate mesas comprising a drift region, a body region on the drift region and a source region on the body region.

公开(公告)号：US11887897B2

公开(公告)日：2024-01-30

申请号：US17237628

申请日：2021-04-22

申请人： Tokyo Electron Limited

发明人： Mark I. Gardner ,  H. Jim Fulford

IPC分类号： H01L21/8238 ,  H01L27/092 ,  H01L29/66 ,  H01L29/78 ,  H01L29/786 ,  H01L29/417 ,  H01L21/822 ,  H01L29/06

CPC分类号： H01L21/823885 ,  H01L21/823871 ,  H01L27/0922 ,  H01L29/41741 ,  H01L29/66545 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/7828 ,  H01L29/78642 ,  H01L21/8221 ,  H01L29/0657

摘要： Aspects of the present disclosure provide a method of fabricating a semiconductor device. For example, the method can include providing a substrate. The substrate can include a first type region and a second type region. The method can also include forming a multilayer stack on the substrate. The multilayer stack can include alternate metal layers and dielectric layers. The method can also include forming first and second openings through the multilayer stack to uncover the first and second type regions, respectively. The method can also include forming first and second vertical channel structures within the first and second openings, respectively. Each of the first and second vertical channel structures can have source, gate and drain regions being in contact with vertical sidewalls of the metal layers of the multilayer stack uncovered by a respective one of the first and second openings.

公开(公告)号：US20240030307A1

公开(公告)日：2024-01-25

申请号：US18356761

申请日：2023-07-21

申请人： NEXPERIA B.V.

发明人： Falk-Ulrich Stein

IPC分类号： H01L29/66 ,  H01L29/78 ,  H01L21/04

CPC分类号： H01L29/66068 ,  H01L29/7827 ,  H01L21/047 ,  H01L21/0465

摘要： A method of manufacturing a vertical oriented semiconductor device includes providing a semiconductor body having a top surface and a current-accommodating region of a first conductivity type, implanting free charge carriers of a second type opposite to the first type, using a mask on the top surface of the semiconductor body so that well regions, of the second type, are provided, the well regions being laterally spaced apart so that the current-accommodating region is provided there between at a particular depth in the semiconductor material, the implanting is performed under at least two acute angles relative to a surface normal of the top surface so that a W-shaped second conductivity type region is provided in the material, etching and/or grinding the semiconductor material from the top surface to the particular depth so that the W-shaped second conductivity region is divided into the well regions having the current-accommodating region therein between.

公开(公告)号：US11881512B2

公开(公告)日：2024-01-23

申请号：US17519161

申请日：2021-11-04

申请人： Infineon Technologies AG

发明人： Ralf Siemieniec ,  Thomas Aichinger ,  Romain Esteve ,  Ravi Keshav Joshi ,  Shiqin Niu

IPC分类号： H01L29/16 ,  H01L29/66 ,  H01L29/423 ,  H01L29/78

CPC分类号： H01L29/1608 ,  H01L29/4236 ,  H01L29/66068 ,  H01L29/66348 ,  H01L29/66666 ,  H01L29/7802 ,  H01L29/7813 ,  H01L29/7827 ,  H01L29/7828

摘要： A method includes providing a silicon carbide substrate, wherein a gate trench extends from a main surface of the silicon carbide substrate into the silicon carbide substrate and wherein a gate dielectric is formed on at least one sidewall of the gate trench, and forming a gate electrode in the gate trench, the gate electrode including a metal structure and a semiconductor layer between the metal structure and the gate dielectric.

公开(公告)号：US20240014322A1

公开(公告)日：2024-01-11

申请号：US18473482

申请日：2023-09-25

申请人： International Business Machines Corporation

发明人： Sung Dae Suk ,  Somnath Ghosh ,  Chen Zhang ,  Junli Wang ,  Devendra K. Sadana ,  Dechao Guo

IPC分类号： H01L29/78 ,  H01L25/07 ,  H01L29/08

CPC分类号： H01L29/785 ,  H01L29/7827 ,  H01L25/074 ,  H01L29/0847

摘要： A semiconductor device fabrication method is provided. The semiconductor device fabrication method includes frontside semiconductor device processing on a frontside of a wafer, flipping the wafer, backside semiconductor device processing on a backside of the wafer and backside and frontside contact formation processing on the backside and frontside of the wafer, respectively.

公开(公告)号：US20240014258A1

公开(公告)日：2024-01-11

申请号：US18472704

申请日：2023-09-22

申请人： ROHM CO., LTD.

发明人： Yuki NAKANO ,  Ryota NAKAMURA

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/78 ,  H01L29/423 ,  H01L29/66 ,  H01L29/16 ,  H01L27/088 ,  H01L21/04 ,  H01L29/04

CPC分类号： H01L29/063 ,  H01L29/1037 ,  H01L29/7827 ,  H01L29/4236 ,  H01L29/0623 ,  H01L29/1095 ,  H01L29/7813 ,  H01L29/66068 ,  H01L29/0696 ,  H01L29/1608 ,  H01L27/088 ,  H01L29/0607 ,  H01L29/66666 ,  H01L21/046 ,  H01L29/045 ,  H01L29/7811 ,  H01L29/0878

摘要： A semiconductor device includes a semiconductor layer made of a wide bandgap semiconductor and including a gate trench; a gate insulating film formed on the gate trench; and a gate electrode embedded in the gate trench to be opposed to the semiconductor layer through the gate insulating film. The semiconductor layer includes a first conductivity type source region; a second conductivity type body region; a first conductivity type drift region; a second conductivity type first breakdown voltage holding region; a source trench passing through the first conductivity type source region and the second conductivity type body region from the front surface and reaching a drain region; and a second conductivity type second breakdown voltage region selectively formed on an edge portion of the source trench where the sidewall and the bottom wall thereof intersect with each other in a parallel region of the source trench.

公开(公告)号：US11869970B2

公开(公告)日：2024-01-09

申请号：US17470626

申请日：2021-09-09

申请人： KABUSHIKI KAISHA TOSHIBA ,  TOSHIBA ELECTRONIC DEVICES & STORAGE CORPORATION

发明人： Kohei Oasa

IPC分类号： H01L29/78 ,  H01L27/06 ,  H01L29/66 ,  H01L29/423

CPC分类号： H01L29/7827 ,  H01L27/0629 ,  H01L29/4236 ,  H01L29/66666

摘要： A semiconductor device includes an upper electrode; a lower electrode; a substrate positioned between the upper electrode and the lower electrode; a buried electrode part positioned between the substrate and the upper electrode, the buried electrode part including a gate electrode; and a silicon layer positioned between the substrate and the upper electrode. The silicon layer includes a mesa part next to the buried electrode part, a first region positioned between the mesa part and the substrate, and a second region positioned between the buried electrode part and the substrate. An energy level density of the first region is greater than an energy level density of the second region.

公开(公告)号：US11862676B2

公开(公告)日：2024-01-02

申请号：US17925806

申请日：2020-12-28

申请人： CHINA RESOURCES MICROELECTRONICS (CHONGQING) CO., LTD.

发明人： Dong Fang ,  Kui Xiao ,  Zheng Bian ,  Jinjie Hu

IPC分类号： H01L29/06 ,  H01L29/10 ,  H01L29/40 ,  H01L29/66 ,  H01L29/78 ,  H01L29/739 ,  H01L21/8234

CPC分类号： H01L29/063 ,  H01L21/823487 ,  H01L29/1095 ,  H01L29/401 ,  H01L29/407 ,  H01L29/66333 ,  H01L29/66348 ,  H01L29/7397 ,  H01L29/7813 ,  H01L29/7827

摘要： A semiconductor device comprises a drift region (100), a body region (110), a first doped region (111) and a second doped region (112)); a first trench penetrates the first doped region (111), the body region (110) extends into the drift region (100); an extension region (150) having an opposite conductivity type to the drift region (100) and surrounding the bottom wall of the first trench; where the first trench is filled with a first conductive structure (141) and a second conductive structure (142); a dielectric layer (130) formed between the second conductive structure (142) and the inner wall of the first trench, as well as between the first conductive structure (141) and the inner wall of the first trench; a second trench penetrating the first doped region (111) and the body region (110), and a dielectric layer (130) located between the third conductive structure (143) and the second trench (122).

公开(公告)号：US11830945B2

公开(公告)日：2023-11-28

申请号：US17699898

申请日：2022-03-21

申请人： Kabushiki Kaisha Toshiba ,  Toshiba Electronic Devices & Storage Corporation

发明人： Kentaro Ichinoseki ,  Tatsuya Nishiwaki ,  Shingo Sato

IPC分类号： H01L29/78 ,  H01L21/225 ,  H01L29/06 ,  H01L29/08 ,  H01L29/66 ,  H01L29/423 ,  H01L29/40

CPC分类号： H01L29/7827 ,  H01L21/2253 ,  H01L29/0634 ,  H01L29/0878 ,  H01L29/407 ,  H01L29/4238 ,  H01L29/42368 ,  H01L29/66666 ,  H01L29/7813

摘要： According to one embodiment, a semiconductor device includes a first electrode, a first semiconductor region of a first conductivity type, a second electrode, a gate electrode, second semiconductor regions of a second conductivity type, third semiconductor regions of the first conductivity type, and a third electrode. The second electrode is provided in a plurality in second and third directions. Each second electrode opposes a portion of the first semiconductor region in the second and third directions with an insulating layer interposed. The gate electrode is provided around each second electrode. The first semiconductor region includes first regions provided respectively around the second electrodes and the second region provided around the first regions in the second and third directions. Impurity concentration of the first conductivity type in each of the first regions is higher than impurity concentration of the first conductivity type in the second region.