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    NON-VOLATILE STORAGE ELEMENT HAVING DUAL WORK-FUNCTION ELECTRODES
    41.
    发明申请
    NON-VOLATILE STORAGE ELEMENT HAVING DUAL WORK-FUNCTION ELECTRODES 有权
    具有双功能电极的非易失性存储元件

    公开(公告)号：US20120146124A1

    公开(公告)日：2012-06-14

    申请号：US12967436

    申请日：2010-12-14

    申请人： Walid M. Hafez ,  Anisur Rahman

    发明人： Walid M. Hafez ,  Anisur Rahman

    IPC分类号： H01L29/788 ,  H01L21/28

    CPC分类号： H01L29/792 ,  G11C16/0466 ,  H01L21/28282 ,  H01L28/40 ,  H01L29/4234 ,  H01L29/513 ,  H01L45/00

    摘要： A non-volatile storage element and a method of forming the storage element. The non-volatile storage element comprises: a first electrode including a first material having a first work function; a second electrode including a second material having a second work function higher than the first work function; a first dielectric disposed between the first electrode and the second electrode, the first dielectric having a first bandgap; a second dielectric disposed between the first dielectric and the second electrode, the second dielectric having a second bandgap wider than the first bandgap and being disposed such that a quantum well is created in the first dielectric; and a third dielectric disposed between the first electrode and the first dielectric, the third dielectric being thinner than the second dielectric and having a third bandgap wider than the first bandgap.

    摘要翻译： 非易失性存储元件和形成存储元件的方法。 非易失性存储元件包括：第一电极，其包括具有第一功函数的第一材料; 第二电极，包括具有高于第一功函数的第二功函数的第二材料; 设置在所述第一电极和所述第二电极之间的第一电介质，所述第一电介质具有第一带隙; 设置在所述第一电介质和所述第二电极之间的第二电介质，所述第二电介质具有比所述第一带隙宽的第二带隙，并且被布置为使得在所述第一电介质中产生量子阱; 以及设置在所述第一电极和所述第一电介质之间的第三电介质，所述第三电介质比所述第二电介质薄，并且具有比所述第一带隙宽的第三带隙。

    Transistor or triode structure with tunneling effect and insulating nanochannel
    42.
    发明授权
    Transistor or triode structure with tunneling effect and insulating nanochannel 有权
    具有隧道效应和绝缘纳米通道的晶体管或三极管结构

    公开(公告)号：US08173992B2

    公开(公告)日：2012-05-08

    申请号：US11672342

    申请日：2007-02-07

    申请人： Thomas Skotnicki ,  Stephane Monfray

    发明人： Thomas Skotnicki ,  Stephane Monfray

    IPC分类号： H01L29/06

    CPC分类号： H01L45/00 ,  B82Y10/00 ,  H01L29/7613

    摘要： A microelectronic device is provided with at least one transistor or triode with Fowler-Nordheim tunneling current modulation, and supported on a substrate. The triode or the transistor includes at least one first block forming a cathode and at least one second block forming an anode. The first block and the second block are supported on the substrate, and are separated from each other by a channel insulating zone also supported on the substrate. A gate dielectric zone is supported on at least the channel insulating zone, and a gate is supported on the gate dielectric zone.

    摘要翻译： 微电子器件设置有至少一个具有Fowler-Nordheim隧道电流调制的晶体管或三极管，并被支撑在衬底上。 三极管或晶体管包括形成阴极的至少一个第一块和形成阳极的至少一个第二块。 第一块和第二块被支撑在基板上，并且通过也支撑在基板上的沟道绝缘区彼此分离。 栅介质区域至少被支撑在沟道绝缘区上，并且栅极被支撑在栅介质区上。

    Memory Devices, Memory Device Constructions, Constructions, Memory Device Forming Methods, Current Conducting Devices, and Memory Cell Programming Methods
    44.
    发明申请
    Memory Devices, Memory Device Constructions, Constructions, Memory Device Forming Methods, Current Conducting Devices, and Memory Cell Programming Methods 有权
    存储器件，存储器件结构，构造，存储器件形成方法，电流传导器件和存储器单元编程方法

    公开(公告)号：US20120056151A1

    公开(公告)日：2012-03-08

    申请号：US13292932

    申请日：2011-11-09

    申请人： Chandra Mouli

    发明人： Chandra Mouli

    IPC分类号： H01L29/15

    CPC分类号： H01L27/2418 ,  G11C5/02 ,  G11C11/34 ,  G11C11/39 ,  G11C11/4026 ,  G11C11/5664 ,  G11C11/5678 ,  G11C11/5685 ,  G11C13/0002 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0014 ,  G11C13/0016 ,  G11C13/003 ,  G11C2013/009 ,  G11C2213/72 ,  G11C2213/74 ,  G11C2213/76 ,  G11C2216/08 ,  H01L29/6609 ,  H01L45/00 ,  H01L45/141 ,  H01L45/145 ,  H01L45/16

    摘要： Some embodiments include memory devices having a wordline, a bitline, a memory element selectively configurable in one of three or more different resistive states, and a diode configured to allow a current to flow from the wordline through the memory element to the bitline responsive to a voltage being applied across the wordline and the bitline and to decrease the current if the voltage is increased or decreased. Some embodiments include memory devices having a wordline, a bitline, memory element selectively configurable in one of two or more different resistive states, a first diode configured to inhibit a first current from flowing from the bitline to the wordline responsive to a first voltage, and a second diode comprising a dielectric material and configured to allow a second current to flow from the wordline to the bitline responsive to a second voltage.

    摘要翻译： 一些实施例包括具有字线，位线，可选择性地以三种或更多种不同电阻状态中的一种状态配置的存储器元件的存储器件，以及被配置为允许电流从字线通过存储器元件流过到位线的二极管， 电压施加在字线和位线之间，并且如果电压增加或减小则降低电流。 一些实施例包括具有字线，位线，可选择性地以两种或多种不同电阻状态之一配置的存储器元件的存储器件，被配置为阻止第一电流响应于第一电压从位线流向字线的第一二极管，以及 第二二极管，包括电介质材料，并被配置为响应于第二电压允许第二电流从字线流到位线。

    High-performance diode device structure and materials used for the same
    45.
    发明授权
    High-performance diode device structure and materials used for the same 有权
    高性能二极管器件的结构和材料使用相同

    公开(公告)号：US08120134B2

    公开(公告)日：2012-02-21

    申请号：US12580013

    申请日：2009-10-15

    申请人： Gurtej Sandhu ,  Bhaskar Srinivasan

    发明人： Gurtej Sandhu ,  Bhaskar Srinivasan

    IPC分类号： H01L31/058 ,  H01L29/06

    CPC分类号： H01L29/24 ,  H01L27/24 ,  H01L45/00

    摘要： A diode and memory device including the diode, where the diode includes a conductive portion and another portion formed of a first material that has characteristics allowing a first decrease in a resistivity of the material upon application of a voltage to the material, thereby allowing current to flow there through, and has further characteristics allowing a second decrease in the resistivity of the first material in response to an increase in temperature of the first material.

    摘要翻译： 包括二极管的二极管和存储器件，其中二极管包括导电部分和由第一材料形成的另一部分，该第一材料具有允许在向材料施加电压时第一次降低材料的电阻率的特性，从而允许电流 流过其中，并且具有允许第一材料的电阻率响应于第一材料的温度升高而第二次降低的特征。

    Method of forming metal ion transistor
    47.
    发明授权
    Method of forming metal ion transistor 失效
    形成金属离子晶体管的方法

    公开(公告)号：US07998828B2

    公开(公告)日：2011-08-16

    申请号：US12725817

    申请日：2010-03-17

    申请人： Fen Chen ,  Armin Fischer

    发明人： Fen Chen ,  Armin Fischer

    IPC分类号： H01L21/34 ,  H01L29/12 ,  H01L27/148 ,  H01L51/40 ,  H01L21/335 ,  H01L21/8232 ,  H01L21/339 ,  H01L21/00 ,  H01L21/84 ,  H01L21/76 ,  H01L21/20 ,  H01L21/36

    CPC分类号： H01L45/00

    摘要： A method of forming a metal ion transistor comprises forming a first electrode in a first isolation layer; forming a second isolation layer over the first isolation layer; forming a first cell region of a low dielectric constant (low-k) dielectric over the first electrode in the second isolation layer, the first cell region isolated from the second isolation layer; forming a cap layer over the second isolation layer and the first cell region, at least thinning the cap layer over the first cell region; depositing a layer of the low-k dielectric over the second isolation layer and the first cell region; forming metal ions in the low-k dielectric layer; patterning the low-k dielectric layer to form a second cell region; sealing the second cell region using a liner; and forming a second electrode contacting the second cell region and a third electrode contacting the second cell region.

    摘要翻译： 一种形成金属离子晶体管的方法包括在第一隔离层中形成第一电极; 在所述第一隔离层上形成第二隔离层; 在所述第二隔离层中的所述第一电极上形成低介电常数（低k）电介质的第一电池区，所述第一电池区与所述第二隔离层隔离; 在所述第二隔离层和所述第一单元区域上形成盖层，至少使所述盖层在所述第一单元区域上变薄; 在所述第二隔离层和所述第一单元区域上沉积所述低k电介质层; 在低k电介质层中形成金属离子; 图案化低k电介质层以形成第二电池区; 使用衬垫密封第二电池区域; 以及形成与第二单元区域接触的第二电极和与第二单元区域接触的第三电极。

    Diodes, and Methods of Forming Diodes
    48.
    发明申请
    Diodes, and Methods of Forming Diodes 有权
    二极管和形成二极管的方法

    公开(公告)号：US20110068325A1

    公开(公告)日：2011-03-24

    申请号：US12953776

    申请日：2010-11-24

    申请人： Gurtej S. Sandhu ,  Chandra Mouli

    发明人： Gurtej S. Sandhu ,  Chandra Mouli

    IPC分类号： H01L29/88 ,  H01L21/28

    CPC分类号： H01L29/66151 ,  B82Y10/00 ,  H01L21/28 ,  H01L21/283 ,  H01L28/90 ,  H01L29/0665 ,  H01L29/0673 ,  H01L29/0676 ,  H01L29/068 ,  H01L29/08 ,  H01L29/417 ,  H01L29/66143 ,  H01L29/872 ,  H01L29/88 ,  H01L45/00

    摘要： Some embodiments include methods of forming diodes in which a first electrode is formed to have a pedestal extending upwardly from a base. At least one layer is deposited along an undulating topography that extends across the pedestal and base, and a second electrode is formed over the least one layer. The first electrode, at least one layer, and second electrode together form a structure that conducts current between the first and second electrodes when voltage of one polarity is applied to the structure, and that inhibits current flow between the first and second electrodes when voltage having a polarity opposite to said one polarity is applied to the structure. Some embodiments include diodes having a first electrode that contains two or more projections extending upwardly from a base, having at least one layer over the first electrode, and having a second electrode over the at least one layer.

    摘要翻译： 一些实施例包括形成二极管的方法，其中第一电极形成为具有从基部向上延伸的基座。 沿着延伸穿过基座和基底的波状形貌沉积至少一层，并且在最少一层上形成第二电极。 第一电极，至少一层和第二电极一起形成当一个极性的电压施加到结构时在第一和第二电极之间传导电流的结构，并且当电压具有 与所述一个极性相反的极性被施加到该结构。 一些实施例包括具有第一电极的二极管，该第一电极包含从基底向上延伸的两个或更多个突起，在第一电极上具有至少一个层，并且在该至少一个层上具有第二电极。

    GEOMETRIC DIODE, APPLICATIONS AND METHOD
    49.
    发明申请
    GEOMETRIC DIODE, APPLICATIONS AND METHOD 有权
    几何二极管，应用和方法

    公开(公告)号：US20110017284A1

    公开(公告)日：2011-01-27

    申请号：US12935099

    申请日：2009-07-17

    申请人： Garret Moddel

    发明人： Garret Moddel

    IPC分类号： H01L31/02 ,  H01L29/861

    CPC分类号： H01L45/00 ,  H01L31/08 ,  H02S10/30 ,  H02S99/00

    摘要： A geometric diode, method and device applications are described. The geometric diode is produced including a device body formed from an electrically conductive material having an equilibrium mobile charge density, and having a device surface configuration. The material has a charge carrier mean free path with a mean free path length and the device body size is selected based on said the free path length to serve as an electrically conductive path between first and second electrodes delimited by the device surface configuration that is asymmetric with respect to a forward flow of current in a forward direction from the first electrode to the second electrode as compared to a reverse current flow in an reverse direction from the second electrode to the first electrode. A system includes an antenna for receiving electromagnetic radiation coupled with the geometric diode antenna to receive the electromagnetic radiation to produce an electrical response.

    摘要翻译： 描述了几何二极管，方法和设备应用。 制造几何二极管，其包括由具有平衡的移动电荷密度的导电材料形成并具有器件表面构造的器件本体。 该材料具有电荷载体平均自由路径，平均自由路径长度，并且基于所述自由路径长度来选择装置体尺寸，以用作由不对称的装置表面构型限定的第一和第二电极之间的导电路径 与从第二电极到第一电极的相反方向的反向电流相对于从第一电极到第二电极的向前方向的电流的正向流动。 系统包括用于接收与几何二极管天线耦合的电磁辐射以接收电磁辐射以产生电响应的天线。

    METHOD OF PROTECTING AND DISSIPATING ELECTROSTATIC DISCHARGES IN AN INTEGRATED CIRCUIT
    50.
    发明申请
    METHOD OF PROTECTING AND DISSIPATING ELECTROSTATIC DISCHARGES IN AN INTEGRATED CIRCUIT 审中-公开
    在集成电路中保护和消除静电放电的方法

    公开(公告)号：US20100097735A1

    公开(公告)日：2010-04-22

    申请号：US12551853

    申请日：2009-09-01

    申请人： Jean-François NODIN

    发明人： Jean-François NODIN

    IPC分类号： H02H9/00

    CPC分类号： H01L27/0248 ,  H01L45/00

    摘要： A device for protecting at least one integrated circuit against an electrostatic discharge, comprising at least: a portion of ionisable metal, a solid electrolyte arranged against the portion of ionisable metal and comprising metal ions of nature similar to the metal of said portion of ionisable metal, an electrode electrically connected to the solid electrolyte, and in which the concentration of metal ions in the solid electrolyte is less than the saturation concentration of metal ions in the solid electrolyte.

    摘要翻译： 一种用于保护至少一个集成电路抵抗静电放电的装置，至少包括：一部分可电离金属，固定电解质，其布置成抵靠该可电离金属的部分，并且包含与所述可电离金属部分的金属类似的金属离子 与固体电解质电连接的电极，固体电解质中的金属离子的浓度小于固体电解质中的金属离子的饱和浓度。