公开(公告)号：US09357635B2

公开(公告)日：2016-05-31

申请号：US14981056

申请日：2015-12-28

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics S.r.l. ,  STMicroelectronics Asia Pacific Pte Ltd

Inventor： Simon Dodd ,  Joe Scheffelin ,  Dana Gruenbacher ,  Roberto Brioschi ,  Teck Khim Neo ,  Dave Hunt ,  Faiz Sherman

IPC: B41J2/14 ,  B41J2/175 ,  B05B1/14 ,  B32B38/04 ,  B32B38/14 ,  B32B37/00 ,  H05K1/02 ,  H05K1/09 ,  H05K3/30

CPC classification number: B41J2/1623 ,  B05B1/14 ,  B05B11/0054 ,  B05B15/40 ,  B41J2/14024 ,  B41J2/14145 ,  B41J2/1433 ,  B41J2/162 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L41/1132 ,  H01L2224/2732 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48096 ,  H01L2224/48097 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/19106 ,  H05K1/0272 ,  H05K1/09 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10083 ,  H05K2201/10515 ,  H05K2201/10545 ,  Y02P70/613 ,  Y10T156/1089 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Embodiments are directed to microfluidic refill cartridges and methods of assembling same. The microfluidic refill cartridges include a microfluidic delivery member that includes a filter for filtering fluid passed therethrough. The filter may be configured to block particles above a threshold size to prevent blockage in the nozzles. For instances, particles having a dimension that is larger than the diameter of the nozzles can block or reduce fluid flow through the nozzle.

Abstract translation: 实施例涉及微流体补充盒及其组装方法。 微流体补充盒包括微流体递送构件，其包括用于过滤通过其中的流体的过滤器。 过滤器可以被配置为阻挡高于阈值尺寸的颗粒以防止喷嘴中的堵塞。 例如，具有大于喷嘴直径的尺寸的颗粒可阻挡或减少通过喷嘴的流体流动。

公开(公告)号：US20160149500A1

公开(公告)日：2016-05-26

申请号：US15011854

申请日：2016-02-01

Applicant: STMicroelectronics, Inc.

Inventor： Thomas Stamm

IPC: H02M3/335 ,  H05B33/08 ,  H02M1/42

CPC classification number: H02M3/33515 ,  H02M1/42 ,  H02M7/217 ,  H05B33/0815 ,  Y02B20/347

Abstract: A fly-back type switched current regulator includes a primary transformer winding coupled to receive a rectified DC signal derived from an AC signal. The drain of a power transistor is coupled to the primary winding, with the source of the power transistor coupled to an input of a comparison circuit and a primary transformer winding sense resistor. A control terminal of the power transistor is coupled to an output of the comparison circuit. A capacitor stores a variable reference signal for application at a first capacitor terminal to another input of the differential circuit. The variable reference signal is compared to a winding current signal generated by the sense resistor by the comparison circuit. An injection circuit applies an AC signal derived from the rectified DC signal to a second terminal of the capacitor so as to modulate the stored variable reference signal. The regulator is coupled to drive LEDs.

Abstract translation: 回扫式开关电流调节器包括耦合以接收从AC信号导出的整流DC信号的初级变压器绕组。 功率晶体管的漏极耦合到初级绕组，功率晶体管的源极耦合到比较电路的输入端和初级变压器绕组检测电阻器。 功率晶体管的控制端耦合到比较电路的输出端。 电容器存储用于在第一电容器端子处施加到差分电路的另一输入端的可变参考信号。 可变参考信号与由比较电路由检测电阻器产生的绕组电流信号进行比较。 注入电路将从整流后的直流信号得到的交流信号施加到电容器的第二端，以便调制存储的可变参考信号。 调节器耦合到驱动LED。

公开(公告)号：US20160149051A1

公开(公告)日：2016-05-26

申请号：US14983276

申请日：2015-12-29

Applicant: STMicroelectronics, Inc.

Inventor： John H. Zhang

IPC: H01L29/786 ,  H01L29/66 ,  H01L29/423 ,  H01L29/12 ,  H01L29/06

CPC classification number: H01L29/78618 ,  H01L21/823814 ,  H01L21/823828 ,  H01L21/823842 ,  H01L27/092 ,  H01L29/0653 ,  H01L29/127 ,  H01L29/165 ,  H01L29/401 ,  H01L29/413 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/42392 ,  H01L29/456 ,  H01L29/4975 ,  H01L29/66431 ,  H01L29/66621 ,  H01L29/66636 ,  H01L29/66666 ,  H01L29/775 ,  H01L29/7781 ,  H01L29/78696

Abstract: Metal quantum dots are incorporated into doped source and drain regions of a MOSFET array to assist in controlling transistor performance by altering the energy gap of the semiconductor crystal. In a first example, the quantum dots are incorporated into ion-doped source and drain regions. In a second example, the quantum dots are incorporated into epitaxially doped source and drain regions.

Abstract translation: 金属量子点被并入到MOSFET阵列的掺杂源极和漏极区域中，以通过改变半导体晶体的能隙来帮助控制晶体管的性能。 在第一示例中，量子点被并入到离子掺杂的源极和漏极区域中。 在第二个例子中，量子点被并入外延掺杂的源区和漏区。

公开(公告)号：US09340023B2

公开(公告)日：2016-05-17

申请号：US13906447

申请日：2013-05-31

Applicant: STMICROELECTRONICS, INC.

Inventor： Paul I. Mikulan ,  Kenneth J. Stewart ,  Virgina L. Hwang

IPC: B41J2/16

CPC classification number: B41J2/1603 ,  B41J2/1601 ,  B41J2/1628 ,  B41J2/1629 ,  B41J2/1631 ,  B41J2/1635 ,  B41J2/1637 ,  B41J2/1639 ,  Y10T29/49083 ,  Y10T29/49087 ,  Y10T29/49401

Abstract: A method of making inkjet print heads may include forming a first wafer including a sacrificial substrate layer, and a first dielectric layer thereon having first openings therein defining inkjet orifices. The method may also include forming a second wafer having inkjet chambers defined thereon, and joining the first and second wafers together so that each inkjet orifice is aligned with a respective inkjet chamber. The method may further include removing the sacrificial substrate layer thereby defining the inkjet print heads.

Abstract translation: 制造喷墨打印头的方法可以包括形成包括牺牲基底层的第一晶片和其上具有限定喷墨孔的第一开口的第一介电层。 该方法还可以包括形成具有限定在其上的喷墨室的第二晶片，并且将第一和第二晶片接合在一起，使得每个喷墨孔与相应的喷墨室对准。 该方法还可以包括去除牺牲衬底层从而限定喷墨打印头。

公开(公告)号：US09337087B1

公开(公告)日：2016-05-10

申请号：US14586688

申请日：2014-12-30

Applicant: STMicroelectronics, Inc. ,  International Business Machines Corporation

Inventor： John H. Zhang ,  Lawrence A. Clevenger ,  Carl Radens ,  Yiheng Xu ,  Byoung Youp Kim ,  Walter Kleemeier

IPC: H01L21/4763 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/562 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76897 ,  H01L22/12 ,  H01L22/14 ,  H01L22/32 ,  H01L23/5223 ,  H01L23/5226 ,  H01L23/5227 ,  H01L23/5228 ,  H01L23/528 ,  H01L23/53266 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Various embodiments facilitate die protection for an integrated circuit. In one embodiment, a multilayer structure is formed in multiple levels and along the edges of a die to prevent and detect damages to the die. The multilayer structure includes a support layer, a first plurality of dielectric pillars overlying the support layer, a metal layer that fills spaces between the first plurality of dielectric pillars, an insulation layer overlying the first plurality of dielectric pillars and the metal layer, a second plurality of dielectric pillars overlying the insulation layer, and a second metal layer that fills spaces between the second plurality of dielectric pillars.

Abstract translation: 各种实施例便于集成电路的管芯保护。 在一个实施例中，多层结构形成在多个层次上并沿着模具的边缘，以防止和检测对模具的损坏。 所述多层结构包括支撑层，覆盖所述支撑层的第一多个介电柱，填充所述第一多个介电柱之间的空间的金属层，覆盖所述第一多个介电柱和所述金属层的绝缘层，第二 覆盖绝缘层的多个介电柱，以及填充第二多个介电柱之间的空间的第二金属层。

公开(公告)号：US20160119153A1

公开(公告)日：2016-04-28

申请号：US14984997

申请日：2015-12-30

Applicant: STMicroelectronics, Inc.

Inventor： Oleg Logvinov

IPC: H04L12/10 ,  H04L12/28

CPC classification number: H04L12/10 ,  G06F1/3209 ,  G06F1/3287 ,  H04B3/542 ,  H04L12/2838 ,  H04L2012/2843 ,  Y02D10/171

Abstract: An embodiment is an integrated System on Chip (SoC) including a communication interface configured to implement a communication protocol including functional blocks that are energized or de-energized individually so that a minimum power consumption is used to receive and detect a signal, and a receiver identification (ID) detection function configured to determine whether the signal is intended for the device in which the SoC resides. The SoC further includes a power management function configured to control which functions in the SoC and/or device in which the SoC resides are energized or de-energized depending on the results of the receiver ID detection function, and a power source capable of energizing a minimum number of the functional blocks required to receive and detect a signal, wherein the power source can be used in a low power state and switched over to a main power supply when the SoC is energized.

公开(公告)号：US20160118305A1

公开(公告)日：2016-04-28

申请号：US14942504

申请日：2015-11-16

Applicant: STMicroelectronics, Inc.

Inventor： Walter Kleemeier ,  Qing Liu

IPC: H01L21/8238 ,  H01L29/78 ,  H01L21/84 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L21/823814 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02584 ,  H01L21/8238 ,  H01L21/823821 ,  H01L21/823871 ,  H01L21/84 ,  H01L27/092 ,  H01L27/0924 ,  H01L27/1203 ,  H01L27/1211 ,  H01L29/45 ,  H01L29/456 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/66628 ,  H01L29/778 ,  H01L29/7789 ,  H01L29/7838

Abstract: An integrated circuit includes a substrate supporting a transistor having a source region and a drain region. A high dopant concentration delta-doped layer is present on the source region and drain region of the transistor. A set of contacts extend through a pre-metal dielectric layer covering the transistor. A silicide region is provided at a bottom of the set of contacts. The silicide region is formed by a salicidation reaction between a metal present at the bottom of the contact and the high dopant concentration delta-doped layer on the source region and drain region of the transistor.

Abstract translation: 集成电路包括支撑具有源极区和漏极区的晶体管的衬底。 晶体管的源极区和漏极区存在高掺杂浓度的δ掺杂层。 一组触点延伸穿过覆盖晶体管的预金属介电层。 硅化物区域设置在该组触点的底部。 硅化物区域由接触底部存在的金属与晶体管的源极区域和漏极区域上的高掺杂浓度δ-掺杂层之间的水化反应形成。

公开(公告)号：US09323633B2

公开(公告)日：2016-04-26

申请号：US13852223

申请日：2013-03-28

Applicant: STMICROELECTRONICS, INC.

Inventor： Marco Brambilla ,  Ulderic Lacour ,  Cecilia Ozdemir

IPC: G06F11/00 ,  G06F11/25 ,  G01R31/3177 ,  G06F11/267

CPC classification number: G06F11/267

Abstract: A dual-master controller includes a plurality of JTAG data registers including a controller-mode register that stores information indicating a standard JTAG or a processor-controlled mode of operation. A JTAG TAP controller receives control signals over a standard test access port and a processor controller receives processor control signals over an external processor bus. A selection multiplexer outputs either signals on the standard JTAG access port or the external processor bus responsive to a JTAG mode selection signal. A logic circuit activates the JTAG mode selection signal responsive to the force JTAG signal being active or information in the controller-mode register indicating the standard JTAG mode, and deactivates the JTAG mode selection signal responsive to the force JTAG signal being deactivated or the information in the controller-mode register indicating the processor-controller mode. An instruction decoder and multiplexer circuit applies control signals from the selection multiplexer to control the JTAG data registers.

Abstract translation: 双主控制器包括多个JTAG数据寄存器，包括存储指示标准JTAG或处理器控制的操作模式的信息的控制器模式寄存器。 JTAG TAP控制器通过标准测试访问端口接收控制信号，处理器控制器通过外部处理器总线接收处理器控制信号。 响应于JTAG模式选择信号，选择多路复用器输出标准JTAG访问端口或外部处理器总线上的信号。 逻辑电路响应于JTAG信号被激活或控制器模式寄存器中指示标准JTAG模式的信息激活JTAG模式选择信号，并且响应于JTAG信号被去激活而停用JTAG模式选择信号 控制器模式寄存器指示处理器 - 控制器模式。 指令解码器和多路复用器电路从选择多路复用器施加控制信号以控制JTAG数据寄存器。

公开(公告)号：US20160107446A1

公开(公告)日：2016-04-21

申请号：US14981056

申请日：2015-12-28

Applicant: STMicroelectronics, Inc. ,  STMicroelectronics S.r.l. ,  STMicroelectronics Asia Pacific Pte Ltd

Inventor： Simon Dodd ,  Joe Scheffelin ,  Dana Gruenbacher ,  Roberto Brioschi ,  Teck Khim Neo ,  Dave Hunt ,  Faiz Sherman

IPC: B41J2/16

CPC classification number: B41J2/1623 ,  B05B1/14 ,  B05B11/0054 ,  B05B15/40 ,  B41J2/14024 ,  B41J2/14145 ,  B41J2/1433 ,  B41J2/162 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/48 ,  H01L24/83 ,  H01L24/85 ,  H01L24/97 ,  H01L41/1132 ,  H01L2224/2732 ,  H01L2224/29011 ,  H01L2224/29013 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/48096 ,  H01L2224/48097 ,  H01L2224/48106 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83192 ,  H01L2224/838 ,  H01L2224/83862 ,  H01L2224/83874 ,  H01L2224/92247 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/19106 ,  H05K1/0272 ,  H05K1/09 ,  H05K1/181 ,  H05K3/305 ,  H05K2201/10083 ,  H05K2201/10515 ,  H05K2201/10545 ,  Y02P70/613 ,  Y10T156/1089 ,  H01L2224/83 ,  H01L2224/85 ,  H01L2224/45099 ,  H01L2924/00

Abstract: Embodiments are directed to microfluidic refill cartridges and methods of assembling same. The microfluidic refill cartridges include a microfluidic delivery member that includes a filter for filtering fluid passed therethrough. The filter may be configured to block particles above a threshold size to prevent blockage in the nozzles. For instances, particles having a dimension that is larger than the diameter of the nozzles can block or reduce fluid flow through the nozzle.

公开(公告)号：US20160107443A1

公开(公告)日：2016-04-21

申请号：US14976434

申请日：2015-12-21

Applicant: STMicroelectronics, Inc. ,  STMICROELECTRONICS S.R.L. ,  STMicroelectronics International N.V.

Inventor： Simon Dodd ,  Joe Scheffelin ,  Dave Hunt ,  Matt Giere ,  Dana GRUENBACHER ,  Faiz SHERMAN

IPC: B41J2/14

CPC classification number: B05B17/0607 ,  B05B17/0638 ,  B05B17/0684 ,  B41J2/14016 ,  B41J2/14024 ,  B41J2/14056 ,  B41J2/14072 ,  B41J2/1433 ,  B41J2/1601 ,  B41J2/1632 ,  B41J2/175 ,  B41J2/17526 ,  B41J2/1753 ,  B41J2002/14338 ,  B41J2002/14491 ,  H05K1/0212 ,  H05K1/111 ,  H05K1/181 ,  Y10T29/49119

Abstract: The present disclosure is directed to a microfluidic die that includes a plurality of heaters above a substrate, a plurality of chambers and nozzles above the heaters, a plurality of first contacts coupled to the heaters, and a plurality of second contacts coupled to the heaters. The plurality of second contacts are coupled to each other and coupled to ground. The die includes a plurality of contact pads, a first signal line coupled to the plurality of second contacts and to a first one of the plurality of contact pads, and a plurality of second signal lines, each second signal line being coupled to one of the plurality of first contacts, groups of the second signal lines being coupled together to drive a group of the plurality of heaters with a single signal, each group of the second signal lines being coupled to a remaining one of the plurality of contact pads.