中科微点-全球专利检索

  1. Login
  2. Sign Up

Search Results

184 records (took 0.025 seconds)

    Pattern suppression in logic for wafer inspection
    52.
    发明授权
    Pattern suppression in logic for wafer inspection 有权
    晶圆检查逻辑中的图案抑制

    公开(公告)号：US09506873B2

    公开(公告)日：2016-11-29

    申请号：US14682822

    申请日：2015-04-09

    Applicant: KLA-Tencor Corporation

    Inventor： Vaibhav Gaind ,  Nisha Amthul

    IPC: G01N21/00 ,  G01N21/95 ,  G01N21/956

    CPC classification number: G01N21/9501 ,  G01N21/956 ,  G01N2201/10

    Abstract: Methods and systems for detecting defects on a wafer are provided. One system includes an illumination subsystem configured to direct light to at least one spot on a wafer. The system also includes at least one element configured to block first portion(s) of light scattered from the at least one spot from reaching a detector while allowing second portion(s) of the light scattered from the at least one spot to be detected by the detector. The first portion(s) of the light are scattered from one or more patterned features in a logic region on the wafer. The second portion(s) of the light are not scattered from the one or more patterned features. The detector is not an imaging detector. The system further includes a computer subsystem configured to detect defects on the wafer based on output of the detector.

    Abstract translation: 提供了用于检测晶片上的缺陷的方法和系统。 一个系统包括被配置为将光引导到晶片上的至少一个点的照明子系统。 该系统还包括至少一个元件，其构造成阻挡从至少一个点散射的光的第一部分到达检测器，同时允许从至少一个点散射的光的第二部分被 检测器。 光的第一部分从晶片上的逻辑区域中的一个或多个图案特征散射。 光的第二部分不从一个或多个图案特征散射。 检测器不是成像检测器。 该系统还包括被配置为基于检测器的输出来检测晶片上的缺陷的计算机子系统。

    Generating a wafer inspection process using bit failures and virtual inspection
    53.
    发明授权
    Generating a wafer inspection process using bit failures and virtual inspection 有权
    使用位故障和虚拟检查生成晶圆检查过程

    公开(公告)号：US09277186B2

    公开(公告)日：2016-03-01

    申请号：US13743074

    申请日：2013-01-16

    Applicant: KLA-Tencor Corporation

    Inventor： Poh Boon Yong ,  George Simon ,  Yuezhong Du

    IPC: H04N7/18 ,  H01L21/66

    CPC classification number: H01L22/20 ,  G06T7/0004 ,  G06T2207/30148 ,  H01L22/12 ,  H01L22/14 ,  H01L2924/0002 ,  H04N7/18 ,  H01L2924/00

    Abstract: Methods and systems for generating a wafer inspection process are provided. One method includes storing output of detector(s) of an inspection system during scanning of a wafer regardless of whether the output corresponds to defects detected on the wafer and separating physical locations on the wafer that correspond to bit failures detected by testing of the wafer into a first portion of the physical locations at which the defects were not detected and a second portion of the physical locations at which the defects were detected. In addition, the method includes applying defect detection method(s) to the stored output corresponding to the first portion of the physical locations to detect defects at the first portion of the physical locations and generating a wafer inspection process based on the defects detected by the defect detection method(s) at the first portion of the physical locations.

    Abstract translation: 提供了用于产生晶片检查过程的方法和系统。 一种方法包括在扫描晶片期间存储检查系统的检测器的输出，而不管输出是否对应于在晶片上检测到的缺陷，并且分离晶片上的物理位置，其对应于通过晶片测试检测到的位故障 未检测到缺陷的物理位置的第一部分和检测到缺陷的物理位置的第二部分。 此外，该方法包括将缺陷检测方法应用于与物理位置的第一部分相对应的存储的输出，以检测物理位置的第一部分处的缺陷，并基于由所述物理位置检测到的缺陷产生晶片检查过程 在物理位置的第一部分处的缺陷检测方法。

    Extended defect sizing range for wafer inspection
    55.
    发明授权
    Extended defect sizing range for wafer inspection 有权
    晶圆检查扩展缺陷尺寸范围

    公开(公告)号：US09091666B2

    公开(公告)日：2015-07-28

    申请号：US13369294

    申请日：2012-02-09

    Applicant: Zhongping Cai ,  Yury Yuditsky ,  Anatoly Romanovsky ,  Alexander Slobodov

    Inventor： Zhongping Cai ,  Yury Yuditsky ,  Anatoly Romanovsky ,  Alexander Slobodov

    IPC: G01N21/88 ,  G01N21/95

    CPC classification number: G01N21/9501

    Abstract: Various embodiments for extended defect sizing range for wafer inspection are provided. One inspection system includes an illumination subsystem configured to direct light to the wafer. The system also includes an image sensor configured to detect light scattered from wafer defects and to generate output responsive to the scattered light. The image sensor is also configured to not have an anti-blooming feature such that when a pixel in the image sensor reaches full well capacity, excess charge flows from the pixel to one or more neighboring pixels in the image sensor. The system further includes a computer subsystem configured to detect the defects on the wafer using the output and to determine a size of the defects on the wafer using the output generated by a pixel and any neighboring pixels of the pixel to which the excess charge flows.

    Abstract translation: 提供了用于晶片检查的扩展缺陷尺寸范围的各种实施例。 一个检查系统包括配置成将光引导到晶片的照明子系统。 该系统还包括图像传感器，其被配置为检测从晶片缺陷散射的光并且响应于散射光产生输出。 图像传感器还被配置为不具有防喷射特征，使得当图像传感器中的像素达到满井容量时，过量电荷从图像传感器中的像素流向一个或多个相邻像素。 该系统还包括被配置为使用输出来检测晶片上的缺陷的计算机子系统，并且使用由像素和多余电荷流过的像素的任何相邻像素产生的输出来确定晶片上的缺陷的尺寸。

    Unbiased wafer defect samples
    56.
    发明授权
    Unbiased wafer defect samples 有权
    无偏置晶圆缺陷样品

    公开(公告)号：US08948494B2

    公开(公告)日：2015-02-03

    申请号：US13793709

    申请日：2013-03-11

    Applicant: KLA-Tencor Corporation

    Inventor： Martin Plihal ,  Vidyasagar Anantha ,  Saravanan Paramasivam ,  Chris W. Lee

    IPC: G06K9/00 ,  G06T7/00

    CPC classification number: G06T7/0008 ,  F04C2270/0421 ,  G06T5/50 ,  G06T7/0004 ,  G06T2207/30148

    Abstract: Methods and systems for generating unbiased wafer defect samples are provided. One method includes selecting the defects detected by each of multiple scans performed on a wafer that have the most diversity in one or more defect attributes such that a diverse set of defects are selected across each scan. In addition, the method may include selecting the defects such that any defect that is selected and is common to two or more of the scans is not selected twice and any defects that are selected are diverse with respect to the common, selected defect. Furthermore, no sampling, binning, or classifying of the defects may be performed prior to selection of the defects such that the sampled defects are unbiased by any sampling, binning, or classifying method.

    Abstract translation: 提供了用于产生无偏置晶片缺陷样品的方法和系统。 一种方法包括选择通过在一个或多个缺陷属性中具有最多分集的晶片上执行的多次扫描中检测到的缺陷，从而跨越每个扫描选择不同的缺陷集。 此外，该方法可以包括选择缺陷，使得两个或更多个扫描选择并且是共同的任何缺陷不被选择两次，并且所选择的任何缺陷相对于共同的所选择的缺陷是多种多样的。 此外，在选择缺陷之前，可以不进行采样，分类或缺陷分类，以便通过任何采样，合并或分类方法对采样缺陷进行不偏见。

    Multi-spot illumination for wafer inspection
    58.
    发明授权
    Multi-spot illumination for wafer inspection 有权
    多点照明用于晶圆检查

    公开(公告)号：US08879056B2

    公开(公告)日：2014-11-04

    申请号：US13898470

    申请日：2013-05-21

    Applicant: KLA-Tencor Corporation

    Inventor： Guoheng Zhao ,  Azmi Kadkly

    IPC: G01N21/00 ,  G01N21/95 ,  F21V5/00

    CPC classification number: F21V5/008 ,  G01N21/8806 ,  G01N21/9501 ,  G01N21/9505

    Abstract: Illumination subsystems for multi-spot wafer inspection are provided. One illumination subsystem includes a diffractive optical element configured to separate an illumination light beam into multiple light beams and a refractive lens array positioned in the path of the multiple light beams. The refractive lens array is configured to relay the laser beam waist at the diffractive optical element onto a wafer surface and to separately and simultaneously focus each of the multiple light beams to a wafer for inspection.

    Abstract translation: 提供了多点晶圆检查的照明子系统。 一个照明子系统包括被配置为将照明光束分离成多个光束的衍射光学元件和位于多个光束的路径中的折射透镜阵列。 折射透镜阵列被配置为将衍射光学元件处的激光束腰部中继到晶片表面上，并且将多个光束中的每一个分别并且同时聚焦到晶片以进行检查。

    Metrology systems and methods for high aspect ratio and large lateral dimension structures
    59.
    发明授权
    Metrology systems and methods for high aspect ratio and large lateral dimension structures 有权
    高纵横比和大横向尺寸结构的计量系统和方法

    公开(公告)号：US08860937B1

    公开(公告)日：2014-10-14

    申请号：US13743304

    申请日：2013-01-16

    Applicant: KLA-Tencor Corporation

    Inventor： Thaddeus Gerard Dziura ,  Xuefeng Liu ,  David Y. Wang ,  Jonathan Madsen ,  Alexander Kuznetsov ,  Johannes D. de Veer ,  Shankar Krishnan ,  Derrick Shaughnessy ,  Andrei Shchegrov

    IPC: G01N21/00 ,  G01N21/47

    CPC classification number: G01N21/47 ,  G01B2210/56 ,  H01L22/12 ,  H01L2924/0002 ,  H01L2924/00

    Abstract: Various metrology systems and methods for high aspect ratio and large lateral dimension structures are provided. One method includes directing light to one or more structures formed on a wafer. The light includes ultraviolet light, visible light, and infrared light. The one or more structures include at least one high aspect ratio structure or at least one large lateral dimension structure. The method also includes generating output responsive to light from the one or more structures due to the light directed to the one or more structures. In addition, the method includes determining one or more characteristics of the one or more structures using the output.

    Abstract translation: 提供了用于高纵横比和大横向尺寸结构的各种计量系统和方法。 一种方法包括将光引导到在晶片上形成的一个或多个结构。 该光包括紫外光，可见光和红外光。 一个或多个结构包括至少一个高纵横比结构或至少一个大的横向尺寸结构。 该方法还包括响应于来自一个或多个结构的光而产生输出，这是由于指向一个或多个结构的光。 另外，该方法包括使用该输出确定一个或多个结构的一个或多个特性。

    Segmentation for wafer inspection
    60.
    发明授权
    Segmentation for wafer inspection 有权
    晶圆检测分段

    公开(公告)号：US08831334B2

    公开(公告)日：2014-09-09

    申请号：US13742259

    申请日：2013-01-15

    Applicant: KLA-Tencor Corporation

    Inventor： Tao Luo ,  Yong Zhang ,  Stephanie Chen

    IPC: G06T7/00

    CPC classification number: G06T7/0002 ,  G06T7/0004 ,  G06T7/13 ,  G06T7/143 ,  G06T2207/20076 ,  G06T2207/30148

    Abstract: Methods and systems for segmenting pixels for wafer inspection are provided. One method includes determining a statistic for individual pixels based on a characteristic of the individual pixels in an image acquired for a wafer by an inspection system. The method also includes assigning the individual pixels to first segments based on the statistic. In addition, the method includes detecting one or more edges between the first segments in an image of the first segments and generating an edge map by projecting the one or more edges across an area corresponding to the image for the wafer. The method further includes assigning the individual pixels to second segments by applying the first segments and the edge map to the image for the wafer thereby segmenting the image. Defect detection is performed based on the second segments to which the individual pixels are assigned.

    Abstract translation: 提供了用于分割用于晶片检查的像素的方法和系统。 一种方法包括基于由检查系统为晶片获取的图像中的各个像素的特性来确定各个像素的统计量。 该方法还包括基于统计量将各个像素分配给第一段。 此外，该方法包括检测第一段的图像中的第一段之间的一个或多个边缘，并且通过将一个或多个边缘跨越与晶片的图像对应的区域来生成边缘图。 该方法还包括通过将第一段和边缘图应用于晶片的图像来将各个像素分配给第二段，从而分割图像。 基于分配了各个像素的第二段执行缺陷检测。

Patent Agency Ranking