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公开(公告)号：US20180159490A1
公开(公告)日：2018-06-07
申请号：US15886103
申请日：2018-02-01
Inventor： John Paul LESSO , Toru IDO
CPC classification number: H03G3/3089 , H03F1/26 , H03F1/32 , H03F1/34 , H03F3/187 , H03F3/217 , H03F3/2171 , H03F3/2173 , H03F3/2175 , H03F2200/102 , H03F2200/339 , H03F2200/432 , H03G7/002 , H03G7/007
Abstract: This application relates to Class D amplifier circuits (200). A modulator (201) controls a Class D output stage (202) based on a modulator input signal (Dm) to generate an output signal (Vout) which is representative of an input signal (Din). An error block (205), which may comprise an ADC (207), generates an error signal (ϵ) from the output signal and the input signal. In various embodiments the extent to which the error signal (ϵ) contributes to the modulator input signal (Dm) is variable based on an indication of the amplitude of the input signal (Din). The error signal may be received at a first input (204) of a signal selector block (203). The input signal may be received at a second input (206) of the signal selector block (203). The signal selector block may be operable in first and second modes of operation, wherein in the first mode the modulator input signal is based at least in part on the error signal; and in the second mode the modulator input signal is based on the digital input signal and is independent of the error signal. The error signal can be used to reduce distortion at high signal levels but is not used at low signal levels and so the noise floor at low signal levels does not depend on the component of the error block (205).
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公开(公告)号：US20180123530A1
公开(公告)日：2018-05-03
申请号：US15858173
申请日：2017-12-29
Inventor： John Paul LESSO , Emmanuel Philippe Christian HARDY
CPC classification number: H03F1/3241 , H03F1/3258 , H03F1/3264 , H03F3/183 , H03F2200/03 , H03F2201/3233 , H04R3/08 , H04R5/04 , H04R29/003 , H04R2420/03 , H04R2460/03
Abstract: This application relates to audio amplifier circuitry (100). An amplifier module (103) is located in a signal path between an input (101) and an output (102). A detection module (106) is configured to detect a characteristic of a load (104) electrically coupled, in use, to the output. A distortion setting controller (107) is provided for selecting one of a plurality of stored distortion settings {pi} based on the detected characteristic of the load; and a pre-distortion module (105) is configured to apply a first transfer function to a signal in the signal path prior to said amplifier module. The first transfer function is based on the selected distortion setting and for at least one of the stored distortion settings the corresponding first transfer function comprises a non-linear distortion function.
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公开(公告)号：US20170346501A1
公开(公告)日：2017-11-30
申请号：US15663411
申请日：2017-07-28
Inventor： John Paul LESSO , Emmanuel Philippe Christian HARDY
CPC classification number: H03M7/30 , H03K7/08 , H03K9/08 , H03M1/18 , H03M1/181 , H03M1/50 , H03M1/504 , H03M3/484 , H03M2201/00
Abstract: This application relates to analogue-to-digital converters (ADCs). An ADC 200 has a first converter (201) for receiving an analogue input signal (AIN) and outputting a time encode signal (DT), such as a pulse-width-modulated (PWM) signal, based on input signal and a first conversion gain setting (GIN). In some embodiments the first converter has a PWM modulator (401) for generating a PWM signal such that the input signal is encoded by pulse widths that can vary continuously in time. A second converter (202) receives the time encoded signal and outputs a digital output signal (DOUT) based on the time encoded signal (DT) and a second conversion gain setting (GO). The second converter may have a first PWM-to-digital modulator (403). A gain allocation block (204) generates the first and second conversion gain settings based on the time encoded signal (DT). The gain allocation block (204) may have a second PWM-to-digital modulator (203) which may be of lower latency and/or lower resolution that the first PWM-to-digital modulator (403).
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公开(公告)号：US20170180859A1
公开(公告)日：2017-06-22
申请号：US15380463
申请日：2016-12-15
Inventor： John Paul LESSO , Toru IDO
IPC: H04R3/12
Abstract: This application describes methods and apparatus for mitigating the effects of crosstalk in multichannel audio. An audio driver circuit (200) for driving first and second audio loads (103) having a common return path (RC), has first and second signal paths (Left and Right). A crosstalk compensation block (205) is configured to add a first compensation signal to the first signal path and add a second compensation signal to the second signal path. The first compensation signal is generated based on the second audio signal and a first compensation function and the second compensation signal is generated based on the first audio signal and a second compensation function. Each of the first and second compensation functions is based on a predetermined impedance value for at least part of the common return path (RH1) and is also based on a determined DC impedance value (ZL, ZR) for one of the first and second audio loads which is modified by a band correction factor (γ). The band correction factor modifies the DC impedance value so it is a better estimate of impedance across the frequency band of interest.
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公开(公告)号：US20240061921A1
公开(公告)日：2024-02-22
申请号：US18495236
申请日：2023-10-26
Inventor： John Paul LESSO , John FORSYTH
IPC: G06F21/32 , G06F3/16 , H04R1/10 , G10K11/178
CPC classification number: G06F21/32 , G06F3/165 , H04R1/1041 , G10K11/17823 , G10K11/1783 , G10L25/51
Abstract: The present invention relates to methods, apparatus and systems for audio playback via a personal audio device following a biometric process. A personal audio device may be used to obtain ear model data for authenticating a user via an ear biometric authentication system. Owing to that successful authentication, the electronic device is informed of the person who is listening to audio playback from the device. Thus the device can implement one or more playback settings which are specific to that authorised user.
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Patent Agency Ranking
公开(公告)号：US20240030923A1
公开(公告)日：2024-01-25
申请号：US18478572
申请日：2023-09-29
Inventor： John Laurence PENNOCK , John Paul LESSO
IPC: H03K19/0948 , H03K17/16 , H03K19/003 , H03M1/00
CPC classification number: H03K19/0948 , H03K17/161 , H03K19/00346 , H03K19/00369 , H03M1/001
Abstract: This application relates to control of semiconductor devices, in particular MOS devices, so as to reduce RTS/flicker noise. A circuit (100) includes a first MOS device (103, 104) and a bias controller (107). The circuit is operable in at least a first circuit state (PRO) in which the first MOS device is active to contribute to a first signal (Sout) and a second circuit state (PRST) in which the first MOS device does not contribute to the first signal. The bias controller is operable to control voltages at one or more terminals of the first MOS device to apply a pre-bias (VPB1, VPB2) during an instance of the second circuit state. The pre-bias is applied to set an occupancy state of charge carriers traps within the first MOS device, to limit noise during subsequent operation in the first circuit state. In embodiments, the bias controller is configured so that at least one parameter of the pre-bias is selectively variable in use based on one or more operating conditions.
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公开(公告)号：US20230112556A1
公开(公告)日：2023-04-13
申请号：US17990424
申请日：2022-11-18
Inventor： John Paul LESSO
Abstract: The present disclosure relates to a neuron for an artificial neural network. The neuron includes: a first dot product engine operative to: receive a first set of weights; receive a set of inputs; and calculate the dot product of the set of inputs and the first set of weights to generate a first dot product engine output. The neuron further includes a second dot product engine operative to: receive a second set of weights; receive an input based on the first dot product engine output; and generate a second dot product engine output based on the product of the first dot product engine output and a weight of the second set of weights. The neuron further includes an activation function module arranged to generate a neuron output based on the second dot product engine output. The first dot product engine and the second dot product engine are structurally or functionally different.
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公开(公告)号：US20220254980A1
公开(公告)日：2022-08-11
申请号：US17172564
申请日：2021-02-10
Inventor： John Paul LESSO , Claire MOTION
IPC: H01L41/04 , H01L41/113 , G01S15/931 , G01S7/527
Abstract: Circuitry for driving a transducer for an object detection system, the circuitry comprising drive circuitry configured to generate a drive waveform for the transducer, current monitor circuitry for monitoring a current through the transducer, and system identification circuitry. The system identification circuitry is configured to determine a characteristic of the transducer based on a first signal indicative of a drive voltage for the transducer and a second signal indicative of the current through the transducer. The circuitry is operative to adjust the drive waveform based on the determined characteristic of the transducer.
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公开(公告)号：US20220093111A1
公开(公告)日：2022-03-24
申请号：US17543980
申请日：2021-12-07
Inventor： John Paul LESSO
Abstract: A method of analysis of an audio signal comprises: receiving an audio signal representing speech; extracting first and second components of the audio signal representing first and second acoustic classes of the speech respectively; analyzing the first and second components of the audio signal with models of the first and second acoustic classes of the speech of an enrolled user. Based on the analyzing, information is obtained information about at least one of a channel and noise affecting the audio signal.
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公开(公告)号：US20220060832A1
公开(公告)日：2022-02-24
申请号：US17516830
申请日：2021-11-02
Inventor： John Paul LESSO , Mark James MCCLOY-STEVENS , John Bruce BOWLERWELL , Yanto SURYONO , Xin ZHAO , Morgan Timothy PRIOR
Abstract: This application relates to audio driving circuitry (100), and in particular to audio driving circuitry for outputting first and second audio driving signals for driving a stereo audio load (106), which may be a stereo audio load of an accessory apparatus (102) removably coupled to the audio driving circuitry in use. A load monitor (111) is provided for monitoring to monitor, from a monitoring node (112), an indication of a common mode return current passing through a common return path, together with an indication of a common mode component of the first and second audio driving signals and to determine an impedance characteristic of the stereo audio load. The load monitor (111) can provide dynamic monitoring of any significant change in load impedance. In some embodiments the load monitor (111) comprises an adaptive filter (301) which adapts a parameter of the filter which is related to the load impedance so as to determine the indication of load impedance.
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