公开(公告)号：US10804241B2

公开(公告)日：2020-10-13

申请号：US16695121

申请日：2019-11-25

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Christopher D. Muzzy

IPC: H01L23/12 ,  H01L23/00 ,  H01L23/498

Abstract: A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver.

公开(公告)号：US10586782B2

公开(公告)日：2020-03-10

申请号：US15640475

申请日：2017-07-01

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Clement J. Fortin ,  Christopher D. Muzzy ,  Brian W. Quinlan ,  Thomas A. Wassick ,  Thomas Weiss

IPC: H01L23/00 ,  H01L23/498

Abstract: A method and structure for joining a semiconductor device and a laminate substrate or two laminate substrates where the joint is formed with lead free solders and lead free compositions. The various lead free solders and lead free compositions are chosen so that there is a sufficient difference in liquidus temperatures such that some components may be joined to, or removed from, the laminate substrate without disturbing other components on the laminate substrate.

公开(公告)号：US20190067239A1

公开(公告)日：2019-02-28

申请号：US15686645

申请日：2017-08-25

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Christopher D. Muzzy

IPC: H01L23/00 ,  H01L23/498

Abstract: A semiconductor structure which includes a first semiconductor substrate having a first plurality of copper connectors; a second semiconductor substrate having a second plurality of copper connectors; and a joining structure joining the first plurality of copper connectors to the second plurality of copper connectors, the joining structure including a copper intermetallic mesh having pores filled with silver. There is also a method for joining two semiconductor substrates.

公开(公告)号：US10192839B2

公开(公告)日：2019-01-29

申请号：US15829506

申请日：2017-12-01

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L23/00

Abstract: A method of fabricating a pillar-type connection includes forming a first conductive layer. A second conductive layer is formed on the first conductive layer to define a conductive pillar that includes a top surface defining a recess aligned with a hollow core of the first conductive layer. A conductive via that terminates at a top surface of the first conductive layer is formed.

公开(公告)号：US09947598B1

公开(公告)日：2018-04-17

申请号：US15634237

申请日：2017-06-27

Applicant: International Business Machines Corporation

Inventor： Krishna R. Tunga ,  Karen P. McLaughlin ,  Charles L. Arvin ,  Brian R. Sundlof ,  Steven P. Ostrander ,  Christopher D. Muzzy ,  Thomas A. Wassick

IPC: H01L21/66 ,  H01L23/58 ,  H01L21/78

CPC classification number: H01L22/12 ,  H01L21/78 ,  H01L23/585

Abstract: A methodology and associated wafer level assembly of testing crackstop structure designs. The wafer level semiconductor assembly includes: a substrate structure shaped to define a set of horizontal directions; a metallization layer located on top of the substrate structure, with the metallization layer including a crackstop structure formed therein in accordance with a crackstop structure design; and a tensioned layer located on top of the metallization layer, with the tensioned layer being made of material having internal tensile forces oriented in the horizontal directions. The tensile forces promote horizontal direction crack propagation in the metallization layer so that the crackstop structure design can be tested more rigorously and reliably before deciding on the crackstop design structure to put into mass production (which mass produced product would typically not include the tensioned layer).

公开(公告)号：US20180102337A1

公开(公告)日：2018-04-12

申请号：US15829492

申请日：2017-12-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Charles L. Arvin ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/03 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/11001 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13011 ,  H01L2224/13019 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/81141 ,  H01L2224/81143 ,  H01L2224/81815 ,  H01L2924/01029 ,  H01L2924/381 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/01027

Abstract: A method of fabricating a pillar-type connection includes forming a second conductive layer on a first conductive layer to define a conductive pillar that includes a non-planar top surface defining a recess aligned with a hollow core of the first conductive layer.

公开(公告)号：US20180102336A1

公开(公告)日：2018-04-12

申请号：US15711016

申请日：2017-09-21

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Christopher D. Muzzy

IPC: H01L23/00 ,  H01L21/66

CPC classification number: H01L24/06 ,  H01L22/20 ,  H01L23/49816 ,  H01L24/03 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/05113 ,  H01L2224/05155 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/0603 ,  H01L2224/06131 ,  H01L2224/06132 ,  H01L2224/06134 ,  H01L2224/06177 ,  H01L2224/11001 ,  H01L2224/1145 ,  H01L2224/11462 ,  H01L2224/116 ,  H01L2224/1161 ,  H01L2224/13026 ,  H01L2224/13028 ,  H01L2224/13078 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13184 ,  H01L2224/13562 ,  H01L2224/136 ,  H01L2224/13639 ,  H01L2224/16227 ,  H01L2224/81815 ,  H01L2924/07025 ,  H01L2924/014 ,  H01L2924/00014 ,  H01L2924/00012

Abstract: Embodiments are directed to a method of forming a semiconductor chip package and resulting structures having a mixed under-bump metallization (UBM) size and pitch on a single die. A first set of UBMs having a first total plateable surface area is formed on a first region of a die. A second set of UBMs having an equal total plateable surface area is formed on a second region of the die. A solder bump having a calculated solder height is applied to a plateable surface of each UBM. The solder height is calculated such that a volume of solder in the first region is equal to a volume of solder in the second region.

公开(公告)号：US09741682B2

公开(公告)日：2017-08-22

申请号：US14974165

申请日：2015-12-18

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L23/48 ,  H01L23/00 ,  H01L21/56

CPC classification number: H01L24/81 ,  B23K35/025 ,  B23K35/262 ,  B23K35/302 ,  B23K35/3033 ,  H01L21/4853 ,  H01L21/52 ,  H01L21/563 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0401 ,  H01L2224/05572 ,  H01L2224/05666 ,  H01L2224/1132 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/11849 ,  H01L2224/13017 ,  H01L2224/13022 ,  H01L2224/13083 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13211 ,  H01L2224/13347 ,  H01L2224/13355 ,  H01L2224/13447 ,  H01L2224/13455 ,  H01L2224/13541 ,  H01L2224/13647 ,  H01L2224/13655 ,  H01L2224/16237 ,  H01L2224/16238 ,  H01L2224/16503 ,  H01L2224/16507 ,  H01L2224/17505 ,  H01L2224/73204 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/8112 ,  H01L2224/81193 ,  H01L2224/81211 ,  H01L2224/8181 ,  H01L2224/81815 ,  H01L2224/8191 ,  H01L2224/81911 ,  H01L2924/0132 ,  H01L2924/01074 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2924/01029 ,  H01L2924/01028 ,  H01L2924/00012

Abstract: A method forming an interconnect structure includes depositing a first solder bump on a chip; depositing a second solder bump on a laminate, the second solder bump including a nickel copper colloid surrounded by a nickel or copper shell and suspended in a tin-based solder; aligning the chip with the laminate; performing a first reflow process to join the chip to the laminate; depositing an underfill material around the first solder bump and the second solder bump; and performing a second reflow process at a temperature that is lower than the first reflow process to convert the first solder bump and the second solder bump to an all intermetallic interconnect; wherein depositing the underfill material is performed before or after performing the second reflow process.

公开(公告)号：US20170179061A1

公开(公告)日：2017-06-22

申请号：US15453113

申请日：2017-03-08

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L23/00 ,  H01L25/065 ,  H01L25/00 ,  H01L21/56

CPC classification number: H01L24/13 ,  H01L21/56 ,  H01L21/563 ,  H01L21/76838 ,  H01L21/7684 ,  H01L23/3171 ,  H01L23/5283 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/11 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L24/81 ,  H01L24/83 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03416 ,  H01L2224/0345 ,  H01L2224/03452 ,  H01L2224/03912 ,  H01L2224/0401 ,  H01L2224/05147 ,  H01L2224/05166 ,  H01L2224/05171 ,  H01L2224/05184 ,  H01L2224/05647 ,  H01L2224/05666 ,  H01L2224/05671 ,  H01L2224/1145 ,  H01L2224/11452 ,  H01L2224/1146 ,  H01L2224/11462 ,  H01L2224/11464 ,  H01L2224/1147 ,  H01L2224/11474 ,  H01L2224/11632 ,  H01L2224/13017 ,  H01L2224/13019 ,  H01L2224/13026 ,  H01L2224/13078 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13124 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13184 ,  H01L2224/1601 ,  H01L2224/2919 ,  H01L2224/73204 ,  H01L2224/8112 ,  H01L2224/81193 ,  H01L2224/81203 ,  H01L2224/81345 ,  H01L2224/81365 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/06513 ,  H01L2924/20106 ,  H01L2924/20107 ,  H01L2924/20108 ,  H01L2924/20109 ,  H01L2924/2011 ,  H01L2924/3511 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/069 ,  H01L2924/014

Abstract: An embodiment of the invention may include a semiconductor structure, and method of forming the semiconductor structure. The semiconductor structure may include a first set of pillars located on a first substrate. The semiconductor structure may include a second set of pillars located on a second substrate. The semiconductor structure may include a joining layer connecting the first pillar to the second pillar. The semiconductor structure may include an underfill layer located between the first and second substrate.

公开(公告)号：US20170125368A1

公开(公告)日：2017-05-04

申请号：US15403797

申请日：2017-01-11

Applicant: International Business Machines Corporation

Inventor： Charles L. Arvin ,  Jeffrey P. Gambino ,  Christopher D. Muzzy ,  Wolfgang Sauter

IPC: H01L23/00

CPC classification number: H01L24/13 ,  H01L24/03 ,  H01L24/11 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0345 ,  H01L2224/0401 ,  H01L2224/05 ,  H01L2224/05166 ,  H01L2224/05187 ,  H01L2224/05647 ,  H01L2224/10126 ,  H01L2224/11001 ,  H01L2224/11462 ,  H01L2224/1147 ,  H01L2224/13011 ,  H01L2224/13019 ,  H01L2224/13026 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/13084 ,  H01L2224/131 ,  H01L2224/13111 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/16227 ,  H01L2224/16238 ,  H01L2224/81141 ,  H01L2224/81143 ,  H01L2224/81815 ,  H01L2924/01029 ,  H01L2924/381 ,  H01L2924/00014 ,  H01L2924/04941 ,  H01L2924/0496 ,  H01L2924/01074 ,  H01L2924/01024 ,  H01L2924/00012 ,  H01L2924/014 ,  H01L2924/01027

Abstract: A method of fabricating a pillar-type connection includes forming, on a bond pad, a first conductive layer including a hollow core. A second conductive layer is formed on a first conductive layer to define a conductive pillar that includes a non-planar top surface defining a recess aligned with the hollow core.