公开(公告)号：US20190288186A1

公开(公告)日：2019-09-19

申请号：US16409905

申请日：2019-05-13

Applicant: International Business Machines Corporation ,  Samsung Electronics Co., Ltd.

Inventor： Guohan Hu ,  Younghyun Kim ,  Daniel C. Worledge

IPC: H01L43/08 ,  H01L43/10

Abstract: Techniques relate to forming a magnetic tunnel junction (MTJ). A synthetic antiferromagnetic reference layer is adjacent to a tunnel barrier layer. The synthetic antiferromagnetic reference layer includes a first magnetic layer, a second magnetic layer, and a reference spacer layer sandwiched between the first magnetic layer and the second magnetic layer. A magnetic free layer is adjacent to the tunnel barrier layer so as to be opposite the synthetic antiferromagnetic reference layer. The synthetic antiferromagnetic reference layer has a thickness of at least one of 3 nanometers (nm), 4 nm, and 3-4 nm.

公开(公告)号：US20180358067A1

公开(公告)日：2018-12-13

申请号：US15802827

申请日：2017-11-03

Applicant: International Business Machines Corporation

Inventor： Guohan Hu ,  Daniel C. Worledge

IPC: G11C11/16 ,  H01L43/10 ,  H01L27/22 ,  H01L43/12 ,  H01L43/02 ,  H01L43/08

CPC classification number: G11C11/161 ,  G11C11/1675 ,  H01L27/228 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: Embodiments of the invention are directed to a magnetic tunnel junction (MTJ) storage element that includes a reference layer, a tunnel barrier and a free layer on an opposite side of the tunnel barrier layer from the reference layer. The reference layer has a fixed magnetization direction. The free layer includes a first region, a second region and a third region. The third region is formed from a third material that is configured to magnetically couple the first region and the second region. The first region is formed from a first material having a first predetermined magnetic moment, and the second region is formed from a second material having a second predetermined magnetic moment. The first predetermined magnetic moment is lower that the second predetermined magnetic moment.

公开(公告)号：US09941469B2

公开(公告)日：2018-04-10

申请号：US14876266

申请日：2015-10-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. Worledge

IPC: H01L43/10 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  G11C11/16

CPC classification number: H01L43/10 ,  G11C11/161 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A memory device that includes a first magnetic insulating tunnel barrier reference layer present on a first non-magnetic metal electrode, and a free magnetic metal layer present on the first magnetic insulating tunnel barrier reference layer. A second magnetic insulating tunnel barrier reference layer may be present on the free magnetic metal layer, and a second non-magnetic metal electrode may be present on the second magnetic insulating tunnel barrier. The first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel.

公开(公告)号：US09917247B2

公开(公告)日：2018-03-13

申请号：US15347327

申请日：2016-11-09

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION ,  Crocus Technology SA

Inventor： Anthony J. Annunziata ,  Lucian Prejbeanu ,  Philip L. Trouilloud ,  Daniel C. Worledge

IPC: H01L43/02 ,  H01L43/08 ,  H01L43/12 ,  H01L27/22 ,  G11C14/00 ,  G11C11/56 ,  H01L29/82 ,  G11C11/16 ,  G01R33/06 ,  H01L43/10

CPC classification number: H01L43/02 ,  G01R33/066 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/5607 ,  G11C14/0036 ,  G11C14/0081 ,  H01L27/222 ,  H01L27/226 ,  H01L27/228 ,  H01L29/82 ,  H01L43/08 ,  H01L43/10 ,  H01L43/12

Abstract: A mechanism is provided for fabricating a thermally assisted magnetoresistive random access memory device. A bottom thermal barrier is formed on a bottom contact. A magnetic tunnel junction is formed on the bottom thermal barrier. The magnetic tunnel junction includes a top ferromagnetic layer formed on a tunnel barrier. The tunnel barrier is formed on a bottom ferromagnetic layer. A top thermal barrier is formed on the top ferromagnetic layer. A top contact is formed on the top thermal barrier. The top contact is reduced to a first diameter. The tunnel barrier and the bottom ferromagnetic layer each have a second diameter. The first diameter of the top contact is smaller than the second diameter.

公开(公告)号：US09853205B1

公开(公告)日：2017-12-26

申请号：US15283329

申请日：2016-10-01

Applicant: International Business Machines Corporation

Inventor： Rolf Allenspach ,  Anthony J. Annunziata ,  Daniel C. Worledge ,  See-Hun Yang

IPC: G11C11/00 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  G11C11/16

CPC classification number: H01L43/02 ,  G11C11/161 ,  G11C11/1675 ,  H01L43/08 ,  H01L43/10

Abstract: A spin-transfer torque magnetic tunnel junction includes a layer stack with a pinned magnetic layer and a free magnetic layer, and an insulating barrier layer there-between. Each of the magnetic layers has an out-of-plane magnetization orientation. The junction is configured so as to allow a spin-polarized current flow generated from one of the two magnetic layers to the other to initiate an asymmetrical switching of the magnetization orientation of the free layer. The switching is off-centered toward an edge of the stack. The junction may allow a spin-polarized current flow that is off-centered toward an edge of the stack, from one of the two magnetic layers to the other, to initiate the asymmetrical switching. Related devices and methods of operation are also provided.

公开(公告)号：US09823858B2

公开(公告)日：2017-11-21

申请号：US15343861

申请日：2016-11-04

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John K. DeBrosse ,  Blake G. Fitch ,  Michele M. Franceschini ,  Todd E. Takken ,  Daniel C. Worledge

IPC: G11C11/16 ,  G06F3/06 ,  G11C7/10 ,  G11C13/00 ,  G06F13/16

CPC classification number: G06F3/0613 ,  G06F3/0602 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0688 ,  G06F13/1668 ,  G11C7/10 ,  G11C7/1003 ,  G11C7/1015 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069

Abstract: A method for memory management includes streaming bits to a memory buffer on a memory device using a write data channel that optimizes a speed of writing to the memory devices. The bits are written to non-volatile memory cells in the memory device at a first speed, using a bi-directional bus. Bits are read from the memory device over a read channel to provide reads at a second speed that is slower than the first speed, using the bi-directional bus.

公开(公告)号：US20170317270A1

公开(公告)日：2017-11-02

申请号：US15652482

申请日：2017-07-18

Applicant: International Business Machines Corporation ,  Crocus Technology SA

Inventor： Anthony J. Annunziata ,  Lucian Prejbeanu ,  Philip L. Trouilloud ,  Daniel C. Worledge

IPC: H01L43/02 ,  H01L43/08 ,  G11C11/56 ,  G11C11/16 ,  H01L43/12

CPC classification number: H01L43/02 ,  G11C11/161 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1677 ,  G11C11/5607 ,  H01L43/08 ,  H01L43/12

Abstract: A mechanism is provided for a thermally assisted magnetoresistive random access memory device (TAS-MRAM). A storage layer has an anisotropic axis, in which the storage layer is configured to store a state in off axis positions and on axis positions. The off axis positions are not aligned with the anisotropic axis. A tunnel barrier is disposed on top of the storage layer. A ferromagnetic sense layer is disposed on top of the tunnel barrier.

公开(公告)号：US09773971B2

公开(公告)日：2017-09-26

申请号：US15254107

申请日：2016-09-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Guohan Hu ,  Daniel C. Worledge

IPC: H01L43/10 ,  H01L43/08 ,  H01L43/12 ,  G11C11/16 ,  H01F10/32 ,  H01F41/32 ,  H01L43/02

CPC classification number: H01L43/10 ,  G11C11/161 ,  H01F10/14 ,  H01F10/16 ,  H01F10/3254 ,  H01F10/3286 ,  H01F41/32 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A magnetic material includes a cobalt layer between opposing iron layers. The iron layers include iron and are body-centered cubic (BCC), the cobalt layer comprises cobalt and is BCC or amorphous, and the magnetic material has a perpendicular magnetic anisotropy (PMA).

公开(公告)号：US20170098761A1

公开(公告)日：2017-04-06

申请号：US14876266

申请日：2015-10-06

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： Daniel C. Worledge

IPC: H01L43/10 ,  G11C11/16 ,  H01L43/12 ,  H01L43/02 ,  H01L43/08

CPC classification number: H01L43/10 ,  G11C11/161 ,  H01L27/222 ,  H01L43/02 ,  H01L43/08 ,  H01L43/12

Abstract: A memory device that includes a first magnetic insulating tunnel barrier reference layer present on a first non-magnetic metal electrode, and a free magnetic metal layer present on the first magnetic insulating tunnel barrier reference layer. A second magnetic insulating tunnel barrier reference layer may be present on the free magnetic metal layer, and a second non-magnetic metal electrode may be present on the second magnetic insulating tunnel barrier. The first and second magnetic insulating tunnel barrier reference layers are arranged so that their magnetizations are aligned to be anti-parallel.

公开(公告)号：US09496018B2

公开(公告)日：2016-11-15

申请号：US14676292

申请日：2015-04-01

Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

Inventor： John K. Debrosse ,  Blake G. Fitch ,  Michele M. Franceschini ,  Todd E. Takken ,  Daniel C. Worledge

IPC: G11C11/16

CPC classification number: G06F3/0613 ,  G06F3/0602 ,  G06F3/061 ,  G06F3/0656 ,  G06F3/0659 ,  G06F3/0673 ,  G06F3/0679 ,  G06F3/0688 ,  G06F13/1668 ,  G11C7/10 ,  G11C7/1003 ,  G11C7/1015 ,  G11C11/1673 ,  G11C11/1675 ,  G11C11/1693 ,  G11C13/0004 ,  G11C13/004 ,  G11C13/0061 ,  G11C13/0069

Abstract: A memory includes non-volatile memory devices, each of which has multiple nonvolatile memory cells. A write controller streams bits to the memory devices in groups of N bits using a write data channel having write bus drivers, receivers and write bus topology that take advantage of high-speed signaling to optimize a speed of writing to the memory devices. Consecutive groups of bits are written to consecutive memory cells within respective memory devices. A self-referenced read controller reads bits from the memory devices using a read channel having read drivers, receivers, and read bus topology that include no design requirements for high-speed or low-latency data transmission.

Abstract translation: 存储器包括非易失性存储器件，每个存储器件具有多个非易失性存储器单元。 写控制器使用具有写总线驱动器，接收器和写总线拓扑的写数据通道以N组的方式将比特流分组到存储器件，其利用高速信令优化对存储器件的写入速度。 连续的比特组被写入相应的存储器件中的连续的存储器单元。 自参考读取控制器使用具有读驱动器，接收器和读总线拓扑的读通道从存储器件读取位，其中不包括高速或低延迟数据传输的设计要求。