公开(公告)号：US07405346B2

公开(公告)日：2008-07-29

申请号：US10553124

申请日：2004-04-15

申请人： Noboru Endo ,  Kouki Yoshida ,  Miho Akiyoshi ,  Yasuko Yoshida ,  Chieko Ohsumi ,  Daisuke Igarashi

发明人： Noboru Endo ,  Kouki Yoshida ,  Miho Akiyoshi ,  Yasuko Yoshida ,  Chieko Ohsumi ,  Daisuke Igarashi

IPC分类号： A01H5/00 ,  C12N5/14 ,  C12N15/82 ,  C12N15/29 ,  C07H21/04

CPC分类号： C12N15/8273 ,  C12N9/90

摘要： This invention provides a novel gene that can impart salt stress tolerance to plants for a long period of time and salt stress tolerant transgenic plants to which such gene has been introduced. Such novel gene encodes the following protein (a), (b), or (c), and such salt stress tolerant transgenic plant has such gene introduced therein: (a) a protein consisting of the amino acid sequence as shown in SEQ ID NO: 2 in the Sequence Listing; (b) a protein consisting of an amino acid sequence derived from the amino acid sequence as shown in SEQ ID NO: 2 in the Sequence Listing by deletion, substitution, or addition of one or several amino acid residues and having activity of imparting salt stress tolerance to plants; or (c) a protein consisting of an amino acid sequence derived from the amino acid sequence as shown in SEQ ID NO: 2 in the Sequence Listing by deletion, substitution, or addition of one or several amino acid residues and having UDP-glucose 4-epimerase activity.

摘要翻译： 本发明提供了一种能够长时间赋予植物盐胁迫耐受性和引入这种基因的耐盐胁迫转基因植物的新型基因。 这样的新基因编码以下蛋白质（a），（b）或（c），并且这种耐盐胁迫转基因植物在其中引入了这样的基因：（a）由如SEQ ID NO所示的氨基酸序列组成的蛋白质 ：序列表中的2个; （b）通过缺失，取代或添加一个或几个氨基酸残基并具有赋予盐胁迫活性的序列表中SEQ ID NO：2所示氨基酸序列的氨基酸序列组成的蛋白质 植物耐受性 或（c）由序列表中SEQ ID NO：2所示的氨基酸序列的氨基酸序列组成的蛋白质，通过缺失，取代或添加一个或几个氨基酸残基并具有UDP-葡萄糖4 - 同工酶活性。

公开(公告)号：US07397104B2

公开(公告)日：2008-07-08

申请号：US10778081

申请日：2004-02-17

申请人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

发明人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

IPC分类号： H01L21/00

CPC分类号： H01L21/76229 ,  H01L21/76224 ,  H01L21/76232 ,  H01L27/10852 ,  H01L28/91

摘要： A semiconductor integrated circuit device is provided which includes an active region, a shallow groove isolation adjacent to the active region, and a semiconductor element formed in the active region and having a gate. The sum of a width of the active region and a width of the shallow groove isolation constitutes a minimum pitch in the direction of a gate width of the gate, and the width of the active region is set larger than one-half of the minimum pitch.

摘要翻译： 提供一种半导体集成电路器件，其包括有源区，与有源区相邻的浅槽隔离，以及形成在有源区中并具有栅极的半导体元件。 有源区的宽度和浅槽隔离的宽度的和构成栅极的栅极宽度方向上的最小间距，并且有源区的宽度被设定为大于最小间距的一半 。

公开(公告)号：US20080004208A1

公开(公告)日：2008-01-03

申请号：US11791839

申请日：2005-12-05

申请人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

发明人： Masao Seto ,  Hiroyuki Tagawa ,  Yasuko Yoshida ,  Shigeki Kira

IPC分类号： A61K38/00 ,  A61K48/00 ,  A61P43/00 ,  C12Q1/68 ,  G01N33/00

CPC分类号： G01N33/57426 ,  C12Q1/6886 ,  C12Q2600/106 ,  C12Q2600/118 ,  C12Q2600/16

摘要： In order to more accurately analyze a change in the complicated gene copy number in malignant lymphoma and identify a region affected by an important genomic aberration in greater detail so that the results can be used in diagnosing the type of disease and performing prognosis, genome-wide array CGH is carried out and thus human chromosome 136.23 to p36.32, human chromosome 1 q42.2 to q43, human chromosome 2 p11.2, human chromosome 2 q13, human chromosome 17 p11.2 to p13.3, and human chromosome 19 p13.2 to p13.3 are identified.

摘要翻译： 为了更准确地分析恶性淋巴瘤中复杂基因拷贝数的变化，并更详细地鉴定受重要基因组畸变影响的区域，使得结果可用于诊断疾病的类型并进行预后，全基因组 进行阵列CGH，因此人染色体136.23至p36.32，人染色体1 q42.2至q43，人染色体2 p11.2，人染色体2 q13，人染色体17 p11.2至p13.3和人染色体 19 p13.2至p13.3。

公开(公告)号：US20070292853A1

公开(公告)日：2007-12-20

申请号：US10593349

申请日：2005-03-18

申请人： Mitsuo Kawase ,  Yasuko Yoshida ,  Kazunari Yamada ,  Yutaka Takarada ,  Kouzo Hashimoto

发明人： Mitsuo Kawase ,  Yasuko Yoshida ,  Kazunari Yamada ,  Yutaka Takarada ,  Kouzo Hashimoto

IPC分类号： C07H21/04 ,  C12Q1/68

CPC分类号： C12Q1/6827 ,  C12Q2565/501 ,  C12Q2537/143 ,  C12Q2525/204

摘要： A DNA array for detecting a single nucleotide polymorphism of a gene, which comprises, on a solid support, a first probe spots group consisting of one or more probe spots each containing one or more probes hybridizable with a polynucleotide of the gene, in which the probes are exactly complementary to the first polymorphism pattern of the gene, and a second probe spots group consisting of one or more probe spots each containing one or more probes hybridizable with the polynucleotide of the gene, in which the probes are exactly complementary to the second polymorphism pattern of the gene, wherein probe lengths in the probe spots is different from each other. This DNA array enables more exact SNP detection.

摘要翻译： 一种用于检测基因的单核苷酸多态性的DNA阵列，其在固体支持物上包含由一个或多个探针点组成的第一探针斑点，每个探针点含有一个或多个与该基因的多核苷酸杂交的探针，其中 探针与基因的第一多态性模式完全互补，第二探针点组由一个或多个探针点组成，每个探针点含有一个或多个可与基因的多核苷酸杂交的探针，其中探针与第二个 基因的多态性模式，其中探针点中的探针长度彼此不同。 该DNA阵列能够进行更准确的SNP检测。

公开(公告)号：US20070028332A1

公开(公告)日：2007-02-01

申请号：US10553124

申请日：2004-04-15

申请人： Noboru Endo ,  Kouki Yoshida ,  Miho Akiyoshi ,  Yasuko Yoshida ,  Chieko Ohsumi ,  Daisuke Igarashi

发明人： Noboru Endo ,  Kouki Yoshida ,  Miho Akiyoshi ,  Yasuko Yoshida ,  Chieko Ohsumi ,  Daisuke Igarashi

IPC分类号： A01H1/00 ,  C12N9/90 ,  C12Q1/68 ,  C07H21/04 ,  C12N15/82 ,  C12N5/04

CPC分类号： C12N15/8273 ,  C12N9/90

摘要： This invention provides a novel gene that can impart salt stress tolerance to plants for a long period of time and salt stress tolerant transgenic plants to which such gene has been introduced. Such novel gene encodes the following protein (a), (b), or (c), and such salt stress tolerant transgenic plant has such gene introduced therein: (a) a protein consisting of the amino acid sequence as shown in SEQ ID NO: 2 in the Sequence Listing; (b) a protein consisting of an amino acid sequence derived from the amino acid sequence as shown in SEQ ID NO: 2 in the Sequence Listing by deletion, substitution, or addition of one or several amino acid residues and having activity of imparting salt stress tolerance to plants; or (c) a protein consisting of an amino acid sequence derived from the amino acid sequence as shown in SEQ ID NO: 2 in the Sequence Listing by deletion, substitution, or addition of one or several amino acid residues and having UDP-glucose 4-epimerase activity.

摘要翻译： 本发明提供了一种能够长时间赋予植物盐胁迫耐受性和引入这种基因的耐盐胁迫转基因植物的新型基因。 这样的新基因编码以下蛋白质（a），（b）或（c），并且这种耐盐胁迫转基因植物在其中引入了这样的基因：（a）由如SEQ ID NO所示的氨基酸序列组成的蛋白质 ：序列表中的2个; （b）通过缺失，取代或添加一个或几个氨基酸残基并具有赋予盐胁迫活性的序列表中SEQ ID NO：2所示氨基酸序列的氨基酸序列组成的蛋白质 植物耐受性 或（c）由序列表中SEQ ID NO：2所示的氨基酸序列的氨基酸序列组成的蛋白质，通过缺失，取代或添加一个或几个氨基酸残基并具有UDP-葡萄糖4 - 同工酶活性。

公开(公告)号：US20050145897A1

公开(公告)日：2005-07-07

申请号：US11008276

申请日：2004-12-10

申请人： Shuji Matsuo ,  Katsuhiro Uchimura ,  Yasuko Yoshida ,  Kota Funayama ,  Yutaka Takeshima

发明人： Shuji Matsuo ,  Katsuhiro Uchimura ,  Yasuko Yoshida ,  Kota Funayama ,  Yutaka Takeshima

IPC分类号： H01L21/28 ,  H01L21/285 ,  H01L21/304 ,  H01L21/318 ,  H01L21/336 ,  H01L21/768 ,  H01L21/8238 ,  H01L23/522 ,  H01L27/092 ,  H01L29/417 ,  H01L29/78 ,  H01L21/3205 ,  H01L29/76 ,  H01L31/062

CPC分类号： H01L29/665 ,  H01L21/28518 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/823814 ,  H01L21/823835 ,  H01L21/823842 ,  H01L29/6656 ,  H01L29/6659 ,  H01L29/7833 ,  H01L29/7842

摘要： A method of manufacture of a semiconductor device includes forming a gate insulating film and a gate electrode made of polycrystalline silicon over a semiconductor substrate; implanting ions into the semiconductor substrate to form a semiconductor region as a source or drain; forming a cobalt film and a titanium nitride film over the semiconductor substrate to cover the gate electrode; carrying out annealing to cause a reaction between Co and Si and the semiconductor region to form a CoSi layer; carrying out wet cleaning to remove the titanium nitride film and unreacted cobalt film to leave the CoSi layer over the gate electrode and semiconductor region; carrying out annealing to cause a reaction between the CoSi layer and the gate electrode and semiconductor region to form a CoSi2 layer; carrying out HPM cleaning; and forming over the semiconductor substrate a silicon nitride film by low-pressure CVD to cover the gate electrode.

摘要翻译： 一种制造半导体器件的方法包括在半导体衬底上形成栅极绝缘膜和由多晶硅制成的栅电极; 将离子注入到半导体衬底中以形成作为源极或漏极的半导体区域; 在所述半导体衬底上形成钴膜和氮化钛膜以覆盖所述栅电极; 进行退火以引起Co和Si之间的反应以及半导体区域以形成CoSi层; 进行湿式清洗以除去氮化钛膜和未反应的钴膜，使CoSi层离开栅电极和半导体区域; 进行退火以引起CoSi层和栅极电极和半导体区域之间的反应以形成CoSi 2 O 3层; 进行HPM清洗; 以及通过低压CVD在半导体衬底上形成氮化硅膜以覆盖栅电极。

公开(公告)号：US20050053484A1

公开(公告)日：2005-03-10

申请号：US10504692

申请日：2003-02-18

申请人： Toshikazu Hirota ,  Yasuko Yoshida

发明人： Toshikazu Hirota ,  Yasuko Yoshida

IPC分类号： B01F11/02 ,  B01F13/00 ,  B01L3/00 ,  F04B43/04 ,  F04B53/10 ,  G01N27/447 ,  G01N37/00 ,  F04B17/00

CPC分类号： G01N27/44704 ,  B01F11/02 ,  B01F13/0059 ,  B01L3/50273 ,  B01L3/502738 ,  B01L3/502746 ,  B01L2300/0816 ,  B01L2300/0867 ,  B01L2300/1827 ,  B01L2400/0421 ,  B01L2400/0439 ,  B01L2400/0605 ,  B01L2400/0677 ,  B01L2400/082 ,  F04B43/043 ,  F04B53/1077 ,  G01N27/44791

摘要： A microchemical chip (10A) comprises a plate-shaped substrate (12), with a channel (14) formed on a surface of the substrate (12) through which a fluid flows. A fluid storage section (16) for storing the fluid communicates with the channel (14) at a starting end of the channel (14). A fluid discharge section (18) communicates with the channel (14) at a terminal end of the channel (14). An extruding pump section (22) is formed integrally on the substrate (12), at a portion of the channel (14) in the vicinity of the fluid storage section (16).

摘要翻译： 微化学芯片（10A）包括板状基板（12），其中在基板（12）的表面上形成有流体流过的通道（14）。 用于存储流体的流体存储部分（16）在通道（14）的起始端处与通道（14）通信。 流体排放部分（18）在通道（14）的终端处与通道（14）连通。 挤出泵部分（22）在流体存储部分（16）附近的通道（14）的一部分上一体地形成在基板（12）上。

公开(公告)号：US06858515B2

公开(公告)日：2005-02-22

申请号：US10638485

申请日：2003-08-12

申请人： Norio Ishitsuka ,  Hideo Miura ,  Shuji Ikeda ,  Yasuko Yoshida ,  Norio Suzuki ,  Kozo Watanabe ,  Kenji Kanamitsu

发明人： Norio Ishitsuka ,  Hideo Miura ,  Shuji Ikeda ,  Yasuko Yoshida ,  Norio Suzuki ,  Kozo Watanabe ,  Kenji Kanamitsu

IPC分类号： H01L21/76 ,  H01L21/316 ,  H01L21/762 ,  H01L29/06

CPC分类号： H01L21/76232 ,  H01L29/0657

摘要： A semiconductor device free from electric failure in transistors at upper trench edges can be produced by a simplified process comprising basic steps of forming a pad oxide film on the circuit-forming side of a semiconductor substrate; forming an oxidation prevention film on the pad oxide film; removing the oxidation presention film and the pad oxide film at a desired position, thereby exposing the surface of the semiconductor substrate; horizontally recessing the pad oxide film, etching the exposed surface of the semiconductor substrate by isotropic etching; forming a trench to a desired depth, using the oxidation prevention film as a mask; horizontally recessing the pad oxide film; oxidizing the trench formed in the semiconductor substrate; embedding an embedding isolation film in the oxidized trench; removing the embedding isolation film formed on the oxidation prevention film; removing the oxidation prevention film formed on the circuit-forming side of the semiconductor substrate; and removing the pad oxide film formed on the circuit-forming side of the semiconductor substrate, where round upper trench edges with a curvature can be obtained, if necessary, by conducting isotropic etching of exposed surface of the semiconductor substrate and horizontally recessing of the pad oxide film before the oxidation of the trench, whereby only one oxidation step is required.

摘要翻译： 在上沟槽边缘处的晶体管中没有电故障的半导体器件可以通过简化的工艺制造，包括在半导体衬底的电路形成侧形成衬垫氧化膜的基本步骤; 在衬垫氧化膜上形成氧化防止膜; 在期望的位置除去氧化呈现膜和衬垫氧化膜，从而暴露半导体衬底的表面; 水平地凹陷衬垫氧化膜，通过各向同性蚀刻蚀刻半导体衬底的暴露表面; 使用氧化防止膜作为掩模，形成期望深度的沟槽; 使衬垫氧化膜水平地凹陷; 氧化在半导体衬底中形成的沟槽; 在氧化沟槽中嵌入嵌入隔离膜; 去除形成在防氧化膜上的嵌入隔离膜; 去除形成在半导体衬底的电路形成侧的氧化防止膜; 以及去除形成在半导体衬底的电路形成侧的衬垫氧化膜，其中如果需要，可以获得具有曲率的圆形上沟槽边缘，通过对半导体衬底的暴露表面进行各向同性蚀刻并且使衬垫的水平凹陷 氧化膜在沟槽氧化之前，因此只需要一个氧化步骤。

公开(公告)号：US06720234B2

公开(公告)日：2004-04-13

申请号：US10366423

申请日：2003-02-14

申请人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

发明人： Norio Suzuki ,  Hiroyuki Ichizoe ,  Masayuki Kojima ,  Keiji Okamoto ,  Shinichi Horibe ,  Kozo Watanabe ,  Yasuko Yoshida ,  Shuji Ikeda ,  Akira Takamatsu ,  Norio Ishitsuka ,  Atsushi Ogishima ,  Maki Shimoda

IPC分类号： H01L2176

CPC分类号： H01L21/76229 ,  H01L21/76224 ,  H01L21/76232 ,  H01L27/10852 ,  H01L28/91

摘要： Grooves are defined in a substrate having device isolation regions by dry etching using silicon nitride films and side wall spacers as masks. Thereafter, the side wall spacers lying on side walls of the silicon nitride films are removed and the substrate is subjected to thermal oxidation, whereby the surface of the substrate at a peripheral portion of each active region is subjected to so-called round processing so as to have a sectional shape having a convex rounded shape.

摘要翻译： 通过使用氮化硅膜和侧壁间隔物作为掩模的干蚀刻将沟槽限定在具有器件隔离区的衬底中。 此后，除去位于氮化硅膜侧壁上的侧壁隔离物，并对衬底进行热氧化，由此在每个有源区的周边部分的衬底表面进行所谓的圆形处理，以便 具有凸形圆形的截面形状。

公开(公告)号：US06635945B1

公开(公告)日：2003-10-21

申请号：US09580953

申请日：2000-05-30

申请人： Norio Ishitsuka ,  Hideo Miura ,  Shuji Ikeda ,  Yasuko Yoshida ,  Norio Suzuki ,  Kozo Watanabe ,  Kenji Kanamitsu

发明人： Norio Ishitsuka ,  Hideo Miura ,  Shuji Ikeda ,  Yasuko Yoshida ,  Norio Suzuki ,  Kozo Watanabe ,  Kenji Kanamitsu

IPC分类号： H01L2900

CPC分类号： H01L21/76232 ,  H01L29/0657

摘要： A semiconductor device and process of forming the device are described. The process includes forming a pad oxide film on the circuit-forming side of a semiconductor substrate; forming an oxidation prevention film on the pad oxide film; removing the oxidation prevention film and the pad oxide film at a desired position, thereby exposing the surface of the semiconductor substrate; horizontally recessing the pad oxide film; etching the exposed surface of the semiconductor substrate by isotropic etching; forming a trench to a desired depth, using the oxidation prevention film as a mask; horizontally recessing the pad oxide film; and oxidizing the trench formed in the semiconductor substrate. The produced device has round upper trench edges obtained by conducting isotropic etching of the exposed surface of the semiconductor substrate and horizontally recessing of the pad oxide film before the oxidation of the trench, whereby only one oxidation step is required.

摘要翻译： 描述半导体器件和形成器件的工艺。 该工艺包括在半导体衬底的电路形成侧上形成衬垫氧化膜; 在衬垫氧化膜上形成氧化防止膜; 在期望的位置除去氧化防止膜和焊盘氧化膜，从而暴露半导体衬底的表面; 使衬垫氧化膜水平地凹陷; 通过各向同性蚀刻蚀刻半导体衬底的暴露表面; 使用氧化防止膜作为掩模，形成期望深度的沟槽; 使衬垫氧化膜水平地凹陷; 以及氧化在半导体衬底中形成的沟槽。 所制造的器件具有圆形的上沟槽边缘，其通过对半导体衬底的暴露表面进行各向同性蚀刻并在沟槽氧化之前水平凹陷焊盘氧化膜而获得，由此仅需要一个氧化步骤。