公开(公告)号：US20050030270A1

公开(公告)日：2005-02-10

申请号：US10902793

申请日：2004-08-02

申请人： Kazuhiko Miyata ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi

发明人： Kazuhiko Miyata ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi

IPC分类号： G02F1/133 ,  G09G3/20 ,  G09G3/36 ,  H03M1/08 ,  H03M1/76 ,  H04N5/60 ,  H04N5/63

CPC分类号： G09G3/3685 ,  G09G2310/027

摘要： A liquid crystal display device provided with an audio signal processing function, which includes an audio signal processing circuit with a large S/N ratio and a small glitch is provided. The display device of the invention includes a resistor string D/A converter circuit whose dynamic range can be increased by using a common power supply for a D/A converter circuit and a signal line driver circuit. Accordingly, a glitch generated in the D/A converter circuit can be reduced relatively to an audio signal and an S/N ratio of the D/A converted signal can thus be increased.

摘要翻译： 提供具有音频信号处理功能的液晶显示装置，其包括具有大的S / N比和小毛刺的音频信号处理电路。 本发明的显示装置包括电阻串D / A转换电路，其动态范围可以通过使用用于D / A转换器电路和信号线驱动电路的公共电源来增加。 因此，可以相对于音频信号减小在D / A转换器电路中产生的毛刺，从而可以增加D / A转换信号的S / N比。

公开(公告)号：US5887625A

公开(公告)日：1999-03-30

申请号：US801431

申请日：1997-02-17

申请人： Kei Takahashi

发明人： Kei Takahashi

IPC分类号： F24S10/60 ,  F28D1/02 ,  F28D1/03 ,  F28F1/02 ,  F15D1/14

CPC分类号： F28D1/0246 ,  F28D1/0366 ,  F28F2225/04 ,  F28F2240/00

摘要： A flat pipe includes a hollow body having a pair of upper and lower walls extending substantially parallel to each other, and opposite lateral sides joined thereto, and a plurality of spacers closely fit between the upper and lower walls of the body and interconnected by a permeable sheet. The spacers are arranged at equal intervals to define a plurality of parallel fluid passages. The spacers are fused to opposite sides of the sheet in alternating relationship so that the sheet is inclined between adjacent spacers. The spacers are resistant to compression and deformation.

摘要翻译： 平管包括中空体，该中空体具有一对基本上彼此平行延伸的上壁和下壁，以及与其相连接的相对的侧面，以及多个间隔件，其紧密地配合在主体的上壁和下壁之间， 片。 间隔件以相等的间隔布置以限定多个平行的流体通道。 间隔件以交替的关系熔合到片材的相对侧，使得片材在相邻隔片之间倾斜。 间隔件抵抗压缩和变形。

公开(公告)号：US5769068A

公开(公告)日：1998-06-23

申请号：US803017

申请日：1997-02-21

申请人： Kei Takahashi

发明人： Kei Takahashi

IPC分类号： F24J2/52 ,  F28F9/007 ,  F24J2/00

CPC分类号： F24J2/5241 ,  F24J2/5228 ,  F24J2002/5286 ,  F24J2002/5292 ,  Y02E10/47

摘要： An apparatus for supporting a solar collector unit comprises a pair of spaced carriers, and a support net for supporting a solar collector unit thereon. The support net includes a set of longitudinal wires extending between the carriers, and a set of transverse wires extending in a direction transverse to the longitudinal wires and welded thereto. A pair of tension mechanisms are mounted to the carriers to adjust the tension of the longitudinal wires. The tension mechanisms include holders for holding opposite ends of the longitudinal wires between the carriers, and fasteners operatively associated with the holders to adjust the tension of the longitudinal wires so that the longitudinal wires are aligned in a transverse direction.

摘要翻译： 用于支撑太阳能收集器单元的装置包括一对间隔的载体，以及用于在其上支撑太阳能收集器单元的支撑网。 支撑网包括在载体之间延伸的一组纵向线，以及一组在垂直于纵向线并且与其焊接的方向上延伸的横向线。 一对张紧机构安装到载体上以调节纵向丝线的张力。 张紧机构包括保持器，用于保持载体之间的纵向线的相对端，以及与保持器可操作地相关联的紧固件以调节纵向线的张力，使得纵向线在横向方向上对准。

公开(公告)号：US09216193B2

公开(公告)日：2015-12-22

申请号：US13818848

申请日：2011-08-23

申请人： Masamichi Hashimoto ,  Tadashi Morikawa ,  Yoshiaki Miyata ,  Akio Ohno ,  Kei Takahashi ,  Daisuke Ogasawara ,  Kenji Fujii ,  Teruaki Kakema ,  Mariko Takeda

发明人： Masamichi Hashimoto ,  Tadashi Morikawa ,  Yoshiaki Miyata ,  Akio Ohno ,  Kei Takahashi ,  Daisuke Ogasawara ,  Kenji Fujii ,  Teruaki Kakema ,  Mariko Takeda

IPC分类号： A61K31/727 ,  A61K31/728 ,  C08B37/08 ,  C08L5/08 ,  A61K8/73 ,  A61K9/00

CPC分类号： A61K31/728 ,  A61K8/735 ,  A61K9/0019 ,  A61K9/0024 ,  A61K2800/87 ,  A61K2800/91 ,  A61Q19/08 ,  C08B37/0072 ,  C08L5/08 ,  Y10T428/2982

摘要： The present invention provides a crosslinked hyaluronic acid composition including self-crosslinking hyaluronic acid particles having an equilibrium swelling capacity of 3-fold to 10-fold, and an aqueous solvent, wherein a dry weight of the self-crosslinking hyaluronic acid particles based on the total volume of the crosslinked hyaluronic acid composition is 3 w/v % to 8 w/v %.The crosslinked hyaluronic acid composition of the invention uses self-crosslinking hyaluronic acid particles of which the equilibrium swelling capacity is within the above predetermined range. Accordingly, the viscosity does not sharply increase even if the concentration thereof is increased. Therefore, if the crosslinked hyaluronic acid composition is applied to an injection, it is possible to obtain a sufficient curative effect on knee osteoarthritis even with a small frequency of administration.

摘要翻译： 本发明提供一种交联透明质酸组合物，其包含平衡溶胀能力为3倍至10倍的自交联透明质酸颗粒和水性溶剂，其中基于所述自交联透明质酸颗粒的干重 交联透明质酸组合物的总体积为3w / v％至8w / v％。 本发明的交联透明质酸组合物使用自交联透明质酸颗粒，其平衡溶胀能力在上述预定范围内。 因此，即使其浓度增加，粘度也不会急剧增加。 因此，如果将交联透明质酸组合物应用于注射剂，则即使施用次数较少，也可以获得对膝关节骨性关节炎的充分治疗效果。

公开(公告)号：US09006728B2

公开(公告)日：2015-04-14

申请号：US12894911

申请日：2010-09-30

申请人： Shunpei Yamazaki ,  Kei Takahashi ,  Yoshiaki Ito

发明人： Shunpei Yamazaki ,  Kei Takahashi ,  Yoshiaki Ito

IPC分类号： H01L29/12 ,  H01L29/04 ,  H01L31/036 ,  H01L29/66 ,  H01L29/417 ,  H01L29/423 ,  H01L29/786

CPC分类号： H01L29/7869 ,  H01L27/1251 ,  H01L29/045 ,  H01L29/0611 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66477 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78642 ,  H01L29/78648 ,  H01L29/78693 ,  H01L29/78696

摘要： It is an object to provide a semiconductor device having a new productive semiconductor material and a new structure. The semiconductor device includes a first conductive layer over a substrate, a first insulating layer which covers the first conductive layer, an oxide semiconductor layer over the first insulating layer that overlaps with part of the first conductive layer and has a crystal region in a surface part, second and third conductive layers formed in contact with the oxide semiconductor layer, an insulating layer which covers the oxide semiconductor layer and the second and third conductive layers, and a fourth conductive layer over the insulating layer that overlaps with part of the oxide semiconductor layer.

摘要翻译： 本发明的目的是提供一种具有新的生产半导体材料和新结构的半导体器件。 半导体器件包括：衬底上的第一导电层，覆盖第一导电层的第一绝缘层，与第一导电层的一部分重叠的第一绝缘层上的氧化物半导体层，并且在表面部分中具有晶体区域 形成为与氧化物半导体层接触的第二和第三导电层，覆盖氧化物半导体层和第二和第三导电层的绝缘层，以及绝缘层上的与氧化物半导体层的一部分重叠的第四导电层 。

公开(公告)号：US08134355B2

公开(公告)日：2012-03-13

申请号：US12571938

申请日：2009-10-01

申请人： Hiroki Inoue ,  Kei Takahashi

发明人： Hiroki Inoue ,  Kei Takahashi

IPC分类号： G05F3/26 ,  G05F3/28

CPC分类号： G05F3/24 ,  G06K19/0701 ,  G06K19/07749

摘要： A semiconductor device monitors a voltage between a reference potential and an input potential and obtains a constant output potential regardless of a value of the voltage, after the voltage exceeds a predetermined threshold voltage in such a manner that the semiconductor device divides a voltage between the reference potential and the input potential using a plurality of first non-linear elements and at least one linear element to constantly generate a first bias voltage regardless of a value of the voltage, divides a voltage between the reference potential and the input potential using a plurality of second non-linear elements with reference to the first bias voltage to constantly generate a second bias voltage regardless of a value of the voltage, and determines the output potential with reference to the second bias voltage.

摘要翻译： 半导体器件监视参考电位和输入电位之间的电压，并且在电压超过预定阈值电压之后，获得恒定的输出电位，而不管电压值如何，使得半导体器件将参考电压 使用多个第一非线性元件和至少一个线性元件的电位和输入电位以恒定地产生第一偏置电压而不管电压的值，使用多个第一非线性元件和多个第一非线性元件来分配参考电位和输入电位之间的电压 参考第一偏置电压的第二非线性元件，以恒定地产生第二偏置电压，而不管电压的值，并且参考第二偏置电压确定输出电位。

公开(公告)号：US20120042926A1

公开(公告)日：2012-02-23

申请号：US13212395

申请日：2011-08-18

申请人： Kazuo Nishi ,  Yasushi Maeda ,  Ryosuke Motoyoshi ,  Yuji Oda ,  Kei Takahashi ,  Yoshiaki Ito ,  Tatsuji Nishijima

发明人： Kazuo Nishi ,  Yasushi Maeda ,  Ryosuke Motoyoshi ,  Yuji Oda ,  Kei Takahashi ,  Yoshiaki Ito ,  Tatsuji Nishijima

IPC分类号： H01L31/05 ,  H01L31/18

CPC分类号： H01L31/075 ,  H01L31/02008 ,  H01L31/046 ,  H01L31/0504 ,  Y02E10/548

摘要： A photoelectric conversion module in which an output voltage defect is suppressed is obtained by forming in parallel over a substrate n number (n is a natural number) of integrated photoelectric conversion devices each including a plurality of cells that are connected in series, and electrically connecting in parallel n−1 number or less of integrated photoelectric conversion devices with normal electrical characteristics and excluding an integrated photoelectric conversion device with a characteristic defect such as a short-circuit between top and bottom electrodes or a leak current due to a structural defect or the like formed in a semiconductor layer or the like.

摘要翻译： 通过在基板上平行地形成n个（n为自然数）的集成光电转换装置，其中包含多个串联连接的单元，并且电连接，得到抑制输出电压缺陷的光电转换模块 并联n-1个或更少的具有正常电特性的集成光电转换装置，并且不包括具有诸如顶部和底部电极之间的短路的特性缺陷或由于结构缺陷引起的漏电流的集成光电转换装置 如在半导体层等中形成的。

公开(公告)号：US20110101331A1

公开(公告)日：2011-05-05

申请号：US12904579

申请日：2010-10-14

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC分类号： H01L29/78

CPC分类号： H01L29/7869 ,  H01L21/84 ,  H01L23/552 ,  H01L23/60 ,  H01L23/66 ,  H01L25/16 ,  H01L27/0222 ,  H01L27/10873 ,  H01L27/12 ,  H01L27/1225 ,  H01L28/20 ,  H01L28/60 ,  H01L29/78609 ,  H01L2223/6677 ,  H01L2924/0002 ,  H01L2924/00

摘要： An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit included in an LSI, a CPU, or a memory is manufactured using the transistor which is formed using an oxide semiconductor which is an intrinsic or substantially intrinsic semiconductor obtained by removal of impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than a silicon semiconductor, and is formed over a semiconductor substrate. With the transistor which is formed over the semiconductor substrate and includes the highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device whose power consumption due to leakage current is low can be realized.

摘要翻译： 目的是减少用于LSI，CPU或存储器的晶体管的泄漏电流和寄生电容。 包括在LSI，CPU或存储器中的半导体集成电路使用使用氧化物半导体形成的晶体管来制造，所述氧化物半导体是通过从作为电子给体（供体）中除去作为电子给体（供体）的杂质而获得的内在或本质上的半导体 氧化物半导体，并且具有比硅半导体更大的能隙，并且形成在半导体衬底上。 通过形成在半导体衬底上的晶体管，并且包括具有充分降低的氢浓度的高度净化的氧化物半导体层，可以实现其由漏电流引起的功率消耗低的半导体器件。

公开(公告)号：US20110089414A1

公开(公告)日：2011-04-21

申请号：US12904565

申请日：2010-10-14

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hiroyuki Miyake ,  Kei Takahashi ,  Kouhei Toyotaka ,  Masashi Tsubuku ,  Kosei Noda ,  Hideaki Kuwabara

IPC分类号： H01L29/12

CPC分类号： H01L29/26 ,  G06K19/07758 ,  G11C7/00 ,  G11C19/28 ,  H01L21/8236 ,  H01L23/66 ,  H01L27/0883 ,  H01L27/1225 ,  H01L29/24 ,  H01L29/66969 ,  H01L29/78609 ,  H01L29/7869 ,  H01L29/78696 ,  H01L2223/6677 ,  H02M3/07

摘要： An object is to reduce leakage current and parasitic capacitance of a transistor used for an LSI, a CPU, or a memory. A semiconductor integrated circuit such as an LSI, a CPU, or a memory is manufactured using a thin film transistor in which a channel formation region is formed using an oxide semiconductor which becomes an intrinsic or substantially intrinsic semiconductor by removing impurities which serve as electron donors (donors) from the oxide semiconductor and has larger energy gap than that of a silicon semiconductor. With use of a thin film transistor using a highly purified oxide semiconductor layer with sufficiently reduced hydrogen concentration, a semiconductor device with low power consumption due to leakage current can be realized.

摘要翻译： 目的是减少用于LSI，CPU或存储器的晶体管的泄漏电流和寄生电容。 使用薄膜晶体管制造诸如LSI，CPU或存储器的半导体集成电路，其中使用氧化物半导体形成沟道形成区域，该氧化物半导体通过去除作为电子给体的杂质而成为本征或本质上的半导体 （供体），并且具有比硅半导体更大的能隙。 通过使用具有充分降低的氢浓度的高度净化的氧化物半导体层的薄膜晶体管，可以实现由于漏电流而具有低功耗的半导体器件。

公开(公告)号：US20110068852A1

公开(公告)日：2011-03-24

申请号：US12888064

申请日：2010-09-22

申请人： Shunpei Yamazaki ,  Kei Takahashi ,  Yoshiaki Ito

发明人： Shunpei Yamazaki ,  Kei Takahashi ,  Yoshiaki Ito

IPC分类号： G05F1/10 ,  H01L29/26 ,  H01L21/20

CPC分类号： H01L29/7869 ,  H01L21/0237 ,  H01L21/02554 ,  H01L21/02565 ,  H01L29/04 ,  H01L29/24 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969

摘要： The semiconductor device includes a first conductive layer over a substrate; an oxide semiconductor layer which covers the first conductive layer; a second conductive layer in a region which is not overlapped with the first conductive layer over the oxide semiconductor layer; an insulating layer which covers the oxide semiconductor layer and the second conductive layer; and a third conductive layer in a region including at least a region which is not overlapped with the first conductive layer or the second conductive layer over the insulating layer.

摘要翻译： 半导体器件包括在衬底上的第一导电层; 覆盖所述第一导电层的氧化物半导体层; 在与所述氧化物半导体层上的所述第一导电层不重叠的区域中的第二导电层; 覆盖氧化物半导体层和第二导电层的绝缘层; 以及在绝缘层上至少包括不与第一导电层或第二导电层重叠的区域的区域中的第三导电层。