公开(公告)号：US20130155390A1

公开(公告)日：2013-06-20

申请号：US13679128

申请日：2012-11-16

申请人： Earl Jensen ,  Kevin O'Brien ,  Farhat Quli ,  Mei Sun

发明人： Earl Jensen ,  Kevin O'Brien ,  Farhat Quli ,  Mei Sun

IPC分类号： G01B11/06

CPC分类号： G01B11/06 ,  G01B9/02051 ,  G01B11/0625 ,  G01B11/0641 ,  G01B11/0675 ,  G01B11/0683

摘要： A measurement unit comprising a light source and a photodetector may be formed in a cavity in a substrate. The light source produces light that impinges a material layer and is reflected back to the photodetector. Through methods such as interferometry and ellipsometry, the thickness of the material layer may be calculated from the light intensity data measured by the photodetector. It is emphasized that this abstract is provided to comply with the rules requiring an abstract that will allow a searcher or other reader to quickly ascertain the subject matter of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims.

摘要翻译： 包括光源和光电检测器的测量单元可以形成在基板中的空腔中。 光源产生照射材料层并被反射回光电检测器的光。 通过诸如干涉测量和椭偏仪的方法，材料层的厚度可以由光电检测器测量的光强度数据计算。 要强调的是，该摘要被提供以符合要求抽象的规则，允许搜索者或其他读者快速确定技术公开内容的主题。 提交它的理解是，它不会用于解释或限制权利要求的范围或含义。

公开(公告)号：US20070105383A1

公开(公告)日：2007-05-10

申请号：US11620516

申请日：2007-01-05

申请人： Robert Meagley ,  Heidi Cao ,  Kevin O'Brien

发明人： Robert Meagley ,  Heidi Cao ,  Kevin O'Brien

IPC分类号： H01L21/302

CPC分类号： G03F7/091 ,  G03F7/0045

摘要： A semiconductor process technique to help reduce semiconductor process effects, such as undesired line edge roughness, insufficient lithographical resolution, and limited depth of focus problems associated with the removal of a photoresist layer. More particularly, embodiments of the invention use a photoacid generator (PAG) material in conjunction with a sacrificial light absorbing material (SLAM) to help reduce these and other undesired effects associated with the removal of photoresist in a semiconductor manufacturing process. Furthermore, embodiments of the invention allow a PAG to be applied in a semiconductor manufacturing process in an efficient manner, requiring fewer processing operations than typical prior art techniques.

摘要翻译： 有助于减少半导体工艺效应的半导体工艺技术，例如不期望的线边缘粗糙度，光刻分辨率不足以及与去除光致抗蚀剂层相关的有限的焦深问题。 更具体地，本发明的实施例使用光致酸产生剂（PAG）材料结合牺牲光吸收材料（SLAM）来帮助减少在半导体制造过程中与去除光致抗蚀剂有关的这些和其它不期望的影响。 此外，本发明的实施例允许PAG以有效的方式应用于半导体制造过程中，与典型的现有技术相比需要较少的处理操作。

公开(公告)号：US20070098896A1

公开(公告)日：2007-05-03

申请号：US11633860

申请日：2006-12-04

申请人： Kevin O'Brien ,  Stephan Letts ,  Christopher Spadaccini ,  Jeffrey Morse ,  Steven Buckley ,  Larry Fischer ,  Keith Wilson

发明人： Kevin O'Brien ,  Stephan Letts ,  Christopher Spadaccini ,  Jeffrey Morse ,  Steven Buckley ,  Larry Fischer ,  Keith Wilson

IPC分类号： C23C16/00

CPC分类号： B01D69/10 ,  B01D53/228 ,  B01D69/125 ,  B01D71/64 ,  B01D2323/26 ,  B01D2323/40 ,  B01D2323/42 ,  B05D1/60 ,  C08G69/26

摘要： A system of fabricating a composite membrane from a membrane substrate using solvent-less vapor deposition followed by in-situ polymerization. A first monomer and a second monomer are directed into a mixing chamber in a deposition chamber. The first monomer and the second monomer are mixed in the mixing chamber providing a mixed first monomer and second monomer. The mixed first monomer and second monomer are solvent-less vapor deposited onto the membrane substrate in the deposition chamber. The membrane substrate and the mixed first monomer and second monomer are heated to produce in-situ polymerization and provide the composite membrane.

摘要翻译： 一种使用无溶剂蒸气沉积，然后进行原位聚合从膜基材制造复合膜的系统。 将第一单体和第二单体引入沉积室中的混合室中。 第一单体和第二单体在混合室中混合，提供混合的第一单体和第二单体。 混合的第一单体和第二单体在沉积室中无溶剂地沉积到膜基材上。 加热膜底物和混合的第一单体和第二单体以产生原位聚合并提供复合膜。

公开(公告)号：US20060223300A1

公开(公告)日：2006-10-05

申请号：US11096860

申请日：2005-03-31

申请人： Harsono Simka ,  Juan Dominguez ,  Steven Johnston ,  Adrien Lavoie ,  Kevin O'Brien

发明人： Harsono Simka ,  Juan Dominguez ,  Steven Johnston ,  Adrien Lavoie ,  Kevin O'Brien

IPC分类号： H01L21/4763

CPC分类号： H01L21/28556 ,  C23C16/18 ,  H01L21/28562 ,  H01L21/76843 ,  H01L21/76846 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76858 ,  H01L21/76862 ,  H01L21/76864 ,  H01L21/76871 ,  H01L21/76873

摘要： Chemical phase deposition processes utilizing organometallic precursors to form thin films are herein described. The organometallic precursors may include a single metal center or multiple metal centers. The chemical phase deposition may be chemical vapor deposition (CVD), atomic layer deposition (ALD), or hybrid CVD and ALD. The use of these chemical phase deposition processes with the organometallic precursors allows for the conformal deposition of films within openings having widths of less than 100 nm and more particularly less than 50 nm to form thin films such as barrier layers, seed layers, and adhesion layers.

摘要翻译： 在此描述利用有机金属前体形成薄膜的化学相沉积方法。 有机金属前体可以包括单个金属中心或多个金属中心。 化学相沉积可以是化学气相沉积（CVD），原子层沉积（ALD）或混合CVD和ALD。 这些化学相沉积方法与有机金属前体的使用允许膜在宽度小于100nm，更特别地小于50nm的开口内的共形沉积，以形成薄膜，例如阻挡层，种子层和粘附层 。

公开(公告)号：US20060216634A1

公开(公告)日：2006-09-28

申请号：US11087181

申请日：2005-03-22

申请人： Robert Meagley ,  Heidi Cao ,  Kevin O'Brien

发明人： Robert Meagley ,  Heidi Cao ,  Kevin O'Brien

IPC分类号： G03C1/00

CPC分类号： G03F7/091 ,  G03F7/0045

摘要： A semiconductor process technique to help reduce semiconductor process effects, such as undesired line edge roughness, insufficient lithographical resolution, and limited depth of focus problems associated with the removal of a photoresist layer. More particularly, embodiments of the invention use a photoacid generator (PAG) material in conjunction with a sacrificial light absorbing material (SLAM) to help reduce these and other undesired effects associated with the removal of photoresist in a semiconductor manufacturing process. Furthermore, embodiments of the invention allow a PAG to be applied in a semiconductor manufacturing process in an efficient manner, requiring fewer processing operations than typical prior art techniques.

摘要翻译： 有助于减少半导体工艺效应的半导体工艺技术，例如不期望的线边缘粗糙度，光刻分辨率不足以及与去除光致抗蚀剂层相关的有限的焦深问题。 更具体地，本发明的实施例使用光致酸产生剂（PAG）材料结合牺牲光吸收材料（SLAM）来帮助减少在半导体制造过程中与去除光致抗蚀剂有关的这些和其它不期望的影响。 此外，本发明的实施例允许PAG以有效的方式应用于半导体制造过程中，与典型的现有技术相比需要较少的处理操作。

公开(公告)号：US20060205221A1

公开(公告)日：2006-09-14

申请号：US11417615

申请日：2006-05-03

申请人： Michael Goodner ,  Robert Meagley ,  Kevin O'Brien

发明人： Michael Goodner ,  Robert Meagley ,  Kevin O'Brien

IPC分类号： H01L21/465

CPC分类号： H01L21/76808 ,  H01L21/31144 ,  H01L21/76802

摘要： Several techniques are described for modulating the etch rate of a sacrificial light absorbing material (SLAM) by altering its composition so that it matches the etch rate of a surrounding dielectric. This particularly useful in a dual damascene process where the SLAM fills a via opening and is etched along with a surrounding dielectric material to form trenches overlying the via opening.

公开(公告)号：US20060144438A1

公开(公告)日：2006-07-06

申请号：US11097061

申请日：2005-03-31

申请人： Daniel Dresselhaus ,  Kevin O'Brien

发明人： Daniel Dresselhaus ,  Kevin O'Brien

IPC分类号： F16K31/02 ,  H01H35/00 ,  G01N27/22

CPC分类号： F16K37/0091 ,  G01N27/223 ,  G01N33/246 ,  Y10T137/189 ,  Y10T307/766

摘要： Moisture sensor devices and methods associated with operation of the moisture sensor devices are disclosed herein. One embodiment includes a moisture sensor and controller device adapted to be placed in soil comprising a switch adapted to be coupled to a power control line of an irrigation controller, the power control line for sending an activating power signal to an irrigation valve; a control circuit coupled to the switch; and a sensor circuit coupled to the control circuit and adapted to provide a signal to the control circuit, the signal corresponding to a moisture level of the soil; wherein the control circuit is adapted to control the switch to interrupt the activating power signal based on the signal from the sensor circuit; wherein the switch and the control circuit are both external to the irrigation controller.

摘要翻译： 本文公开了与湿度传感器装置的操作相关联的水分传感器装置和方法。 一个实施例包括适于放置在土壤中的湿度传感器和控制器装置，包括适于耦合到冲洗控制器的功率控制线的开关，所述功率控制线用于将激活功率信号发送到冲洗阀; 耦合到所述开关的控制电路; 以及耦合到所述控制电路并且适于向所述控制电路提供信号的传感器电路，所述信号对应于所述土壤的湿度水平; 其中所述控制电路适于基于来自所述传感器电路的信号来控制所述开关中断所述启动功率信号; 其中所述开关和所述控制电路都在所述灌溉控制器的外部。

公开(公告)号：US20060040492A1

公开(公告)日：2006-02-23

申请号：US10922617

申请日：2004-08-20

申请人： Michael Goodner ,  Kevin O'Brien ,  Grant Kloster

发明人： Michael Goodner ,  Kevin O'Brien ,  Grant Kloster

IPC分类号： H01L21/4763 ,  H01L21/44

CPC分类号： H01L21/76807 ,  H01L21/7682

摘要： A method of forming air gaps in the interconnect structure of an integrated circuit device. The air gaps may be formed by depositing sacrificial layer over a dielectric layer and then depositing a permeable hard mask over the sacrificial layer. The sacrificial layer is subsequently removed to form air gaps. The permeable hard mask may have a thickness of less than approximately 250 nm, and internal stresses within the permeable hard mask may be controlled to prevent deformation of this layer. Other embodiments are described and claimed.

摘要翻译： 一种在集成电路器件的互连结构中形成气隙的方法。 气隙可以通过在介电层上沉积牺牲层然后在牺牲层上沉积可渗透的硬掩模来形成。 随后去除牺牲层以形成气隙。 可渗透的硬掩模可以具有小于约250nm的厚度，并且可以控制可渗透硬掩模内的内应力以防止该层的变形。 描述和要求保护其他实施例。

公开(公告)号：US20050181631A1

公开(公告)日：2005-08-18

申请号：US11101688

申请日：2005-04-08

申请人： Steven Johnston ,  Kevin O'Brien

发明人： Steven Johnston ,  Kevin O'Brien

IPC分类号： H01L21/033 ,  H01L21/316 ,  H01L21/768 ,  H01L21/469

CPC分类号： H01L21/3105 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02351 ,  H01L21/0337 ,  H01L21/76807 ,  H01L21/7682 ,  H01L21/76825 ,  H01L21/76829 ,  H01L21/76832

摘要： An interlayer dielectric may be exposed to a gas cluster ion beam to densify an upper layer of the interlayer dielectric. As a result, the upper layer of the interlayer dielectric may be densified without separate deposition steps and without the need for etch stops that may adversely affect the capacitance of the overall structure.

摘要翻译： 可以将层间电介质暴露于气体簇离子束以致致密层间电介质的上层。 结果，层间电介质的上层可以在没有单独的沉积步骤的情况下被致密化，并且不需要可能不利地影响整个结构的电容的蚀刻停止。

公开(公告)号：US06927180B2

公开(公告)日：2005-08-09

申请号：US10306066

申请日：2002-11-27

申请人： Kevin O'Brien ,  David Gracias

发明人： Kevin O'Brien ,  David Gracias

IPC分类号： H01L21/768 ,  H01L23/532 ,  H05K1/02 ,  H01L21/31

CPC分类号： H01L23/5329 ,  H01L21/76829 ,  H01L2924/0002 ,  H05K1/024 ,  H01L2924/00

摘要： By exposing dielectrics to a strong electric field, anisotropic characteristics may be introduced into the dielectric. This may result in the dielectric having different dielectric constants in different directions. As integrated circuits scale, importance of line to line capacitance in one plane increases. Thus, in some embodiments, the dielectric constant of the oriented dielectric may be lower in the plane that controls line to line capacitance.

摘要翻译： 通过将电介质暴露于强电场，各向异性特性可能被引入到电介质中。 这可能导致电介质在不同方向上具有不同的介电常数。 随着集成电路规模的扩大，一个平面线对线电容的重​​要性增加。 因此，在一些实施例中，取向电介质的介电常数可以在控制线对电容的平面中较低。