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    Integrated Assemblies and Methods of Forming Integrated Assemblies
    51.
    发明申请
    Integrated Assemblies and Methods of Forming Integrated Assemblies 审中-公开

    公开(公告)号：US20190355711A1

    公开(公告)日：2019-11-21

    申请号：US16398433

    申请日：2019-04-30

    Applicant: Micron Technology, Inc.

    Inventor： Daniel Billingsley ,  Everett A. McTeer ,  Christopher W. Petz ,  Haoyu Li ,  John Mark Meldrim ,  Yongjun Jeff Hu

    IPC: H01L27/02 ,  G11C11/34 ,  H01L21/82 ,  H01L23/532 ,  H01L27/12 ,  G11C5/06

    Abstract: An integrated assembly includes an insulative mass with a first region adjacent to a second region. The first region has a greater amount of one or more inert interstitial elements incorporated therein than does the second region. Some embodiments include an integrated assembly which has vertically-extending channel material pillars, and which has memory cells along the channel material pillars. A conductive structure is under the channel material pillars. The conductive structure includes doped semiconductor material in direct contact with bottom regions of the channel material pillars. An insulative mass is along the bottom regions of the channel material pillars. The insulative mass has an upper region over a lower region. The lower region has a greater amount of one or more inert interstitial elements incorporated therein than does the upper region. Some embodiments include methods of forming integrated assemblies.

    Integrated Structures and Methods of Forming Integrated Structures
    55.
    发明申请
    Integrated Structures and Methods of Forming Integrated Structures 审中-公开

    公开(公告)号：US20190267390A1

    公开(公告)日：2019-08-29

    申请号：US16406504

    申请日：2019-05-08

    Applicant: Micron Technology, Inc.

    Inventor： Yongjun Jeff Hu ,  Allen McTeer

    IPC: H01L27/11524 ,  H01L27/11582 ,  H01L21/322 ,  H01L21/02 ,  H01L27/1157

    Abstract: Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.

    PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS
    57.
    发明申请
    PHASE CHANGE MEMORY STACK WITH TREATED SIDEWALLS 审中-公开

    公开(公告)号：US20190088867A9

    公开(公告)日：2019-03-21

    申请号：US15882666

    申请日：2018-01-29

    Applicant: Micron Technology, Inc.

    Inventor： Tsz W. Chan ,  Yongjun Jeff Hu ,  Swapnil Lengade ,  Shu Qin ,  Everett Allen McTeer

    IPC: H01L45/00 ,  G11C13/00 ,  H01L27/24

    Abstract: Memory devices and methods for fabricating memory devices have been disclosed. One such method includes forming the memory stack out of a plurality of elements. An adhesion species is formed on at least one sidewall of the memory stack wherein the adhesion species has a gradient structure that results in the adhesion species intermixing with an element of the memory stack to terminate unsatisfied atomic bonds of the element. The gradient structure further comprises a film of the adhesion species on an outer surface of the at least one sidewall. A dielectric material is implanted into the film of the adhesion species to form a sidewall

    Integrated Structures and Methods of Forming Integrated Structures
    60.
    发明申请
    Integrated Structures and Methods of Forming Integrated Structures 审中-公开

    公开(公告)号：US20170373076A1

    公开(公告)日：2017-12-28

    申请号：US15686107

    申请日：2017-08-24

    Applicant: Micron Technology, Inc.

    Inventor： Yongjun Jeff Hu ,  Allen McTeer

    IPC: H01L27/11524 ,  H01L21/02 ,  H01L21/322 ,  H01L27/1157

    CPC classification number: H01L27/11524 ,  H01L21/02672 ,  H01L21/3221 ,  H01L27/1157 ,  H01L27/11582

    Abstract: Some embodiments include an integrated structure having semiconductor material within a region between two parallel surfaces. The semiconductor material has grain boundaries parallel to the parallel surfaces. At least one circuit component utilizes a region of the semiconductor material in a gated device. The semiconductor material has little if any metal therein so that the gated device has Ion/Ioff characteristics similar to if the semiconductor material had no metal therein. Some embodiments include a method in which semiconductor material is provided between a pair of parallel surfaces, and in which the parallel surfaces and semiconductor material extend between a first end and a second end. Metal is formed adjacent the first end, and gettering material is formed adjacent the second end. Thermal processing induces crystallization of the semiconductor material and drives the metal along the semiconductor material and into the gettering material. The gettering material is then removed.

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