公开(公告)号：US20170012135A1

公开(公告)日：2017-01-12

申请号：US15211218

申请日：2016-07-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE

IPC: H01L29/786 ,  H01L29/66 ,  H01L27/12 ,  H01L29/49 ,  H01L29/51

Abstract: Provided is a semiconductor device having a structure with which a decrease in electrical characteristics that becomes more significant with miniaturization can be suppressed. The semiconductor device includes a first oxide semiconductor film, a gate electrode overlapping with the first oxide semiconductor film, a first gate insulating film between the first oxide semiconductor film and the gate electrode, and a second gate insulating film between the first gate insulating film and the gate electrode. In the first gate insulating film, a peak appears at a diffraction angle 2θ of around 28° by X-ray diffraction. A band gap of the first oxide semiconductor film is smaller than a band gap of the first gate insulating film, and the band gap of the first gate insulating film is smaller than a band gap of the second gate insulating film.

Abstract translation: 提供一种半导体器件，其具有可以抑制随着小型化而变得更显着的电特性的降低的结构。 半导体器件包括第一氧化物半导体膜，与第一氧化物半导体膜重叠的栅电极，第一氧化物半导体膜和栅极之间的第一栅极绝缘膜，以及在第一栅极绝缘膜和第二栅极绝缘膜之间的第二栅极绝缘膜 栅电极。 在第一栅极绝缘膜中，通过X射线衍射在约28°的衍射角2θ出现峰。 第一氧化物半导体膜的带隙小于第一栅极绝缘膜的带隙，第一栅极绝缘膜的带隙小于第二栅极绝缘膜的带隙。

公开(公告)号：US20160284856A1

公开(公告)日：2016-09-29

申请号：US15077029

申请日：2016-03-22

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Akihisa SHIMOMURA ,  Tetsuhiro TANAKA ,  Masayuki KIMURA ,  Ryo TOKUMARU ,  Daisuke MATSUBAYASHI ,  Yasumasa YAMANE

IPC: H01L29/786 ,  G02F1/1368 ,  H01L27/32 ,  H01L29/24 ,  H01L27/12

CPC classification number: H01L29/7869 ,  G02F1/1368 ,  H01L27/1225 ,  H01L27/3262 ,  H01L29/24 ,  H01L29/78603

Abstract: A semiconductor device including a miniaturized transistor is provided. The semiconductor device includes a first insulator, a second insulator, a semiconductor, and a conductor. The semiconductor is over the first insulator. The second insulator is over the semiconductor. The conductor is over the second insulator. The semiconductor includes a first region, a second region, and a third region. The first region is a region where the semiconductor overlaps with the conductor. Each of the second region and the third region is a region where the semiconductor does not overlap with the conductor. The second region and the third region each have a region with a spinel crystal structure.

Abstract translation: 提供了包括小型化晶体管的半导体器件。 半导体器件包括第一绝缘体，第二绝缘体，半导体和导体。 半导体在第一绝缘体之上。 第二绝缘体在半导体上。 导体在第二绝缘体之上。 半导体包括第一区域，第二区域和第三区域。 第一区域是半导体与导体重叠的区域。 第二区域和第三区域中的每一个都是半导体不与导体重叠的区域。 第二区域和第三区域各自具有尖晶石晶体结构的区域。

公开(公告)号：US20160056043A1

公开(公告)日：2016-02-25

申请号：US14829029

申请日：2015-08-18

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tetsuhiro TANAKA ,  Ryo TOKUMARU ,  Yasumasa YAMANE ,  Akihisa SHIMOMURA ,  Naoki OKUNO

IPC: H01L21/28 ,  H01L29/786 ,  H01L29/66 ,  H01L29/423

CPC classification number: H01L29/66742 ,  H01L29/42384 ,  H01L29/45 ,  H01L29/4908 ,  H01L29/78648 ,  H01L29/7869

Abstract: To provide a semiconductor device including an oxide semiconductor layer with high and stable electrical characteristics, the semiconductor device is manufactured by forming a first insulating layer, forming oxide over the first insulating layer and then removing the oxide n times (n is a natural number), forming an oxide semiconductor layer over the first insulating layer, forming a second insulating layer over the oxide semiconductor layer, and forming a conductive layer over the second insulating layer. Alternatively, the semiconductor device is manufactured by forming the oxide semiconductor layer over the first insulating layer, forming the second insulating layer over the oxide semiconductor layer, forming the oxide over the second insulating layer and then removing the oxide n times (n is a natural number), and forming the conductive layer over the second insulating layer.

Abstract translation: 为了提供包括具有高且稳定的电特性的氧化物半导体层的半导体器件，通过形成第一绝缘层，在第一绝缘层上形成氧化物，然后去除氧化物n次（n为自然数）来制造半导体器件， 在所述第一绝缘层上形成氧化物半导体层，在所述氧化物半导体层上形成第二绝缘层，以及在所述第二绝缘层上形成导电层。 或者，半导体器件通过在第一绝缘层上形成氧化物半导体层而形成，在氧化物半导体层上形成第二绝缘层，在第二绝缘层上形成氧化物，然后去除氧化物n次（n是自然的 数量），并且在第二绝缘层上形成导电层。

公开(公告)号：US20150364610A1

公开(公告)日：2015-12-17

申请号：US14733081

申请日：2015-06-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masashi TSUBUKU ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Masashi OOTA

IPC: H01L29/786 ,  H01L21/477 ,  H01L29/10 ,  H01L21/02 ,  H01L29/66 ,  H01L29/04

CPC classification number: H01L29/7869 ,  H01L21/02483 ,  H01L21/02488 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/477 ,  H01L21/84 ,  H01L27/1207 ,  H01L27/1225 ,  H01L27/1248 ,  H01L29/045 ,  H01L29/1033 ,  H01L29/41733 ,  H01L29/42384 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/78621 ,  H01L29/78696

Abstract: A semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film over the first oxide semiconductor film, a source electrode in contact with the second oxide semiconductor film, a drain electrode in contact with the second oxide semiconductor film, a metal oxide film over the second oxide semiconductor film, the source electrode, and the drain electrode, a gate insulating film over the metal oxide film, and a gate electrode over the gate insulating film. The metal oxide film contains M (M represents Ti, Ga, Y, Zr, La, Ce, Nd, or Hf) and Zn. The metal oxide film includes a portion where x/(x+y) is greater than 0.67 and less than or equal to 0.99 when a target has an atomic ratio of M:Zn=x:y.

Abstract translation: 半导体器件包括第一氧化物半导体膜，第一氧化物半导体膜上的第二氧化物半导体膜，与第二氧化物半导体膜接触的源极，与第二氧化物半导体膜接触的漏电极，金属氧化物膜 在第二氧化物半导体膜，源电极和漏极上，在金属氧化物膜上方的栅极绝缘膜，以及栅极绝缘膜上的栅电极。 金属氧化物膜含有M（M表示Ti，Ga，Y，Zr，La，Ce，Nd或Hf）和Zn。 当靶的原子比为M:Zn = x:y时，金属氧化物膜包括x /（x + y）大于0.67且小于或等于0.99的部分。

公开(公告)号：US20150091008A1

公开(公告)日：2015-04-02

申请号：US14567214

申请日：2014-12-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomokazu YOKOI ,  Yasumasa YAMANE

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/78609 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/20 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

Abstract: A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.

Abstract translation: 包括氧化物半导体并且能够进行高速操作的晶体管以及晶体管的制造方法。 此外，包括晶体管的高可靠性半导体器件和制造半导体器件的方法。 半导体器件包括具有沟道形成区域的氧化物半导体层以及被设置为使得沟道形成区域介于其间并具有比沟道形成区域更低的电阻的源极和漏极区域。 沟道形成区域和源极区域和漏极区域各自包括结晶区域。

公开(公告)号：US20150054548A1

公开(公告)日：2015-02-26

申请号：US14464966

申请日：2014-08-21

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi KATO ,  Yasuhiko TAKEMURA ,  Tetsuhiro TANAKA ,  Takayuki INOUE ,  Toshihiko TAKEUCHI ,  Yasumasa YAMANE ,  Shunpei YAMAZAKI

IPC: H03K19/00 ,  H01L21/324 ,  H01L27/115 ,  H03K19/003 ,  H01L29/792

CPC classification number: H01L29/792 ,  G11C16/0466 ,  H01L21/28282 ,  H01L27/1225 ,  H01L29/4234 ,  H01L29/66833 ,  H03K19/0013 ,  H03K19/17736

Abstract: A manufacturing method of a semiconductor device in which the threshold is adjusted is provided. In a semiconductor device including a plurality of transistors arranged in a matrix each including a semiconductor, a source or drain electrode electrically connected to the semiconductor, a gate electrode, and a charge trap layer between the gate electrode and the semiconductor, electrons are trapped in the charge trap layer by performing heat treatment and, simultaneously, keeping a potential of the gate electrode higher than that of the source or drain electrode for 1 second or more. By this process, the threshold increases and Icut decreases. A circuit that supplies a signal to the gate electrode (e.g., word line driver) is provided with a selection circuit formed of an OR gate, an XOR gate, or the like, whereby potentials of word lines can be simultaneously set higher than potentials of bit lines.

Abstract translation: 提供了其中调整阈值的半导体器件的制造方法。 在包括以矩阵形式排列的多个晶体管的半导体器件中，每个晶体管包括半导体，与该半导体电连接的源极或漏极，栅电极和栅电极与半导体之间的电荷陷阱层，电子被俘获在 通过进行热处理，同时使栅电极的电位比源极或漏极的电位高1秒以上。 通过该过程，阈值增加并且Icut减小。 向门电极（例如字线驱动器）提供信号的电路设置有由或门，异或门等形成的选择电路，由此可以将字线的电位同时设置为高于电位 位线。

公开(公告)号：US20240196713A1

公开(公告)日：2024-06-13

申请号：US18285303

申请日：2022-04-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takayuki IKEDA ,  Yuichi YANAGISAWA ,  Yasumasa YAMANE

IPC: H10K59/80 ,  G09G3/3225 ,  H10K59/38

CPC classification number: H10K59/8791 ,  G09G3/3225 ,  H10K59/38 ,  G09G2300/0852 ,  G09G2310/08

Abstract: A display device that has high display quality is provided. A highly reliable display device is provided. A display device with low power consumption is provided and a display device that can easily achieve a higher resolution is provided. A display device with both high display quality and a high resolution is provided. A display device with high contrast is provided. The display device includes a first layer, a second layer over the first layer, and a third layer over the second layer. The first layer includes a first transistor including silicon in a channel formation region. The second layer includes a second transistor including a metal oxide in a channel formation region. The third layer includes a first light-emitting element, a second light-emitting element, a third light-emitting element, an EL layer including a light-emitting layer exhibiting white light, a first coloring layer over the first light-emitting element, a second coloring layer over the second light-emitting element, and a third coloring layer over the third light-emitting element. Crosstalk is not observed between the second light-emitting element and the third light-emitting element.

公开(公告)号：US20240090253A1

公开(公告)日：2024-03-14

申请号：US18273122

申请日：2022-01-14

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei YAMAZAKI ,  Takayuki IKEDA ,  Kenichi OKAZAKI ,  Yasumasa YAMANE

IPC: H10K50/13

CPC classification number: H10K50/131

Abstract: A high-resolution display device is provided. A display device having both high display quality and high resolution is provided. The display device includes a first light-emitting element and a second light-emitting element. The first light-emitting element includes a first pixel electrode, a first EL layer, and a common electrode. The second light-emitting element includes a second pixel electrode, a second EL layer, and the common electrode. An insulating layer containing an inorganic insulating material is provided between the first pixel electrode and the second pixel electrode. The insulating layer includes a first region overlapping with the first EL layer, a second region overlapping with the second EL layer, and a third region positioned between the first region and the second region. A side surface of the first EL layer and a side surface of the second EL layer are positioned over the insulating layer to face each other. The common electrode is provided along the side surface of the first EL layer, the side surface of the second EL layer, and a top surface of the insulating layer. A width of the insulating layer is larger than or equal to 2 times and smaller than or equal to 4 times a distance between the first pixel electrode and the second pixel electrode.

公开(公告)号：US20240057462A1

公开(公告)日：2024-02-15

申请号：US18258104

申请日：2021-12-15

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shingo EGUCHI ,  Hiroki ADACHI ,  Kenichi OKAZAKI ,  Yasumasa YAMANE ,  Naoto KUSUMOTO ,  Kensuke YOSHIZUMI ,  Shunpei YAMAZAKI

IPC: H10K71/20 ,  H10K71/16 ,  H01L21/677 ,  G03F7/00

CPC classification number: H10K71/233 ,  H10K71/16 ,  H01L21/67706 ,  G03F7/0007

Abstract: Manufacturing equipment of a display device that is capable of successively performing steps from formation of a pixel circuit up to formation of a light-emitting element is provided. The manufacturing equipment includes a manufacturing apparatus of a light-emitting device that is capable of successively performing a film formation step, a lithography step, an etching step, and a sealing step for formation of an organic EL element and a manufacturing apparatus for formation of a pixel circuit that drives the organic EL element. Formation from the pixel circuit up to the organic EL element can be performed successively, so that a display device with a high yield and high reliability can be formed.

公开(公告)号：US20230307550A1

公开(公告)日：2023-09-28

申请号：US18020758

申请日：2021-08-17

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei YAMAZAKI ,  Yasumasa YAMANE ,  Yoshinori ANDO ,  Shigeki KOMORI ,  Ryota HODO ,  Tatsuya ONUKI ,  Shinya SASAGAWA

IPC: H01L29/786

CPC classification number: H01L29/78693

Abstract: A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes a first device layer to an n-th (n is a natural number of 2 or more) device layer, each of which includes a first barrier insulating film, a second barrier insulating film, a third barrier insulating film, an oxide semiconductor device, a first conductor, and a second conductor. In each of the first device layer to the n-th device layer, the oxide semiconductor device is placed over the first barrier insulating film, the second barrier insulating film is placed to cover the oxide semiconductor device, the first conductor is placed so as to be electrically connected to the oxide semiconductor device through an opening formed in the second barrier insulating film, the second conductor is placed over the first conductor, the third barrier insulating film is placed over the second conductor and the second barrier insulating film, and the first barrier insulating film to the third barrier insulating film have a function of inhibiting diffusion of hydrogen.