公开(公告)号：US20170133064A1

公开(公告)日：2017-05-11

申请号：US15341707

申请日：2016-11-02

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shuhei NAGATSUKA ,  Tomokazu YOKOI ,  Naoaki TSUTSUI ,  Kazuaki OHSHIMA ,  Tatsuya ONUKI

IPC: G11C7/06 ,  G11C7/10 ,  G11C8/10 ,  G11C7/12 ,  H01L27/115 ,  G11C5/06

CPC classification number: G11C7/065 ,  G11C5/063 ,  G11C7/10 ,  G11C7/12 ,  G11C7/18 ,  G11C8/10 ,  G11C8/14 ,  G11C11/403 ,  G11C11/4074 ,  G11C11/409 ,  G11C11/4094 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/14 ,  G11C16/24 ,  G11C16/30 ,  H01L27/11568 ,  H01L27/11578 ,  H01L27/11582

Abstract: A semiconductor device or a memory device with a reduced area, a large storage capacity, a high-speed operation, or low power consumption is provided. The semiconductor device includes a first transistor, a second transistor, a capacitor, a first wiring, a second wiring, a sense amplifier circuit, a decoder, a step-up circuit, a level shifter, and a buffer circuit. The first wiring is electrically connected to the buffer circuit and a second gate electrode of the first transistor. The second wiring is electrically connected to the sense amplifier circuit and the drain electrode of the second transistor. The capacitor is electrically connected to the drain electrode of the first transistor and the source electrode of the second transistor.

公开(公告)号：US20130270679A1

公开(公告)日：2013-10-17

申请号：US13908047

申请日：2013-06-03

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Tomokazu YOKOI ,  Takayuki INOUE ,  Makoto FURUNO

IPC: H01L29/12

CPC classification number: H01L29/12 ,  H01M4/0428 ,  H01M4/134 ,  H01M4/366 ,  H01M4/386

Abstract: Provided are a semiconductor film including silicon microstructures formed at high density, and a manufacturing method thereof. Further, provided are a semiconductor film including silicon microstructures whose density is controlled, and a manufacturing method thereof. Furthermore, a power storage device with improved charge-discharge capacity is provided. A manufacturing method in which a semiconductor film with a silicon layer including silicon structures is formed over a substrate with a metal surface is used. The thickness of a silicide layer formed by reaction between the metal and the silicon is controlled, so that the grain sizes of silicide grains formed at an interface between the silicide layer and the silicon layer are controlled and the shapes of the silicon structures are controlled. Such a semiconductor film can be applied to an electrode of a power storage device.

Abstract translation: 提供了包括以高密度形成的硅微结构的半导体膜及其制造方法。 此外，提供了包括其密度被控制的硅微结构的半导体膜及其制造方法。 此外，提供了具有改善的充放电容量的蓄电装置。 使用其中在具有金属表面的基板上形成具有包括硅结构的硅层的半导体膜的制造方法。 控制由金属与硅之间的反应形成的硅化物层的厚度，从而控制在硅化物层和硅层之间的界面处形成的硅化物晶粒的晶粒尺寸，并且控制硅结构的形状。 这样的半导体膜可以应用于蓄电装置的电极。

公开(公告)号：US20150091008A1

公开(公告)日：2015-04-02

申请号：US14567214

申请日：2014-12-11

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Tomokazu YOKOI ,  Yasumasa YAMANE

IPC: H01L29/786 ,  H01L21/02 ,  H01L29/66

CPC classification number: H01L29/78609 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02664 ,  H01L21/20 ,  H01L27/1225 ,  H01L29/66742 ,  H01L29/66969 ,  H01L29/78618 ,  H01L29/7869 ,  H01L29/78693

Abstract: A transistor which includes an oxide semiconductor and is capable of high-speed operation and a method of manufacturing the transistor. In addition, a highly reliable semiconductor device including the transistor and a method of manufacturing the semiconductor device. The semiconductor device includes an oxide semiconductor layer including a channel formation region, and a source and drain regions which are provided so that the channel formation region is interposed therebetween and have lower resistance than the channel formation region. The channel formation region and the source and drain regions each include a crystalline region.

Abstract translation: 包括氧化物半导体并且能够进行高速操作的晶体管以及晶体管的制造方法。 此外，包括晶体管的高可靠性半导体器件和制造半导体器件的方法。 半导体器件包括具有沟道形成区域的氧化物半导体层以及被设置为使得沟道形成区域介于其间并具有比沟道形成区域更低的电阻的源极和漏极区域。 沟道形成区域和源极区域和漏极区域各自包括结晶区域。

公开(公告)号：US20140342499A1

公开(公告)日：2014-11-20

申请号：US14451683

申请日：2014-08-05

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Junichi KOEZUKA ,  Shinji OHNO ,  Yuichi SATO ,  Sachiaki TEZUKA ,  Tomokazu YOKOI ,  Yusuke SHINO

IPC: H01L29/24 ,  H01L29/66 ,  H01L21/02 ,  H01L29/04

CPC classification number: H01L29/242 ,  H01L21/02565 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/84 ,  H01L27/10873 ,  H01L27/1156 ,  H01L27/1203 ,  H01L29/04 ,  H01L29/66757 ,  H01L29/7869

Abstract: The contact resistance between an oxide semiconductor film and a metal film is reduced. A transistor that uses an oxide semiconductor film and has excellent on-state characteristics is provided. A semiconductor device capable of high-speed operation is provided. In a transistor that uses an oxide semiconductor film, the oxide semiconductor film is subjected to nitrogen plasma treatment. Thus, part of oxygen included in the oxide semiconductor film is replaced with nitrogen, so that an oxynitride region is formed. A metal film is formed in contact with the oxynitride region. The oxynitride region has lower resistance than the other region of the oxide semiconductor film. In addition, the oxynitride region is unlikely to form high-resistance metal oxide at the interface with the contacting metal film.

Abstract translation: 氧化物半导体膜与金属膜之间的接触电阻降低。 提供了使用氧化物半导体膜并且具有优异的导通状态特性的晶体管。 提供能够进行高速运转的半导体装置。 在使用氧化物半导体膜的晶体管中，对氧化物半导体膜进行氮等离子体处理。 因此，氧化物半导体膜中包含的部分氧被氮代替，从而形成氧氮化物区。 形成与氧氮化物区域接触的金属膜。 氧氮化物区域的电阻比氧化物半导体膜的其他区域低。 此外，氧氮化物区域不可能在与接触金属膜的界面处形成高电阻金属氧化物。