公开(公告)号：US4107665A

公开(公告)日：1978-08-15

申请号：US809314

申请日：1977-06-23

申请人： Steven T. Mayer ,  Ronald E. Milner

发明人： Steven T. Mayer ,  Ronald E. Milner

IPC分类号： A63F13/00 ,  A63F13/04 ,  G09G5/26 ,  G09G5/36 ,  G06K15/20

CPC分类号： G09G5/26 ,  A63F13/00 ,  A63F13/55

摘要： Apparatus for continuous variation of object size on a raster type video screen in a television game. The input of a voltage controlled oscillator is varied by a game controller. The output of the oscillator drives horizontal and vertical counters at rates corresponding to the object size. These counters provide respectively horizontal and vertical addresses to a picture generator read only memory. The faster the counters are incremented the smaller the object; and with regard to the vertical address, horizontal lines of the picture are actually skipped in order to reduce the size of the object.

摘要翻译： 用于在电视游戏中的光栅型视频屏幕上连续变化物体大小的装置。 压控振荡器的输入由游戏控制器改变。 振荡器的输出以与对象大小相对应的速率驱动水平和垂直计数器。 这些计数器分别为图像发生器只读存储器提供水平和垂直地址。 计数器增加越快对象越小; 并且关于垂直地址，实际上跳过图片的水平线以减小对象的大小。

公开(公告)号：US20140199497A1

公开(公告)日：2014-07-17

申请号：US13741151

申请日：2013-01-14

申请人： Tighe A. Spurlin ,  Steven T. Mayer ,  Jonathan D. Reid ,  Artur Kolics ,  Huanfeng Zhu

发明人： Tighe A. Spurlin ,  Steven T. Mayer ,  Jonathan D. Reid ,  Artur Kolics ,  Huanfeng Zhu

IPC分类号： B05D3/10

CPC分类号： C23C18/1882 ,  C23C18/1653 ,  C25D5/34 ,  C25D21/12 ,  H01L21/76861 ,  H01L21/76873

摘要： Method and apparatus for reducing metal oxide surfaces to modified metal surfaces are disclosed. Metal oxide surfaces are reduced to form a film integrated with a metal seed layer by contacting a solution with a reducing agent with the metal oxide surfaces. The solution with the reducing agent can contact the metal oxide surfaces under conditions that form an integrated film with the metal seed layer, and that reduces reoxidation from exposure the ambient environment. In some embodiments, an additive can be included with the reducing agent to form a surface protecting layer on the metal seed layer. In some embodiments, the metal is copper used in damascene copper structures.

摘要翻译： 公开了将金属氧化物表面还原成改性金属表面的方法和装置。 通过使溶液与还原剂与金属氧化物表面接触，还原金属氧化物表面以形成与金属种子层一体化的膜。 具有还原剂的溶液可以在与金属种子层形成集成膜的条件下接触金属氧化物表面，并且减少暴露于周围环境中的再氧化。 在一些实施方案中，还原剂可以包含添加剂以在金属种子层上形成表面保护层。 在一些实施例中，金属是铜镶嵌铜结构中使用的铜。

公开(公告)号：US08470191B2

公开(公告)日：2013-06-25

申请号：US11890790

申请日：2007-08-06

申请人： Steven T. Mayer ,  Mark L. Rea ,  Richard S. Hill ,  Avishai Kepten ,  R. Marshall Stowell ,  Eric G. Webb

发明人： Steven T. Mayer ,  Mark L. Rea ,  Richard S. Hill ,  Avishai Kepten ,  R. Marshall Stowell ,  Eric G. Webb

IPC分类号： C23F1/02

CPC分类号： C25D17/14 ,  B23H5/08 ,  C25D5/02 ,  C25D5/06 ,  C25D5/08 ,  C25D5/34 ,  C25D7/123 ,  C25D17/001 ,  C25D17/06 ,  C25F3/16 ,  C25F3/30 ,  H01L21/02068 ,  H01L21/2885 ,  H01L21/32115 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/7684 ,  H01L21/76849 ,  H01L21/76877

摘要： Plating accelerator is applied selectively to a substantially-unfilled wide (e.g., low-aspect-ratio feature cavity. Then, plating of metal is conducted to fill the wide feature cavity and to form an embossed structure in which the height of a wide-feature metal protrusion over the metal-filled wide-feature cavity is higher than the height of metal over field regions. Most of the overburden metal is removed using non-contact techniques, such as chemical wet etching. Metal above the wide feature cavity protects the metal-filled wide-feature interconnect against dishing, and improved planarization techniques avoid erosion of the metal interconnect and dielectric insulating layer. In some embodiments, plating of metal onto a substrate is conducted to fill narrow (e.g., high-aspect-ratio feature cavities) in the dielectric layer before selective application of plating accelerator and filling of the wide feature cavity.

公开(公告)号：US08048280B2

公开(公告)日：2011-11-01

申请号：US11228712

申请日：2005-09-16

申请人： Steven T. Mayer ,  Vijay Bhaskaran ,  Evan E. Patton ,  Robert L. Jackson ,  Jonathan Reid

发明人： Steven T. Mayer ,  Vijay Bhaskaran ,  Evan E. Patton ,  Robert L. Jackson ,  Jonathan Reid

IPC分类号： C25D5/18 ,  C25D7/12 ,  H01L21/768

CPC分类号： C25D3/02 ,  C25D3/38 ,  C25D5/022 ,  C25D5/18 ,  H01L21/2885 ,  H01L21/76877 ,  H05K3/423

摘要： Several techniques are described for reducing or mitigating the formation of seams and/or voids in electroplating the interior regions of microscopic recessed features. Cathodic polarization is used to mitigate the deleterious effects of introducing a substrate plated with a seed layer into an electroplating solution. Also described are diffusion-controlled electroplating techniques to provide for bottom-up filling of trenches and vias, avoiding thereby sidewalls growing together to create seams/voids. A preliminary plating step is also described that plates a thin film of conductor on the interior surfaces of features leading to adequate electrical conductivity to the feature bottom, facilitating bottom-up filling.

摘要翻译： 描述了几种用于减少或减轻在电镀微观凹陷特征的内部区域中的接缝和/或空隙的形成的技术。 阴极极化用于减轻将电镀有种子层的基板引入电镀溶液中的有害影响。 还描述了扩散控制的电镀技术，以提供沟槽和通孔的自下而上的填充，从而避免由此侧壁一起生长以产生接缝/空隙。 还描述了初步电镀步骤，在特征的内表面上镀覆导电薄膜，导致特征底部具有足够的导电性，便于自底向上填充。

公开(公告)号：US08043958B1

公开(公告)日：2011-10-25

申请号：US12875857

申请日：2010-09-03

申请人： Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

发明人： Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

IPC分类号： H01L21/302 ,  H01L21/461 ,  B24B7/00

CPC分类号： H01L21/7684 ,  C23C18/1607 ,  C23C18/1882 ,  C25D5/02 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76831 ,  H01L21/76849 ,  H01L21/76883 ,  Y10S414/135

摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.

摘要翻译： 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。

公开(公告)号：US07967969B2

公开(公告)日：2011-06-28

申请号：US12578310

申请日：2009-10-13

申请人： Steven T. Mayer ,  Jonathan D. Reid

发明人： Steven T. Mayer ,  Jonathan D. Reid

IPC分类号： C25D5/00 ,  C25D7/12 ,  C25D21/12

CPC分类号： C25D17/12 ,  C25D7/123 ,  C25D17/001 ,  C25D17/008 ,  H01L21/2885 ,  Y10S204/07

摘要： A substantially uniform layer of a metal is electroplated onto a work piece having a seed layer thereon. This is accomplished by employing a “high resistance ionic current source,” which solves the terminal problem by placing a highly resistive membrane (e.g., a microporous ceramic or fretted glass element) in close proximity to the wafer, thereby swamping the system's resistance. The membrane thereby approximates a constant current source. By keeping the wafer close to the membrane surface, the ionic resistance from the top of the membrane to the surface is much less than the ionic path resistance to the wafer edge, substantially compensating for the sheet resistance in the thin metal film and directing additional current over the center and middle of the wafer.

摘要翻译： 将基本上均匀的金属层电镀在其上具有种子层的工件上。 这是通过使用“高电阻离子电流源”来实现的，其通过将高电阻膜（例如，微孔陶瓷或微波玻璃元件）放置在靠近晶片来解决端子问题，从而消除系统的电阻。 因此，膜近似于恒定电流源。 通过保持晶片靠近膜表面，从膜顶部到表面的离子电阻远小于对晶片边缘的离子路径电阻，基本上补偿薄金属膜中的薄层电阻并引导附加电流 在晶片的中心和中间。

公开(公告)号：US20110025338A1

公开(公告)日：2011-02-03

申请号：US12462354

申请日：2009-08-03

申请人： Mark J. Willey ,  Lian Guo ,  Steven T. Mayer

发明人： Mark J. Willey ,  Lian Guo ,  Steven T. Mayer

IPC分类号： G01N27/06

CPC分类号： G01N27/42

摘要： The working electrode in the flow channel of a flow-through electrolytic detection cell is preconditioned by flowing a preconditioning electroplating solution with preconditioner species through the flow channel while applying a negative potential. Flow of liquid through the flow channel is rapidly switched from preconditioning solution to a target solution containing an organic target solute to be measured. The transient response of the system resulting from exposure of the working electrode to organic target solute is detected by measuring current density during an initial transient time period. An unknown concentration of target solute is determined by comparing the transient response with one or more transient responses characteristic of known concentrations. A preferred measuring system is operable to switch flow from preconditioning solution to target solution in about 200 milliseconds or less.

摘要翻译： 通过电流检测单元的流动通道中的工作电极通过在施加负电位的情况下通过流动通道流动具有预调节剂种类的预处理电镀溶液来预处理。 通过流动通道的液体流从预处理溶液快速切换到含有待测量的有机靶溶质的目标溶液。 通过在初始瞬变时间段内测量电流密度来检测由工作电极暴露于有机靶溶质而产生的系统的瞬态响应。 通过将瞬态响应与已知浓度特征的一个或多个瞬态响应进行比较来确定目标溶质浓度未知。 优选的测量系统可操作以在大约200毫秒或更短的时间内将流从预处理溶液切换到目标溶液。

公开(公告)号：US07811925B1

公开(公告)日：2010-10-12

申请号：US12184145

申请日：2008-07-31

申请人： Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

发明人： Jonathan D. Reid ,  Eric G. Webb ,  Edmund B. Minshall ,  Avishai Kepten ,  R. Marshall Stowell ,  Steven T. Mayer

IPC分类号： H01L21/302 ,  H01L21/461 ,  B24B7/00

CPC分类号： H01L21/7684 ,  C23C18/1607 ,  C23C18/1882 ,  C25D5/02 ,  C25D7/123 ,  H01L21/02074 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/3212 ,  H01L21/32134 ,  H01L21/76831 ,  H01L21/76849 ,  H01L21/76883 ,  Y10S414/135

摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.

摘要翻译： 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。

公开(公告)号：US07690324B1

公开(公告)日：2010-04-06

申请号：US11200338

申请日：2005-08-09

申请人： Jingbin Feng ,  Steven T. Mayer ,  Daniel Mark Dinneen ,  Edmund B. Minshall ,  Christopher M. Bartlett ,  Eric G. Webb ,  R. Marshall Stowell ,  Mark T. Winslow ,  Avishai Kepten ,  Norman D. Kaplan ,  Richard K. Lyons ,  John B. Alexy

发明人： Jingbin Feng ,  Steven T. Mayer ,  Daniel Mark Dinneen ,  Edmund B. Minshall ,  Christopher M. Bartlett ,  Eric G. Webb ,  R. Marshall Stowell ,  Mark T. Winslow ,  Avishai Kepten ,  Norman D. Kaplan ,  Richard K. Lyons ,  John B. Alexy

IPC分类号： B05C11/02

CPC分类号： C23C18/1619 ,  H01L21/288 ,  H01L21/6715 ,  H01L21/76841

摘要： During fluid treatment of a substrate surface, a carrier/wafer assembly containing a substrate wafer closes the top of a microcell container. The carrier/wafer assembly and the container walls define a thin enclosed treatment volume that is filled with treating fluid, such as electroless plating solution. The thin fluid-treatment volume typically has a volume in a range of about from 100 ml to 500 ml. Preferably a container is heated and the treating fluid is pre-heated before being injected into the container. Preferably, the chemical composition, temperature, and other properties of fluid in the thin enclosed fluid-treatment volume are dynamically variable. A rinse shield and a rinse nozzle are located above the container. A carrier/wafer assembly in a rinse position substantially closes the top of the rinse shield.

摘要翻译： 在衬底表面的流体处理期间，包含衬底晶片的载体/晶片组件封闭微孔容器的顶部。 载体/晶片组件和容器壁限定了用处理流体例如化学镀溶液填充的薄封闭处理体积。 薄流体处理体积通常具有在约100ml至500ml范围内的体积。 优选地，将容器加热并且将处理流体在被注入容器之前被预热。 优选地，薄封闭流体处理体积中的流体的化学组成，温度和其它性质是动态可变的。 冲洗屏和冲洗喷嘴位于容器上方。 漂洗位置的载体/晶片组件基本上封闭了冲洗屏蔽的顶部。

公开(公告)号：US07682498B1

公开(公告)日：2010-03-23

申请号：US11179984

申请日：2005-07-11

申请人： Steven T. Mayer ,  John S. Drewery

发明人： Steven T. Mayer ,  John S. Drewery

IPC分类号： B23H3/00 ,  C25D5/00 ,  C25D5/18 ,  C25D17/10 ,  B23H7/14 ,  C25D21/12

CPC分类号： B23H3/04 ,  C25D5/04 ,  C25D5/18 ,  C25D7/123 ,  C25D17/001 ,  C25D17/12 ,  C25D21/12

摘要： A work piece is electroplated or electroplanarized using an azimuthally asymmetric electrode. The azimuthally asymmetric electrode is rotated with respect to the work piece (i.e., either or both of the work piece and the electrode may be rotating). The azimuthal asymmetry provides a time-of-exposure correction to the current distribution reaching the work piece. In some embodiments, the total current is distributed among a plurality of electrodes in a reaction cell in order to tailor the current distribution in the electrolyte over time. Focusing elements may be used to create “virtual electrode” in proximity to the surface of the work piece to further control the current distribution in the electrolyte during plating or planarization.

摘要翻译： 使用方位不对称电极对工件进行电镀或电平面化处理。 方位不对称电极相对于工件旋转（即，工件和电极中的任一个或两者可以旋转）。 方位不对称性提供了到达工件的当前分布的曝光时间校正。 在一些实施例中，总电流分布在反应池中的多个电极之间，以便随着时间的推移来调整电解质中的电流分布。 可以使用聚焦元件在工件的表面附近产生“虚拟电极”，以进一步控制在电镀或平坦化期间电解液中的电流分布。