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公开(公告)号：US20100300888A1
公开(公告)日：2010-12-02
申请号：US12786329
申请日：2010-05-24
CPC分类号： C25D7/123 , C25D3/38 , C25D5/18 , C25D17/001
摘要： A plating protocol is employed to control plating of metal onto a wafer comprising a conductive seed layer. Initially, the protocol employs cathodic protection as the wafer is immersed in the plating solution. In certain embodiments, the current density of the wafer is constant during immersion. In a specific example, potentiostatic control is employed to produce a current density in the range of about 1.5 to 20 mA/cm2. The immersion step is followed by a high current pulse step. During bottom up fill inside the features of the wafer, a constant current or a current with a micropulse may be used. This protocol may protect the seed from corrosion while enhancing nucleation during the initial stages of plating.
摘要翻译： 使用电镀方案来控制金属镀在包含导电种子层的晶片上。 最初，当晶片浸入电镀溶液中时，协议采用阴极保护。 在某些实施例中，晶片的电流密度在浸入期间是恒定的。 在具体实例中，使用恒电位控制来产生约1.5至20mA / cm 2范围内的电流密度。 浸没步骤之后是高电流脉冲步骤。 在向下填充晶片的特征内部时，可以使用恒定电流或具有微脉冲的电流。 该方案可以保护种子免受腐蚀，同时在电镀初始阶段增强成核。
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公开(公告)号：US07811925B1
公开(公告)日：2010-10-12
申请号：US12184145
申请日：2008-07-31
申请人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
发明人： Jonathan D. Reid , Eric G. Webb , Edmund B. Minshall , Avishai Kepten , R. Marshall Stowell , Steven T. Mayer
IPC分类号： H01L21/302 , H01L21/461 , B24B7/00
CPC分类号： H01L21/7684 , C23C18/1607 , C23C18/1882 , C25D5/02 , C25D7/123 , H01L21/02074 , H01L21/288 , H01L21/2885 , H01L21/3212 , H01L21/32134 , H01L21/76831 , H01L21/76849 , H01L21/76883 , Y10S414/135
摘要： Methods of forming a capping layer on conductive lines in a semiconductor device may be characterized by the following operations: (a) providing a semiconductor substrate comprising a dielectric layer having (i) exposed conductive lines (e.g., copper lines) disposed therein, and (ii) an exposed barrier layer disposed thereon; and (b) depositing a capping layer material on at least the exposed conductive lines of the semiconductor substrate. In certain embodiments, the method may also involve removing at least a portion of a conductive layer (e.g., overburden) disposed over the barrier layer and conductive lines to expose the barrier layer.
摘要翻译： 在半导体器件中的导电线上形成覆盖层的方法的特征在于以下操作：（a）提供包括介电层的半导体衬底，所述电介质层具有（i）设置在其中的暴露的导电线（例如铜线）和（ ii）设置在其上的暴露的阻挡层; 和（b）在所述半导体衬底的至少暴露的导电线上沉积覆盖层材料。 在某些实施例中，该方法还可以包括移除设置在阻挡层和导电线上的导电层（例如，覆盖层）的至少一部分以暴露阻挡层。
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公开(公告)号：US07682498B1
公开(公告)日：2010-03-23
申请号：US11179984
申请日：2005-07-11
申请人： Steven T. Mayer , John S. Drewery
发明人： Steven T. Mayer , John S. Drewery
摘要： A work piece is electroplated or electroplanarized using an azimuthally asymmetric electrode. The azimuthally asymmetric electrode is rotated with respect to the work piece (i.e., either or both of the work piece and the electrode may be rotating). The azimuthal asymmetry provides a time-of-exposure correction to the current distribution reaching the work piece. In some embodiments, the total current is distributed among a plurality of electrodes in a reaction cell in order to tailor the current distribution in the electrolyte over time. Focusing elements may be used to create “virtual electrode” in proximity to the surface of the work piece to further control the current distribution in the electrolyte during plating or planarization.
摘要翻译： 使用方位不对称电极对工件进行电镀或电平面化处理。 方位不对称电极相对于工件旋转（即，工件和电极中的任一个或两者可以旋转）。 方位不对称性提供了到达工件的当前分布的曝光时间校正。 在一些实施例中，总电流分布在反应池中的多个电极之间，以便随着时间的推移来调整电解质中的电流分布。 可以使用聚焦元件在工件的表面附近产生“虚拟电极”，以进一步控制在电镀或平坦化期间电解液中的电流分布。
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公开(公告)号：US20100029088A1
公开(公告)日：2010-02-04
申请号：US12462424
申请日：2009-08-04
申请人： Steven T. Mayer , David W. Porter
发明人： Steven T. Mayer , David W. Porter
IPC分类号： H01L21/306
CPC分类号： H01L21/6708 , C23F1/08 , C23F1/34 , C25F3/12 , H01L21/32115 , H01L21/32134
摘要： An apparatus for wet etching metal from a semiconductor wafer comprises a wafer holder for rotating a wafer and a plurality of nozzles for applying separate flow patterns of etching liquid to the surface of the wafer. The flow patterns impact the wafer in distinct band-like impact zones. The flow pattern of etching liquid from at least one nozzle is modulated during a total etching time control the cumulative etching rate in one local etch region relative to the cumulative etching rate in one or more other local etch regions. Some embodiments include a lower etch chamber and an upper rinse chamber separated by a horizontal splash shield. Some embodiments include a retractable vertical splash shield used to prevent splashing of etching liquid onto the inside walls of a treatment container. An etch-liquid delivery system includes a plurality of nozzle flow paths having corresponding nozzle flow resistances, and a plurality of drain flow paths having corresponding drain flow resistances. Nozzle flow resistances and drain flow resistances are matched so that switching the flow from a nozzle to a corresponding drain flow path does not change the flow rate of etching liquid through other nozzles. A non-wafer-contacting measuring device measures a metal thickness on a rotating semiconductor wafer during metal wet etching by immersing a plurality of electrodes in etching liquid in close proximity to the wafer surface of the rotating wafer and determining electrical resistance between a plurality of electrodes.
摘要翻译： 用于从半导体晶片湿式蚀刻金属的设备包括用于旋转晶片的晶片保持器和用于将分离的蚀刻液体的流动图案施加到晶片的表面的多个喷嘴。 流动模式影响晶片在不同的带状冲击区域。 在总腐蚀时间期间，调制来自至少一个喷嘴的蚀刻液体的流动模式，以控制一个局部蚀刻区域中相对于一个或多个其它局部蚀刻区域中的累积蚀刻速率的累积蚀刻速率。 一些实施例包括由水平防溅罩隔开的下蚀刻室和上冲洗室。 一些实施例包括用于防止蚀刻液体溅射到处理容器的内壁上的可伸缩垂直防溅屏蔽。 蚀刻液输送系统包括具有相应的喷嘴流动阻力的多个喷嘴流动路径和具有相应的漏极流动阻力的多个排出流动路径。 喷嘴流阻和排流阻力匹配，使得从喷嘴到相应的排水流路的流动不会改变通过其它喷嘴的蚀刻液的流量。 非晶片接触测量装置通过将多个电极浸入在旋转晶片的晶片表面附近的蚀刻液中来测量金属湿蚀刻期间的旋转半导体晶片上的金属厚度，并且确定多个电极之间的电阻 。
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公开(公告)号：US07560016B1
公开(公告)日：2009-07-14
申请号：US12291277
申请日：2008-11-07
IPC分类号： C25D5/02
CPC分类号： H05K3/243 , H05K3/108 , H05K2201/0367 , H05K2201/09745 , H05K2203/0392 , H05K2203/122
摘要： To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.
摘要翻译： 为了制造金属特征，将不可镀层施加到工件表面，然后被图案化以形成第一镀层区域和第一非镀层区域。 然后，金属沉积在工件上，以在所述第一镀覆区域中形成凸起区域，并在所述第一非镀覆区域中形成凹陷区域。 然后，加工膜全部应用于工件上。 加速膜的一部分从场区域选择性地去除，并且加速膜的另一部分残留在凹入加速区域中。 然后，金属沉积在工件上，并且金属在加速区域中以加速的速率沉积，导致与非激活场区域中的金属相比，加速区域中的金属厚度更大。 然后，从场区域中完全去除金属，从而形成金属特征。
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公开(公告)号：US07449099B1
公开(公告)日：2008-11-11
申请号：US10947085
申请日：2004-09-21
IPC分类号： C25D5/02
CPC分类号： H05K3/243 , H05K3/108 , H05K2201/0367 , H05K2201/09745 , H05K2203/0392 , H05K2203/122
摘要： To make a metal feature, a non-plateable layer is applied to a workpiece surface and then patterned to form a first plating region and a first non-plating region. Then, metal is deposited on the workpiece to form a raised field region in said first plating region and a recessed region in said first non-plating region. Then, an accelerator film is applied globally on the workpiece. A portion of the accelerator film is selectively removed from the field region, and another portion of the accelerator film remains in the recessed acceleration region. Then, metal is deposited onto the workpiece, and the metal deposits at an accelerated rate in the acceleration region, resulting in a greater thickness of metal in the acceleration region compared to metal in the non-activated field region. Then, metal is completely removed from the field region, thereby forming the metal feature.
摘要翻译： 为了制造金属特征，将不可镀层施加到工件表面，然后被图案化以形成第一镀层区域和第一非镀层区域。 然后，金属沉积在工件上，以在所述第一镀覆区域中形成凸起区域，并在所述第一非镀覆区域中形成凹陷区域。 然后，加工膜全部应用于工件上。 加速膜的一部分从场区域选择性地去除，并且加速膜的另一部分残留在凹入加速区域中。 然后，金属沉积在工件上，并且金属在加速区域中以加速的速率沉积，导致与非激活场区域中的金属相比，加速区域中的金属厚度更大。 然后，从场区域中完全去除金属，从而形成金属特征。
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公开(公告)号：US07449098B1
公开(公告)日：2008-11-11
申请号：US10739822
申请日：2003-12-17
申请人： Steven T. Mayer , Jonathan D. Reid , Mark L. Rea , Ismail T. Emesh , Henner W. Meinhold , John S. Drewery
发明人： Steven T. Mayer , Jonathan D. Reid , Mark L. Rea , Ismail T. Emesh , Henner W. Meinhold , John S. Drewery
CPC分类号： B23H5/08 , C25D5/06 , C25D5/22 , C25D5/34 , C25D5/48 , C25D7/123 , C25F3/16 , H01L21/2885 , H01L21/3212 , H01L21/7684 , H01L21/76877
摘要： A disclosed form of mechanically assisted electroplating leads to a flat, thin, overburden. In one example, an accelerator is deposited on a copper surface and mechanically removed in a simplified CMP-like apparatus. The wafer is then plated in an electrolyte containing little or no accelerating additives.
摘要翻译： 一种公开的机械辅助电镀形式导致平坦，薄的覆盖层。 在一个实例中，加速器沉积在铜表面上并在简化的类似CMP的装置中机械地去除。 然后将晶片镀在含有很少或没有加速添加剂的电解质中。
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58.发明授权Method and apparatus for potential controlled electroplating of fine patterns on semiconductor wafers 有权用于在半导体晶片上精细图案的电位控制电镀的方法和装置公开(公告)号：US07211175B1
公开(公告)日：2007-05-01
申请号：US10365577
申请日：2003-02-11
申请人： Steven T. Mayer , Jonathan Reid , Robert Contolini
发明人： Steven T. Mayer , Jonathan Reid , Robert Contolini
CPC分类号： C25D17/001 , C25D17/005 , C25D21/12 , H01L21/2885 , H01L21/76877
摘要： Controlled-potential electroplating provides an effective method of electroplating metals onto the surfaces of high aspect ratio recessed features of integrated circuit devices. Methods are provided to mitigate corrosion of a metal seed layer on recessed features due to contact of the seed layer with an electrolyte solution. The potential can also be controlled to provide conformal plating over the seed layer and bottom-up filling of the recessed features. For each of these processes, a constant cathodic voltage, pulsed cathodic voltage, or ramped cathodic voltage can be used. An apparatus for controlled-potential electroplating includes a reference electrode placed near the surface to be plated and at least one cathode sense lead to measure the potential at points on the circumference of the integrated circuit structure.
摘要翻译： 控制电位电镀提供了将金属电镀到集成电路器件的高纵横比凹陷特征的表面上的有效方法。 提供了一种方法，用于减轻由于种子层与电解质溶液的接触而导致的凹陷特征上的金属种子层的腐蚀。 还可以控制电位以在种子层上提供适形电镀，并且自下而上地填充凹陷特征。 对于这些处理中的每一个，可以使用恒定的阴极电压，脉冲阴极电压或斜坡阴极电压。 用于控制电位电镀的装置包括放置在待镀表面附近的参考电极和至少一个阴极检测引线，以测量集成电路结构的圆周上的点处的电位。
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59.发明授权公开(公告)号：US06964792B1
公开(公告)日：2005-11-15
申请号：US09927740
申请日：2001-08-10
CPC分类号： C25D5/08 , C25D7/123 , C25D17/001 , C25D17/008
摘要： The present invention provides apparatus and methods for controlling flow dynamics of a plating fluid during a plating process. The invention achieves this fluid control through use of a diffuser membrane. Plating fluid is pumped through the membrane; the design and characteristics of the membrane provide a uniform flow pattern to the plating fluid exiting the membrane. Thus a work piece, upon which a metal or other conductive material is to be deposited, is exposed to a uniform flow of plating fluid.
摘要翻译： 本发明提供了一种用于在电镀过程中控制电镀液的流动动力学的装置和方法。 本发明通过使用扩散膜来实现该流体控制。 电镀液被泵送通过膜; 膜的设计和特性为离开膜的电镀液提供均匀的流动模式。 因此，要沉积金属或其他导电材料的工件暴露于电镀液体的均匀流动。
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公开(公告)号：US06890416B1
公开(公告)日：2005-05-10
申请号：US10318497
申请日：2002-12-11
摘要： An electroplating apparatus prevents anode-mediated degradation of electrolyte additives by creating a mechanism for maintaining separate anolyte and catholyte and preventing mixing thereof within a plating chamber. The separation is accomplished by interposing a porous chemical transport barrier between the anode and cathode. The transport barrier limits the chemical transport (via diffusion and/or convection) of all species but allows migration of ionic species (and hence passage of current) during application of sufficiently large electric fields within electrolyte.
摘要翻译： 电镀装置通过产生用于维持单独的阳极电解液和阴极电解液并防止其在电镀室内的混合的机构来防止阳极介导的电解质添加剂的降解。 分离是通过在阳极和阴极之间插入多孔化学传输屏障来实现的。 运输屏障限制了所有物种的化学传输（通过扩散和/或对流），但是在电解质中施加足够大的电场期间允许离子物质的迁移（因此电流的流动）。
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