摘要:
The mixer of a transmit chain of a wireless transmitter (such as the transmitter of a cellular telephone handset) is driven with low third harmonic in-phase (I) and quadrature (Q) signals. The low third harmonic I and Q signals have three or more signal levels, and transition between the these three or more signal levels at times such that each of the I and Q signals approximates a sine wave and has minimal third harmonic spectral components. In one example, reducing the third harmonic components of the I and Q signals simplifies design of amplifier stages of the transmitter and helps reduce receive band noise.
摘要:
In a method and apparatus for operating a super-heterodyne receiver, a tuning circuit has a local oscillator for frequency shifting a desired channel to a selected frequency and a controller for controlling the local oscillator. The controller determines for each of a number of identified channels, whether an image signal is present at frequencies in the spectrum that when tuned to a first selected frequency interfere, and is operable to select a modified selected frequency at which interference between the image signal and the identified channel is reduced.
摘要:
A passive mixer with channel impedance equalization is disclosed. In an exemplary embodiment, an apparatus includes replica devices configured to generate replica output signals and an error amplifier configured to generate bias signals based on the replica output signals. The bias signals are configured to equalize on-state channel impedances associated with a mixer.
摘要:
A double balanced image reject mixer (IRM) can be configured to comprise: a common radio frequency (RF) port; four mixer devices, each comprising an intermediate frequency (IF) port, an RF port and an local oscillator (LO) port; and a four-way, in-phase splitter/combiner. The four-way, in-phase splitter/combiner can be connected between the RF common port and the RF port of each of the four mixer devices. A method of performing spurious suppression and image reject mixing in a double balanced IRM, can comprise: directly in-phase combining radio frequency (RF) output signals of four mixer devices located in the double balanced IRM; and phase pairing local oscillator (LO) signals and intermediate frequency (IF) signals such that the combination of the phases of the respective IF and LO signals can result in substantially equal phase RF signals at the RF ports of all four mixer devices.
摘要:
An image rejection mixer includes first and second mixers, a phase shift circuit and a summer. The first mixer receives an RF input signal and a first local oscillator (LO) signal and generates a first intermediate frequency (IF) output signal. The second mixer receives the RF input signal and a second LO signal and generates a second IF output signal. The first LO signal is a phase lag signal (sin ωlot) and the second LO signal is a phase lead signal (−cos ωlot), where ωlot is a frequency signal generated by a local oscillator. The phase shift circuit is connected between the summer and the first mixer, receives the first IF output signal and generates a phase lag signal. The phase shift circuit causes the phase lag signal to lag the first IF output signal by about 90 degrees. The summer is connected to the phase shift circuit and the second mixer, receives the second IF output signal and the phase lag signal, and generates a combined IF output signal. The image rejection mixer is switchable between high and low side injection simply by inverting the second LO signal.
摘要:
An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programable attenuation and a programable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator. The VCOs in the PLLs are centered using a control circuit to center the tuning capacitance range. A differential crystal oscillator is advantageously used as a frequency reference. Differential signal transmission is advantageously used throughout the receiver.
摘要:
An integrated VCO having an improved tuning range over process and temperature variations. There is therefore provided in a present embodiment of the invention an integrated VCO. The VCO comprises, a substrate, a VCO tuning control circuit responsive to a VCO state variable that is disposed upon the substrate, and a VCO disposed upon the substrate, having a tuning control voltage input falling within a VCO tuning range for adjusting a VCO frequency output, and having its tuning range adjusted by the tuning control circuit in response to the VCO state variable.
摘要:
An image reject receiver (10) uses a mixer circuit (12) and a mixer circuit (16) to frequency translate an incoming reference signal (RF.sub.IN) and generate a first output signal (V.sub.OUT1) and a second output signal (V.sub.OUT2), respectively. Two phase detectors (26 and 36) measure a phase difference between the first and second output signals (V.sub.OUT1, and V.sub.OUT2) and a difference circuit (30) provides a difference value in accordance with the phase difference. The difference value cancels any phase shift due to time delays associated with the phase detectors (26 and 36). The difference value is fed back to a phase shift circuit (20) for adjusting the phase of the second output signal (V.sub.OUT2) and locking the first output signal (V.sub.OUT1) in-phase with the second output signal (V.sub.OUT2).
摘要:
There is provided an image rejection mixer for downconversion of an incoming signal to a lower intermediate frequency signal, using the absolute difference of frequencies between the incoming signal and the local oscillator signal. The image rejection mixer is set up to accept and downconvert incoming signals at two discrete frequencies f.sub.h and f.sub.l, where the local oscillator frequency is positioned mid-way between those frequencies f.sub.h and f.sub.l. There are two signal paths in the image rejection mixer, either one or the other of which is chosen by positioning a controllable single pole, double throw switch into one of its two switch positions. The output of the switch is led to a mixing element, from which an intermediate frequency signal is derived. The first of the two signal paths from the input to the image rejection mixer to the mixing element has a bandpass characteristic centered at one or the other of the two input frequencies of interest; the other signal path has a bandstop characteristic centered at the same frequency. By choosing one or the other of the signal paths, an incoming signal at a designated one or the other of the incoming signal frequencies may be downconverted, and the image signal and any noise at that image signal frequency will be rejected.
摘要:
An I/Q direct conversion receiver has an input (5,6) for receiving an RF signal comprising a wanted signal having in-phase and quadrature phase channels modulated onto in-phase and quadrature carrier signals. A signal splitter (7) divides the receiver RF signal into three in-phase signal components. Three substantially identical mixers (8) are provided and receive respective RF signal components for mixing with local oscillator signals. The first mixer (8a) receives the local oscillator signal shifted by 45.degree., the second mixer (8b) receives the local oscillator signal shifted by -45.degree., whilst the third mixer (8c) receives the local oscillator signal shifted by 180.degree.. A correction signal is generated by summing at a summing amplifier (11) the first and second baseband signals together with the third baseband signal after appropriate scaling. The in-phase and quadrature phase baseband signals are then corrected by combining these signals at respective comparators (13) with the correction signal.