公开(公告)号：US08124526B2

公开(公告)日：2012-02-28

申请号：US12503440

申请日：2009-07-15

申请人： Suk-Hun Choi ,  Jong-Won Lee ,  Chang-Ki Hong ,  Bo-Un Yoon

发明人： Suk-Hun Choi ,  Jong-Won Lee ,  Chang-Ki Hong ,  Bo-Un Yoon

IPC分类号： H01L21/4763

CPC分类号： H01L27/11507 ,  H01L21/3105 ,  H01L21/31053 ,  H01L28/55

摘要： In methods of forming a thin ferroelectric layer and methods of manufacturing a semiconductor device, a preliminary ferroelectric layer is formed on a substrate by depositing a metal oxide including lead, zirconium and titanium. The surface of the preliminary ferroelectric layer is polished using a slurry composition including an acrylic acid polymer, abrasive particles, and water to form a thin ferroelectric layer on the substrate. The slurry composition may reduce a polishing rate of the preliminary ferroelectric layer such that removal of a bulk portion of the preliminary ferroelectric layer may be suppressed and the surface roughness of the preliminary ferroelectric layer may be improved.

摘要翻译： 在形成薄铁电体层的方法和制造半导体器件的方法中，通过沉积包括铅，锆和钛的金属氧化物，在衬底上形成初步铁电层。 使用包括丙烯酸聚合物，磨料颗粒和水的浆料组合物对预制铁电层的表面进行抛光，以在基材上形成薄铁电层。 浆料组合物可以降低预备铁电体层的抛光速率，从而可以抑制初级铁电层的体积部分的去除，并且可以提高预铁电层的表面粗糙度。

公开(公告)号：US20110201203A1

公开(公告)日：2011-08-18

申请号：US13025410

申请日：2011-02-11

申请人： Hyo-San Lee ,  Bo-Un Yoon ,  Kun-Tack Lee ,  Dae-Hyuk Kang ,  Seong-Ho Moon ,  So-Ra Han

发明人： Hyo-San Lee ,  Bo-Un Yoon ,  Kun-Tack Lee ,  Dae-Hyuk Kang ,  Seong-Ho Moon ,  So-Ra Han

IPC分类号： H01L21/311

CPC分类号： H01L21/31111 ,  H01L21/32134 ,  H01L21/76802 ,  H01L27/10852 ,  H01L27/10876 ,  H01L27/10894 ,  H01L27/11578 ,  H01L27/11582 ,  H01L28/91 ,  H01L29/4236 ,  H01L29/66621 ,  H01L29/66833 ,  H01L29/7926

摘要： In a method of forming a hole, an insulation layer is formed on a substrate, and a preliminary hole exposing the substrate is formed through the insulation layer. A photosensitive layer pattern including an organic polymer is then formed on the substrate to fill the preliminary hole. An etching gas including hydrogen fluoride (HF) or fluorine (F2) is then provided onto the photosensitive layer pattern to etch the insulation layer so that width of the preliminary hole is increased.

摘要翻译： 在形成孔的方法中，在基板上形成绝缘层，通过绝缘层形成露出基板的预备孔。 然后在基板上形成包含有机聚合物的感光层图案以填充预备孔。 然后将包含氟化氢（HF）或氟（F2）的蚀刻气体提供到感光层图案上以蚀刻绝缘层，使得预备孔的宽度增加。

公开(公告)号：US07678625B2

公开(公告)日：2010-03-16

申请号：US11962742

申请日：2007-12-21

申请人： Jong-Heun Lim ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Seong-Kyu Yun ,  Suk-Hun Choi ,  Sang-Yeob Han

发明人： Jong-Heun Lim ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Seong-Kyu Yun ,  Suk-Hun Choi ,  Sang-Yeob Han

IPC分类号： H01L21/84

CPC分类号： H01L21/02675 ,  H01L21/02381 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02636 ,  H01L29/78

摘要： A method of fabricating a semiconductor device including a channel layer includes forming a single crystalline semiconductor layer on a semiconductor substrate. The single crystalline semiconductor layer includes a protrusion extending from a surface thereof. A first polishing process is performed on the single crystalline semiconductor layer to remove a portion of the protrusion such that the single crystalline semiconductor layer includes a remaining portion of the protrusion. A second polishing process different from the first polishing process is performed to remove the remaining portion of the protrusion and define a substantially planar single crystalline semiconductor layer having a substantially uniform thickness. A sacrificial layer may be formed on the single crystalline semiconductor layer and used as a polish stop for the first polishing process to define a sacrificial layer pattern, which may be removed prior to the second polishing process. Related methods of fabricating stacked semiconductor memory devices are also discussed.

摘要翻译： 制造包括沟道层的半导体器件的方法包括在半导体衬底上形成单晶半导体层。 单晶半导体层包括从其表面延伸的突起。 在单晶半导体层上执行第一抛光工艺以去除突起的一部分，使得单晶半导体层包括突起的剩余部分。 执行与第一抛光工艺不同的第二抛光工艺以去除突起的剩余部分并限定具有基本上均匀厚度的基本上平面的单晶半导体层。 可以在单晶半导体层上形成牺牲层，并且用作第一抛光工艺的抛光止挡件以限定可在第二抛光工艺之前去除的牺牲层图案。 还讨论了制造叠层半导体存储器件的相关方法。

公开(公告)号：US07670942B2

公开(公告)日：2010-03-02

申请号：US11525490

申请日：2006-09-23

申请人： Ho-Young Kim ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Joon-Sang Park

发明人： Ho-Young Kim ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Joon-Sang Park

IPC分类号： H01L21/4763

CPC分类号： H01L21/76897 ,  H01L21/7684 ,  H01L27/10873 ,  H01L27/10885

摘要： A method of fabricating a self-aligned contact pad (SAC) includes forming stacks of a conductive line and a capping layer on a semiconductor substrate, spacers covering sidewalls of the stacks, and an insulation layer filling gaps between the stacks and exposing the top of the capping layer, etching the capping layer to form damascene grooves, forming a plurality of first etching masks with a material different from that of the capping layer to fill the damascene grooves without covering the top of the insulation layer, and forming a second etching mask having an opening region that exposes some of the first etching masks and a portion of the insulation layer located between the first etching masks. The method further includes etching the portion of the insulation layer exposed by the opening region using the first and second etching masks to form a plurality of opening holes, removing the second etching mask, forming a conductive layer filling the opening holes to cover the remaining first etching masks and performing a chemical mechanical polishing (CMP) process on the conductive layer using the capping layer as a polishing end point to remove the first etching masks such that a plurality of SAC pads separated from each other are formed that fill the opening holes.

公开(公告)号：US20090001051A1

公开(公告)日：2009-01-01

申请号：US12213941

申请日：2008-06-26

申请人： Jong-Won Lee ,  Sang-Yeob Han ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Jae-Dong Lee

发明人： Jong-Won Lee ,  Sang-Yeob Han ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Jae-Dong Lee

IPC分类号： C09K13/00 ,  C23F1/04

CPC分类号： C23F3/00 ,  C09G1/02

摘要： A slurry composition for polishing metal includes a polymeric polishing accelerating agent, the polymeric polishing accelerating agent including a backbone of hydrocarbon and a side substituent having at least one of a sulfonate ion (SO3−) and a sulfate ion (OSO3−), and an acidic aqueous solution.

摘要翻译： 用于抛光金属的浆料组合物包括聚合物抛光促进剂，所述聚合物抛光促进剂包括烃的主链和具有磺酸根离子（SO 3 - ）和硫酸根离子（OSO 3 - ）中的至少一种的侧取代基， 酸性水溶液。

公开(公告)号：US20070145012A1

公开(公告)日：2007-06-28

申请号：US11542256

申请日：2006-10-04

申请人： Joon-Sang Park ,  Jong-Won Lee ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Jae-Dong Lee

发明人： Joon-Sang Park ,  Jong-Won Lee ,  Chang-Ki Hong ,  Bo-Un Yoon ,  Jae-Dong Lee

IPC分类号： C09K13/00 ,  C03C15/00 ,  B44C1/22

CPC分类号： C09K3/1463 ,  C09G1/02 ,  H01L21/3212

摘要： Disclosed is a slurry and method for chemical-mechanical polishing operation. The slurry may contain abrasive particles, an oxidizer, a pH controller, a chelating agent and water. The viscosity of the slurry may be in the range of about 1.0 cP—about 1.05 cP, so that the step difference may be reduced between regions with patterns and without patterns even after completing the chemical-mechanical polishing operation. A permissible rate of depth of focus (DOF) may not need to be controlled in the subsequent photolithography operation, which may enable the subsequent photolithography operation to be conducted by an optical system with relatively low DOF.

摘要翻译： 公开了一种用于化学机械抛光操作的浆料和方法。 浆料可以含有磨料颗粒，氧化剂，pH控制剂，螯合剂和水。 浆料的粘度可以在约1.0cP-约1.05cP的范围内，使得即使在完成化学机械抛光操作之后，也可以在具有图案的区域与无图案的区域之间降低阶梯差。 在随后的光刻操作中可能不需要控制焦深（DOF）的允许率，这可以使得随后的光刻操作能够由具有相对低的DOF的光学系统进行。

公开(公告)号：US09755079B2

公开(公告)日：2017-09-05

申请号：US15000495

申请日：2016-01-19

申请人： Sang-Jine Park ,  Keun-Hee Bai ,  Kyoung-Hwan Yeo ,  Bo-Un Yoon ,  Kee-Sang Kwon ,  Do-Hyoung Kim ,  Ha-Young Jeon ,  Seung-Seok Ha

发明人： Sang-Jine Park ,  Keun-Hee Bai ,  Kyoung-Hwan Yeo ,  Bo-Un Yoon ,  Kee-Sang Kwon ,  Do-Hyoung Kim ,  Ha-Young Jeon ,  Seung-Seok Ha

IPC分类号： H01L27/088 ,  H01L29/78 ,  H01L29/49 ,  H01L29/423 ,  H01L29/06 ,  H01L27/092 ,  H01L27/12

CPC分类号： H01L29/785 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1211 ,  H01L29/0657 ,  H01L29/4238 ,  H01L29/495 ,  H01L29/7848

摘要： Semiconductor devices are provided including a first active fin extending in a first direction and a second active fin spaced apart from the first active fin in a second direction perpendicular to the first direction, the second active fin extending in the first direction, the second active fin having a longer side shorter than a length of a longer side of the first active fin. A first dummy gate extends in the second direction overlapping a first end of each of the first and second active fins. A first metal gate extends in the second direction intersecting the first active fin and overlapping a second end of the second active fin. A first insulating gate extends in the second direction intersecting the first active fin. The first insulating gate extends into the first active fin.

公开(公告)号：US20160163718A1

公开(公告)日：2016-06-09

申请号：US15047181

申请日：2016-02-18

申请人： Sang-Jine Park ,  Kee-Sang Kwon ,  Do-Hyoung Kim ,  Bo-Un Yoon ,  Keun-Hee Bai ,  Kwang-Yong Yang ,  Kyoung-Hwan Yeo ,  Yong-Ho Jeon

发明人： Sang-Jine Park ,  Kee-Sang Kwon ,  Do-Hyoung Kim ,  Bo-Un Yoon ,  Keun-Hee Bai ,  Kwang-Yong Yang ,  Kyoung-Hwan Yeo ,  Yong-Ho Jeon

IPC分类号： H01L27/11 ,  H01L29/08 ,  H01L29/06 ,  H01L29/161 ,  H01L29/165 ,  H01L29/78 ,  H01L27/092 ,  H01L29/16

CPC分类号： H01L27/1104 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823481 ,  H01L27/0886 ,  H01L27/0924 ,  H01L27/1116 ,  H01L29/06 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/1608 ,  H01L29/161 ,  H01L29/165 ,  H01L29/7848

摘要： Semiconductor devices including a dummy gate structure on a fin are provided. A semiconductor device includes a fin protruding from a substrate. The semiconductor device includes a source/drain region in the fin, and a recess region of the fin that is between first and second portions of the source/drain region. Moreover, the semiconductor device includes a dummy gate structure overlapping the recess region, and a spacer that is on the fin and adjacent a sidewall of the dummy gate structure.

公开(公告)号：US08736058B2

公开(公告)日：2014-05-27

申请号：US12910356

申请日：2010-10-22

申请人： Byoung-Ho Kwon ,  Bo-Un Yoon

发明人： Byoung-Ho Kwon ,  Bo-Un Yoon

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L23/28 ,  H01L29/40

CPC分类号： H01L23/528 ,  H01L21/76807 ,  H01L21/76816 ,  H01L27/11521 ,  H01L27/11524 ,  H01L2924/0002 ,  H01L2924/00

摘要： A conductive structure includes a contact plug extending through an insulating layer on a substrate, and first and second conductive lines extending alongside one another on the insulating layer. The first conductive line extends on the contact plug. A connecting line on the insulating layer extends between and electrically connects the first and second conductive lines. Related integrated circuit devices and fabrication methods are also discussed.

摘要翻译： 导电结构包括延伸穿过衬底上的绝缘层的接触插塞以及在绝缘层上彼此并排延伸的第一和第二导电线。 第一导线延伸在接触插头上。 绝缘层上的连接线在第一和第二导电线之间延伸并电连接。 还讨论了相关的集成电路器件和制造方法。

公开(公告)号：US08475238B2

公开(公告)日：2013-07-02

申请号：US12855164

申请日：2010-08-12

申请人： Jae-Kwang Choi ,  Bo-Un Yoon ,  Myung-Ki Hong

发明人： Jae-Kwang Choi ,  Bo-Un Yoon ,  Myung-Ki Hong

IPC分类号： B24D11/00

CPC分类号： B24B21/004 ,  B24B37/245 ,  B24B37/26

摘要： A polishing pad may include a base and a plurality of polishing protrusions on a surface of the base. Each polishing protrusion may include a sidewall defining an opening in a surface of the polishing protrusion opposite the base. In addition, portions of the sidewall opposite the base may define a contact surface.

摘要翻译： 抛光垫可以包括基底和在基底的表面上的多个抛光突起。 每个抛光突起可以包括限定在与基座相对的抛光突起的表面中的开口的侧壁。 此外，与基座相对的侧壁的部分可以限定接触表面。