Voltage generator with adjustable slope
    61.
    发明授权
    Voltage generator with adjustable slope 有权
    电压发生器,斜率可调

    公开(公告)号:US08487692B1

    公开(公告)日:2013-07-16

    申请号:US13594869

    申请日:2012-08-26

    IPC分类号: G05F1/10

    CPC分类号: H03K17/164 G05F1/468 G05F3/08

    摘要: A charging circuit includes a first current mirror for receiving an input voltage, a second current mirror including a first branch circuit and a second branch circuit for receiving the input voltage, a switch transistor coupled to the first current mirror and the first branch circuit for determining a conduction condition of the switch transistor according to a switch signal, a first resistor including a first resistance and one end coupled to the switch transistor, and a second resistor including a second resistance and one end coupled the second branch circuit of the second current mirror, wherein the first current mirror and the second current mirror perform a charging operation of a loading circuit according to the first resistance and the second resistance.

    摘要翻译: 充电电路包括用于接收输入电压的第一电流镜,包括第一分支电路的第二电流镜和用于接收输入电压的第二分支电路,耦合到第一电流镜和第一分支电路的开关晶体管,用于确定 根据开关信号的开关晶体管的导通条件,包括第一电阻和耦合到开关晶体管的一端的第一电阻器,以及包括第二电阻器和第一电阻器的第二电阻器,其耦合第二电流镜的第二分支电路 其中,所述第一电流镜和所述第二电流镜根据所述第一电阻和所述第二电阻进行负载电路的充电操作。

    SEMICONDUCTOR PROCESS
    62.
    发明申请
    SEMICONDUCTOR PROCESS 有权
    半导体工艺

    公开(公告)号:US20130052825A1

    公开(公告)日:2013-02-28

    申请号:US13220692

    申请日:2011-08-30

    IPC分类号: H01L21/306

    摘要: A semiconductor process includes the following steps. A first gate structure and a second gate structure are formed on a substrate, wherein the top of the first gate structure includes a cap layer, so that the vertical height of the first gate structure is higher than the vertical height of the second gate structure. An interdielectric layer is formed on the substrate. A first chemical mechanical polishing process is performed to expose the top surface of the cap layer. A second chemical mechanical polishing process is performed to expose the top surface of the second gate structure or an etching process is performed to remove the interdielectric layer located on the second gate structure. A second chemical mechanical polishing process is then performed to remove the cap layer.

    摘要翻译: 半导体工艺包括以下步骤。 第一栅极结构和第二栅极结构形成在基板上,其中第一栅极结构的顶部包括盖层,使得第一栅极结构的垂直高度高于第二栅极结构的垂直高度。 在基板上形成介电层。 执行第一化学机械抛光工艺以暴露盖层的顶表面。 执行第二化学机械抛光工艺以暴露第二栅极结构的顶表面,或执行蚀刻工艺以去除位于第二栅极结构上的介电层。 然后执行第二化学机械抛光工艺以除去盖层。

    COLORS ONLY PROCESS TO REDUCE PACKAGE YIELD LOSS
    65.
    发明申请
    COLORS ONLY PROCESS TO REDUCE PACKAGE YIELD LOSS 有权
    颜色只有减少包装损失的过程

    公开(公告)号:US20090111208A1

    公开(公告)日:2009-04-30

    申请号:US12347468

    申请日:2008-12-31

    IPC分类号: H01L31/18

    摘要: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.

    摘要翻译: 公开了一种有序的微电子制造顺序,其中滤色器通过直角沉积直接形成在CCD,CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面,并且覆盖有高透光率平面化膜 指定的折射率和物理性质,其优化光收集到光电二极管而不需要额外的常规微透镜。 光学平坦的顶表面用于封装和保护成像器免受化学和热清洁处理损伤,最小化形成的底层变化,其将形成在非平面表面上的图像的像差或引起反射损失,并且消除在切割期间引起的残留颗粒夹杂物, 打包。 通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。 光电二极管阵列设置有金属遮光罩,钝化,并且在其上形成滤色器。 沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置,而不需要常规的凸起的微透镜。

    Chip antenna
    66.
    发明授权
    Chip antenna 失效
    芯片天线

    公开(公告)号:US07460070B2

    公开(公告)日:2008-12-02

    申请号:US11598019

    申请日:2006-11-13

    IPC分类号: H01Q1/38

    CPC分类号: H01Q1/38

    摘要: A chip antenna has a dielectric material layer, a first meandered strip, a second meandered strip and several bended strips. The first meandered strip is meandered in one direction and disposed on the dielectric material layer. The second meandered strip is meandered in another direction and disposed on the dielectric material layer. The first meandered strip is connected to the second meandered strip. The bended strips are connected to the turns of the meandered strips.

    摘要翻译: 芯片天线具有电介质材料层,第一弯曲带,第二弯曲带和几个弯曲带。 第一个曲折条在一个方向上蜿蜒并且放置在电介质材料层上。 第二个曲折条在另一个方向上蜿蜒并设置在电介质材料层上。 第一个曲折条连接到第二条曲折条。 弯曲的条带连接到蜿蜒的条纹。

    Colors only process to reduce package yield loss
    70.
    发明授权
    Colors only process to reduce package yield loss 有权
    颜色只能减少包装产量损失

    公开(公告)号:US07183598B2

    公开(公告)日:2007-02-27

    申请号:US11037445

    申请日:2005-01-18

    摘要: Disclosed is an ordered microelectronic fabrication sequence in which color filters are formed by conformal deposition directly onto a photodetector array of a CCD, CID, or CMOS imaging device to create a concave-up pixel surface, and, overlayed with a high transmittance planarizing film of specified index of refraction and physical properties which optimize light collection to the photodiode without additional conventional microlenses. The optically flat top surface serves to encapsulate and protect the imager from chemical and thermal cleaning treatment damage, minimizes topographical underlayer variations which would aberrate or cause reflection losses of images formed on non-planar surfaces, and, obviates residual particle inclusions induced during dicing and packaging. A CCD imager is formed by photolithographically patterning a planar-array of photodiodes on a semiconductor substrate. The photodiode array is provided with metal photoshields, passivated, and, color filters are formed thereon. A transparent encapsulant is deposited to planarize the color filter layer and completes the solid-state color image-forming device without conventional convex microlenses.

    摘要翻译: 公开了一种有序的微电子制造顺序,其中滤色器通过直角沉积直接形成在CCD,CID或CMOS成像装置的光电检测器阵列上以形成凹入像素表面,并且覆盖有高透光率平面化膜 指定的折射率和物理性质,其优化光收集到光电二极管而不需要额外的常规微透镜。 光学平坦的顶表面用于封装和保护成像器免受化学和热清洁处理损伤,最小化形成的底层变化,其将形成在非平面表面上的图像的像差或引起反射损失,并且消除在切割期间引起的残留颗粒夹杂物, 打包。 通过在半导体衬底上光刻地构图光电二极管平面阵列来形成CCD成像器。 光电二极管阵列设置有金属遮光罩,钝化,并且在其上形成滤色器。 沉积透明密封剂以平坦化滤色器层并完成固态彩色图像形成装置,而不需要常规的凸起的微透镜。