公开(公告)号：US20200058485A1

公开(公告)日：2020-02-20

申请号：US16542628

申请日：2019-08-16

Applicant: TEXAS INSTRUMENTS INCORPORATED

Inventor： Jeffrey Alan West ,  Adrian Salinas ,  Elizabeth C. Stewart ,  Dhanoop Varghese ,  Thomas D. Bonifield

IPC: H01L21/02 ,  H01L49/02

Abstract: An integrated circuit a semiconductor substrate includes a device die with includes transistors configured to execute an electrical function. A first interconnect layer of the device die is configured to route electrical signals or power to terminals of the transistors. An interlevel dielectric (ILD) layer is located over the interconnect layer. A metal electrode located over the ILD layer. A dielectric barrier layer is located between the ILD layer and the metal electrode. A scribe seal surrounds the device die. A first opening within the dielectric barrier layer surrounds the metal electrode. Second and third openings within the dielectric barrier layer are located between the first opening and the scribe seal.

公开(公告)号：US10147784B2

公开(公告)日：2018-12-04

申请号：US15606158

申请日：2017-05-26

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West ,  Thomas D. Bonifield ,  Byron Lovell Williams

IPC: H01L49/02 ,  H01L29/06 ,  H01L21/02 ,  H01L21/8234 ,  H01L29/66 ,  H01L29/78 ,  H01L27/06

Abstract: A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.

公开(公告)号：US20160163785A1

公开(公告)日：2016-06-09

申请号：US15045449

申请日：2016-02-17

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West ,  Thomas D. Bonifield ,  Byron Lovell Williams

IPC: H01L49/02

CPC classification number: H01L28/91 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/0217 ,  H01L21/823481 ,  H01L27/0629 ,  H01L28/40 ,  H01L28/60 ,  H01L29/0692 ,  H01L29/66477 ,  H01L29/78 ,  H01L29/7833

Abstract: A microelectronic device contains a high voltage component having a high voltage node and a low voltage node. The high voltage node is isolated from the low voltage node by a main dielectric between the high voltage node and low voltage elements at a surface of the substrate of the microelectronic device. A lower-bandgap dielectric layer is disposed between the high voltage node and the main dielectric. The lower-bandgap dielectric layer contains at least one sub-layer with a bandgap energy less than a bandgap energy of the main dielectric. The lower-bandgap dielectric layer extends beyond the high voltage node continuously around the high voltage node. The lower-bandgap dielectric layer has an isolation break surrounding the high voltage node at a distance of at least twice the thickness of the lower-bandgap dielectric layer from the high voltage node.

Abstract translation: 微电子器件包含具有高电压节点和低电压节点的高电压分量。 高电压节点通过微电子器件的基板的表面处的高压节点和低电压元件之间的主电介质与低电压节点隔离。 低压隙电介质层设置在高电压节点和主电介质之间。 低带隙电介质层含有至少一个带隙能量小于主电介质带隙能量的子层。 低带隙电介质层围绕高压节点连续延伸超过高压节点。 较低带隙电介质层具有围绕高电压节点的隔离断裂，距离高压节点的至少两倍于低带隙电介质层的厚度。

公开(公告)号：US20130249098A1

公开(公告)日：2013-09-26

申请号：US13894536

申请日：2013-05-15

Applicant: Texas Instruments Incorporated

Inventor： Jeffrey Alan West

IPC: H01L23/538

CPC classification number: H01L23/538 ,  H01L21/563 ,  H01L23/481 ,  H01L23/562 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/32 ,  H01L24/81 ,  H01L2224/13009 ,  H01L2224/13025 ,  H01L2224/13027 ,  H01L2224/13082 ,  H01L2224/13083 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13566 ,  H01L2224/1357 ,  H01L2224/13582 ,  H01L2224/13644 ,  H01L2224/13655 ,  H01L2224/13657 ,  H01L2224/13664 ,  H01L2224/13666 ,  H01L2224/13671 ,  H01L2224/13673 ,  H01L2224/13681 ,  H01L2224/14181 ,  H01L2224/1613 ,  H01L2224/16146 ,  H01L2224/16148 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81002 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2224/81203 ,  H01L2224/81801 ,  H01L2924/1461 ,  H01L2924/15311 ,  H01L2924/3511 ,  H01L2924/3512 ,  H01L2924/014 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/01015 ,  H01L2924/01005 ,  H01L2924/01074

Abstract: A method of protecting through substrate via (TSV) die from bonding damage includes providing a substrate including a plurality of TSV die having a topside including active circuitry, a bottomside, and a plurality of TSVs that include an inner metal core that reaches from the topside to protruding TSV tips that extend out from the bottomside. A protective layer is formed on or applied to the bottomside of the TSV die including between and over the protruding TSV tips. The TSV die is bonded with its topside down onto a workpiece having a workpiece surface and its bottomside up and in contact with a bond head. The protective layer reduces damage from the bonding process including warpage of the TSV die by preventing the bond head from making direct contact to the protruding TSV tips.

Abstract translation: 通过衬底通孔（TSV）裸片保护接合损伤的方法包括提供包括多个TSV管芯的衬底，所述TSV管芯具有包括有源电路，底部和多个TSV的顶部，所述TSV包括从顶侧到达的内部金属芯 突出TSV技巧，从底部延伸出来。 在TSV模头的底部上形成保护层，包括在突出的TSV尖端之间和之上。 TSV模具的上下结合到具有工件表面的工件上，并且其底部向上并与接合头接触。 保护层通过防止接合头与突出的TSV尖端直接接触来减少接合过程中的损伤，包括TSV模头的翘曲。