公开(公告)号：US11835363B2

公开(公告)日：2023-12-05

申请号：US17684374

申请日：2022-03-01

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ying-Chung Chen ,  Hsun-Wei Chan ,  Lu-Ming Lai ,  Kuang-Hsiung Chen

IPC: G01C3/08

CPC classification number: G01C3/08

Abstract: An optical module includes: a carrier; an optical element disposed on the upper side of the carrier; and a housing disposed on the upper side of the carrier, the housing defining an aperture exposing at least a portion of the optical element, an outer sidewall of the housing including at least one singulation portion disposed on the upper side of the carrier, wherein the singulation portion of the housing is a first portion of the housing, and wherein the housing further includes a second portion and a surface of the singulation portion of the housing is rougher than a surface of the second portion of the housing.

公开(公告)号：US20230387034A1

公开(公告)日：2023-11-30

申请号：US18231768

申请日：2023-08-08

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Wen Hung HUANG

IPC: H01L23/538 ,  H01L23/31 ,  H01L21/52 ,  H01L21/56 ,  H01L21/48

CPC classification number: H01L23/5389 ,  H01L23/5383 ,  H01L23/3121 ,  H01L23/5384 ,  H01L21/52 ,  H01L21/56 ,  H01L23/5386 ,  H01L21/486 ,  H01L21/4857

Abstract: A conductive structure includes a core portion, a plurality of electronic devices and a filling material. The core portion defines a cavity. The electronic devices are disposed in the cavity of the core portion. The filling material is disposed between the electronic devices and a sidewall of the cavity of the core portion.

公开(公告)号：US11830834B2

公开(公告)日：2023-11-28

申请号：US17372339

申请日：2021-07-09

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Hsing Kuo Tien ,  Chih-Cheng Lee

IPC: H01L23/48 ,  H01L23/52 ,  H01L23/00 ,  H01L23/498 ,  H01L25/16

CPC classification number: H01L24/05 ,  H01L23/481 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49838 ,  H01L24/24 ,  H01L25/162 ,  H01L2224/05565 ,  H01L2224/05573 ,  H01L2224/24225

Abstract: A semiconductor device, a semiconductor device package, and a method of manufacturing a semiconductor device package are provided. The semiconductor device includes an electronic component and a first protection layer. The electronic component includes a first conductive pad protruded out of a first surface of the electronic component. The first protection layer covers an external surface of the first conductive pad. The first surface of the electronic component is exposed from the first protection layer.

公开(公告)号：US11830799B2

公开(公告)日：2023-11-28

申请号：US17223932

申请日：2021-04-06

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： You-Lung Yen ,  Bernd Karl Appelt

IPC: H01L23/552 ,  H01L23/498 ,  H01L23/66 ,  H01L21/56 ,  H01Q1/22 ,  H01L21/48

CPC classification number: H01L23/49838 ,  H01L21/4857 ,  H01L21/56 ,  H01L23/49822 ,  H01L23/552 ,  H01L23/66 ,  H01Q1/2283 ,  H01L2223/6677

Abstract: A semiconductor device package and method for manufacturing the same are provided. The semiconductor device package includes a dielectric layer, an electronic component, a first conductive layer, and a conductive element. The dielectric layer has a first surface and a second surface opposite to the first surface. The electronic component is embedded in the dielectric layer. The first conductive layer is embedded in the dielectric layer and adjacent to the first surface of the dielectric layer. The conductive element is disposed on the first surface of the dielectric layer and in contact with the first conductive layer.

公开(公告)号：US20230374689A1

公开(公告)日：2023-11-23

申请号：US17747981

申请日：2022-05-18

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia Chun HSU ,  Chin-Feng WANG

IPC: C25D5/18 ,  C25D7/12 ,  C25D5/00 ,  C25D5/08

CPC classification number: C25D5/18 ,  C25D7/12 ,  C25D5/007 ,  C25D5/08 ,  H01L21/561

Abstract: A method for manufacturing a package includes generating an electric field between an anode and a cathode in an electroplating solution to electroplate a substrate electrically connected to the cathode; depositing metal on a central region of the substrate with a first deposition rate; depositing metal on an outer region of the substrate with a second deposition rate lower than the first deposition rate; and reducing the first deposition rate.

公开(公告)号：US11824029B2

公开(公告)日：2023-11-21

申请号：US17374743

申请日：2021-07-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi-Han Chen ,  Hung-Yi Lin

IPC: H01L23/00 ,  H01L23/498 ,  H01L23/538 ,  H01L25/18 ,  G02B6/30 ,  G02B6/42 ,  H01L25/10 ,  H01L23/31

CPC classification number: H01L24/17 ,  G02B6/30 ,  H01L23/49816 ,  H01L23/5385 ,  H01L24/16 ,  H01L25/18 ,  H01L2224/16227 ,  H01L2224/17177

Abstract: A semiconductor package structure includes a first semiconductor die having an active surface and a passive surface opposite to the active surface, a conductive element leveled with the first semiconductor die, a first redistribution layer (RDL) being closer to the passive surface than to the active surface, a second RDL being closer to the active surface than to the passive surface, and a second semiconductor die over the second RDL and electrically coupled to the first semiconductor die through the second RDL. A first conductive path is established among the first RDL, the conductive element, the second RDL, and the active surface of the first semiconductor die.

公开(公告)号：US11817397B2

公开(公告)日：2023-11-14

申请号：US17129641

申请日：2020-12-21

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chi Sheng Tseng ,  Lu-Ming Lai ,  Hui-Chung Liu ,  Yu-Che Huang

IPC: H01L23/00 ,  H01L23/538 ,  H01L21/50 ,  G01L1/26 ,  H01R12/61 ,  H01L21/60

CPC classification number: H01L23/562 ,  G01L1/26 ,  H01L21/50 ,  H01L23/5387 ,  H01L24/80 ,  H01R12/61 ,  H01L2021/60135

Abstract: A semiconductor device package and a method for manufacturing a semiconductor device package are provided. The semiconductor device package includes a carrier, a sensor module, a connector, and a stress buffer structure. The sensor module is disposed on the carrier. The connector is connected to the carrier. The stress buffer structure connects the connector to the sensor module.

公开(公告)号：US11817362B2

公开(公告)日：2023-11-14

申请号：US17374748

申请日：2021-07-13

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Pang Yuan Lee ,  Kuei-Hao Tseng ,  Chih Lung Lin

IPC: H01L23/31 ,  H01L23/528 ,  H01L21/768

CPC classification number: H01L23/3178 ,  H01L21/76898 ,  H01L23/3114 ,  H01L23/528 ,  H01L2225/06513 ,  H01L2924/151

Abstract: The present disclosure provides an electronic apparatus including a first surface, a second surface, a third surface, a plurality of conductive elements, and an encapsulant. The second surface is nonparallel to the first surface. The third surface is distinct from the first surface and the second surface. The plurality of conductive elements are exposed from the second surface. The encapsulant covers the third surface and exposes the first surface and the second surface.

公开(公告)号：US11798859B2

公开(公告)日：2023-10-24

申请号：US17317762

申请日：2021-05-11

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Chia-Pin Chen ,  Chia-Sheng Tien ,  Wan-Ting Chiu ,  Chi Long Tsai

IPC: H01L23/31 ,  H01L23/00 ,  H01L23/498 ,  H01L25/18 ,  H01L25/065

CPC classification number: H01L23/3135 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/24 ,  H01L24/25 ,  H01L24/73 ,  H01L24/92 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/24146 ,  H01L2224/24175 ,  H01L2224/24265 ,  H01L2224/25171 ,  H01L2224/73267 ,  H01L2224/92244 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06548 ,  H01L2225/06572

Abstract: An electronic device package includes an encapsulated electronic component, a substrate, a conductor and a buffer layer. The encapsulated electronic component includes a redistribution layer (RDL) and an encapsulation layer. The first surface is closer to the RDL than the second surface is. The encapsulation layer includes a first surface, and a second surface opposite to the first surface. The substrate is disposed on the second surface of the encapsulation layer. The conductor is disposed between the substrate and the encapsulated electronic component, and electrically connecting the substrate to the encapsulated electronic component. The buffer layer is disposed between the substrate and the encapsulated electronic component and around the conductor.

公开(公告)号：US11784174B2

公开(公告)日：2023-10-10

申请号：US17168010

申请日：2021-02-04

Applicant: Advanced Semiconductor Engineering, Inc.

Inventor： Ying-Chung Chen

IPC: H01L25/16 ,  H01L33/52 ,  H01L33/00 ,  H01L31/16 ,  H01L31/02 ,  H01L31/18 ,  H01L33/62

CPC classification number: H01L25/167 ,  H01L31/02002 ,  H01L31/16 ,  H01L31/18 ,  H01L33/005 ,  H01L33/52 ,  H01L33/62 ,  H01L2933/005 ,  H01L2933/0066

Abstract: An optical package structure and a method for manufacturing an optical package structure are provided. The optical package structure includes a first die, a bumping structure, and a second die. The first die is on a carrier. The bumping structure is over the first die. The bumping structure includes a light-transmitting portion and a light-blocking portion embedded in the light-transmitting portion. The second die is electrically connected to the carrier. The light-blocking portion of the bumping structure is free from covering the second die.