摘要:
A semiconductor memory device with a phase transformation memory effect includes at least one memory element in a semiconductor substrate, and a cavity arrangement including at least one cavity in spatial proximity to the respective memory element. The cavity is in spatial arrangement with the respective memory element so as to reduce thermal coupling of the respective memory element to the areas surrounding the memory element, which also reduces the thermal conductivity between memory element and the areas surrounding the memory element.
摘要:
A semiconductor component (1) includes a substrate, an active area (2), formed in/on the substrate, and a passivation layer (5) which is provided at least above part of the active area (2). The passivation layer (5) at least partially comprises amorphous, hydrogen-doped carbon. The provision of a passivation layer of this type allows the semiconductor component (1) to be effectively protected against environmental influences.
摘要:
The present invention relates to an integrated transformer configuration having a first coil formed from an electrically conductive material having a spiral course with an essentially rectangular cross section. The transformer has a second coil with a spiral course. The first and the second coils are arranged such that they are electrically insulated from one another. The ratio between the height and the width of the rectangular cross section of the first coil is greater than 1.
摘要:
A field-effect-controllable semiconductor component has at least one source zone and at least one drain zone of a first conductivity type, and at least one body zone of a second conductivity type. The body zone is provided between the source zone and the drain zone. In each case at least a first and a second region of the second conductivity type are provided in a channel zone. The first region has a first doping concentration and the second region has a second doping concentration, which is lower than the first doping concentration. The combination of the two regions produces a semiconductor component threshold voltage greater than zero and the on resistance is lower than that merely due to a channel zone doped with the first or second doping concentration.
摘要:
MOS transistor structure having a trench gate electrode and a reduced on resistance, and methods for fabricating a MOS transistor structure A MOS transistor structure having a trench gate electrode and a reduced on resistance is described, the integral of the doping concentration of the body region in the lateral direction between two adjacent drift regions being greater than or equal to the integral of the doping concentration in a drift region in the same lateral direction. Furthermore, methods for fabricating a MOS transistor structure are disclosed, body regions and drift regions being produced by epitaxial growth and implantation, repeated epitaxial growth or by filling trenches with doped conduction material.
摘要:
The field effect-controlled, vertical semiconductor component is disposed in a semiconductor element and contains at least one internal zone of the first conductivity type, at least one basic zone of the second conductivity type which adjoins the internal zone and a first surface of the semiconductor element, and at least one source zone of the first conductivity type which is disposed in the basic zone. At least one further basic zone of the second conductivity type is spaced apart from the basic zone by an intermediate zone of the first conductivity type, and at least one source contact zone is provided which connects the source zones, the basic zones and the further basic zones to one another with low impedance.
摘要:
A method is disclosed for producing a micromechanical component. The micromechanical component has sensor holes, wherein at least one component protective layer and/or a spacer coating is applied on the component before separating the wafer into chips. The component protective layer sealingly covers at least the walls of the holes extending parallel to the surface of the wafer and perpendicular to the surface of the wafer and the spacer coating sealingly covers at least the walls of the holes extending parallel to the surface of the wafer.
摘要:
A fusible link in an integrated semiconductor circuit and a process for producing the fusible link contemplate the disposition of a fusible link, which is constructed with a cross-sectional constriction as a desired fusing point for its conductor track, in a void. A surface of the void and/or a bare conductor track can be covered with a protection layer, to prevent corrosion. The advantages of such a fusible link are a lower ignition energy and increased reliability. The fusible link may be used as a memory element of a PROM.
摘要:
A field effect-controllable semiconductor component, such as a new IGBT using planar technology, includes a shielding zone disposed about a base zone, resulting in elevation of a minority charge carrier density at a cathode side of the IGBT, leading to a reduction of forward voltage. The effect of a drift field produced due to a concentration gradient between the shielding zone and the base zone is that the inner zone no longer acts as a sink for the minority charge carriers. In order to ensure that the breakdown voltage of the IGBT is not reduced by the incorporation of the shielding zone, a non-connected, floating region of high conductivity is disposed in the region of the inner zone. A lower edge of the non-connected, floating region is deeper in the inner zone than a lower edge of the shielding zone. The non-connected, floating region has a conduction type opposite that of the shielding zone and the inner zone.
摘要:
In order to avoid sticking effects before a movable micromechanical structure is laid bare, in a production method for a micromechanical component with a movable structure, the structure is joined to a suitable mount, such as the substrate, through an auxiliary structure, and this auxiliary structure is not removed until after the movable structure is laid bare. This method is compatible with IC production processes for integrated circuits.