公开(公告)号：US08829482B1

公开(公告)日：2014-09-09

申请号：US13242854

申请日：2011-09-23

申请人： Antonio R. Gallo ,  Chakravarthy Gopalan ,  Yi Ma

发明人： Antonio R. Gallo ,  Chakravarthy Gopalan ,  Yi Ma

IPC分类号： H01L29/778

CPC分类号： H01L45/145 ,  G11C13/0011 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/1266 ,  H01L45/142

摘要： A programmable impedance memory device structure can include a multi-layer variable impedance memory element formed on a planar surface of a first barrier layer, the multi-layer variable impedance memory element comprising a plurality of layers substantially parallel to the planar surface, including a memory material layer in contact with the planar surface, the first barrier layer being formed above a first insulating layer; and a second barrier layer formed over the memory element having a top surface substantially parallel with the planar surface. The first and second barrier layers can have lower mobility rates for at least one element within the memory material layer than the first insulating layer, and the memory material layer can be programmable by application of an electrical field between at least two different impedance states.

摘要翻译： 可编程阻抗存储器件结构可以包括形成在第一阻挡层的平坦表面上的多层可变阻抗存储元件，所述多层可变阻抗存储元件包括基本上平行于平面的多个层，包括存储器 材料层与平坦表面接触，第一阻挡层形成在第一绝缘层之上; 以及形成在所述存储元件上方的第二阻挡层，其具有与所述平坦表面基本平行的顶表面。 第一和第二阻挡层对于存储材料层内的至少一个元件可以具有比第一绝缘层更低的迁移率，并且存储材料层可以通过在至少两个不同的阻抗状态之间施加电场来编程。

公开(公告)号：US20120133780A1

公开(公告)日：2012-05-31

申请号：US13310729

申请日：2011-12-03

申请人： Zhengdong Zhang ,  Yasuyuki Matsushita ,  Yi Ma

发明人： Zhengdong Zhang ,  Yasuyuki Matsushita ,  Yi Ma

IPC分类号： H04N17/00

CPC分类号： G06T7/0018 ,  G06T7/80 ,  G06T2207/20104 ,  H04N17/002

摘要： A “Camera Calibrator” provides various techniques for recovering intrinsic camera parameters and distortion characteristics by processing a set of one or more input images. These techniques are based on extracting “Transform Invariant Low-Rank Textures” (TILT) from input images using high-dimensional convex optimization tools for matrix rank minimization and sparse signal recovery. The Camera Calibrator provides a simple, accurate, and flexible method to calibrate intrinsic parameters of a camera even with significant lens distortion, noise, errors, partial occlusions, illumination and viewpoint change, etc. Distortions caused by the camera can then be automatically corrected or removed from images. Calibration is achieved under a wide range of practical scenarios, including using multiple images of a known pattern, multiple images of an unknown pattern, single or multiple images of multiple patterns, etc. Significantly, calibration is achieved without extracting or manually identifying low-level features such as corners or edges from the calibration images.

摘要翻译： “相机校准器”提供了通过处理一组一个或多个输入图像来恢复本征相机参数和失真特性的各种技术。 这些技术基于使用用于矩阵秩最小化和稀疏信号恢复的高维凸优化工具从输入图像中提取“变换不变低阶纹理”（TILT）。 相机校准器提供了一种简单，准确和灵活的校准相机内在参数的方法，即使具有明显的镜头失真，噪点，误差，部分遮挡，照明和视点更改等等，相机产生的失真也可以自动更正或修正 从图像中删除 在广泛的实际情况下实现校准，包括使用已知图案的多个图像，未知图案的多个图像，多个图案的单个或多个图像等。显着地，在不提取或手动识别低级别的情况下实现校准 特征如校准图像的拐角或边缘。

公开(公告)号：US20120042052A1

公开(公告)日：2012-02-16

申请号：US13257362

申请日：2009-11-24

申请人： Yi Ma

发明人： Yi Ma

IPC分类号： G06F15/16

CPC分类号： G06T1/00

摘要： This application discloses distributed image processing methods and system with massive data flow. The image processing system can include three structures: from the top level to the lower level, a file server, a forwarding server and an image processing server. The servers are connected by Ethernet with hardware and socket interface of TCP/IP protocol. When processing a large amount of image data, many forwarding servers can be implemented for file processing in conjunction with one or more file servers. Image analysis servers and forwarding servers can be added to increase processing capacity. A high-level forwarding server can be added for receiving, formatting, transmitting, and distributing image data.

摘要翻译： 本应用程序公开了具有大量数据流的分布式图像处理方法和系统。 图像处理系统可以包括三个结构：从顶层到下层，文件服务器，转发服务器和图像处理服务器。 服务器通过以太网连接TCP / IP协议的硬件和套接字接口。 当处理大量图像数据时，许多转发服务器可以与一个或多个文件服务器一起实现用于文件处理。 可以添加图像分析服务器和转发服务器来增加处理能力。 可以添加高级转发服务器来接收，格式化，发送和分发图像数据。

公开(公告)号：US07863193B2

公开(公告)日：2011-01-04

申请号：US11836326

申请日：2007-08-09

申请人： Yi Ma ,  Philip Allan Kraus ,  Christopher Sean Olsen ,  Khaled Z. Ahmed ,  Abhilash J. Mayur

发明人： Yi Ma ,  Philip Allan Kraus ,  Christopher Sean Olsen ,  Khaled Z. Ahmed ,  Abhilash J. Mayur

IPC分类号： H01L21/44

CPC分类号： B23K26/0738 ,  B23K26/082 ,  B23K26/0876 ,  H01L21/268 ,  H01L21/28518 ,  H01L21/76828 ,  H01L29/665

摘要： Post-laser annealing dopant deactivation is minimized by performing certain silicide formation process steps prior to laser annealing. A base metal layer is deposited on the source-drain regions and the gate electrode, followed by deposition of an overlying compression cap layer, to prevent metal agglomeration at the silicon melting temperature. Thereafter, a rapid thermal process is performed to heat the substrate sufficiently to form metal silicide contacts at the top surfaces of the source-drain regions and of the gate electrode. The method further includes removing the remainder of the metal-containing layer and then depositing an optical absorber layer over the substrate prior to laser annealing near the silicon melting temperature.

摘要翻译： 通过在激光退火之前执行特定的硅化物形成工艺步骤，使激光后退火掺杂剂失活最小化。 在源极 - 漏极区域和栅极电极上沉积贱金属层，随后沉积上覆的压缩覆盖层，以防止在硅熔融温度下的金属聚集。 此后，进行快速热处理以充分加热衬底，以在源极 - 漏极区域和栅电极的顶表面处形成金属硅化物接触。 该方法还包括去除剩余的含金属层，然后在靠近硅熔化温度的激光退火之前，在衬底上沉积光吸收层。

公开(公告)号：US07611976B2

公开(公告)日：2009-11-03

申请号：US11428758

申请日：2006-07-05

申请人： Yi Ma ,  Khaled Z. Ahmed ,  Kevin L. Cunningham ,  Robert C. McIntosh ,  Abhilash J. Mayur ,  Haifan Liang ,  Mark Yam ,  Toi Yue Becky Leung ,  Christopher Olsen ,  Shulin Wang ,  Majeed Foad ,  Gary Eugene Miner

发明人： Yi Ma ,  Khaled Z. Ahmed ,  Kevin L. Cunningham ,  Robert C. McIntosh ,  Abhilash J. Mayur ,  Haifan Liang ,  Mark Yam ,  Toi Yue Becky Leung ,  Christopher Olsen ,  Shulin Wang ,  Majeed Foad ,  Gary Eugene Miner

IPC分类号： H01L21/425

CPC分类号： H01L21/268 ,  H01L21/28035 ,  H01L21/324

摘要： Embodiments of the invention generally provide a method for forming a doped silicon-containing material on a substrate. In one embodiment, the method provides depositing a polycrystalline layer on a dielectric layer and implanting the polycrystalline layer with a dopant to form a doped polycrystalline layer having a dopant concentration within a range from about 1×1019 atoms/cm3 to about 1×1021 atoms/cm3, wherein the doped polycrystalline layer contains silicon or may contain germanium, carbon, or boron. The substrate may be heated to a temperature of about 800° C. or higher, such as about 1,000° C., during the rapid thermal anneal. Subsequently, the doped polycrystalline layer may be exposed to a laser anneal and heated to a temperature of about 1,000° C. or greater, such within a range from about 1,050° C. to about 1,400° C., for about 500 milliseconds or less, such as about 100 milliseconds or less.

摘要翻译： 本发明的实施方案通常提供了在衬底上形成掺杂的含硅材料的方法。 在一个实施例中，该方法提供在电介质层上沉积多晶层并且用掺杂剂注入多晶层以形成掺杂浓度在约1×10 19原子/ cm 3至约1×10 21原子/ cm 3范围内的掺杂多晶层，其中 掺杂多晶层含有硅或可含有锗，碳或硼。 在快速热退火期间，衬底可以被加热到约800℃或更高，例如约1000℃的温度。 随后，掺杂多晶层可以暴露于激光退火并加热至约1000℃或更高的温度，例如在约1050℃至约1400℃的温度下，持续约500毫秒或更短 ，例如约100毫秒或更少。

公开(公告)号：US20080246101A1

公开(公告)日：2008-10-09

申请号：US11696947

申请日：2007-04-05

申请人： Ming Li ,  Yi Ma ,  R. Suryanarayanan Iyer

发明人： Ming Li ,  Yi Ma ,  R. Suryanarayanan Iyer

IPC分类号： H01L29/78 ,  H01L21/4763

CPC分类号： C23C16/24 ,  H01L21/28035 ,  H01L29/4916

摘要： A method for forming a poly-crystalline silicon film on a substrate by positioning a substrate within a processing chamber, heating the processing chamber to a first temperature between about 640° C. and about 720° C., stabilizing a deposition pressure between about 200 Torr and about 350 Torr, introducing a silicon precursor into the processing chamber to deposit a silicon film comprising an amorphous or hemisphere grain film, and heating the processing chamber to a second temperature between about 700° C. and about 750 C.° to anneal the amorphous or hemisphere grain film into a poly-crystalline nano-crystalline grain film.

摘要翻译： 一种通过将衬底定位在处理室内而在衬底上形成多晶硅膜的方法，将处理室加热至约640℃至约720℃之间的第一温度，使沉积压力稳定在约200℃ 乇和约350托，将硅前体引入处理室以沉积包含非晶或半球晶粒膜的硅膜，并将处理室加热至约700℃至约750℃的第二温度以退火 将无定形或半球状晶粒膜变成多晶纳米晶粒膜。

公开(公告)号：US20060019033A1

公开(公告)日：2006-01-26

申请号：US11167070

申请日：2005-06-24

申请人： Shankar Muthukrishnan ,  Rahul Sharangpani ,  Tejal Goyani ,  Pravin Narwankar ,  Shreyas Kher ,  Khaled Ahmed ,  Yi Ma

发明人： Shankar Muthukrishnan ,  Rahul Sharangpani ,  Tejal Goyani ,  Pravin Narwankar ,  Shreyas Kher ,  Khaled Ahmed ,  Yi Ma

IPC分类号： C23C16/00

CPC分类号： H01L21/0228 ,  C23C16/401 ,  C23C16/405 ,  C23C16/4488 ,  C23C16/45525 ,  C23C16/45529 ,  C23C16/56 ,  H01L21/02175 ,  H01L21/02181 ,  H01L21/0234 ,  H01L21/3141 ,  H01L21/3143 ,  H01L21/31637 ,  H01L21/31645

摘要： In one embodiment, a method for forming a dielectric material is provided which includes exposing a substrate sequentially to a metal-containing precursor and an oxidizing gas to form metal oxide (e.g., HfOx) during an ALD process and subsequently exposing the substrate to an inert plasma process and a thermal annealing process. Generally, the metal oxide contains hafnium, tantalum, titanium, aluminum, zirconium, lanthanum or combinations thereof. In one example, the inert plasma process contains argon and is free of nitrogen, while the thermal annealing process contains oxygen. In another example, an ALD process to form a metal oxide includes exposing the substrate sequentially to a metal precursor and an oxidizing gas containing water vapor formed by a catalytic water vapor generator. In an alternative embodiment, a method for forming a dielectric material is provide which includes exposing a substrate to a deposition process to form a metal oxide layer and subsequently exposing the substrate to a nitridation plasma process and a thermal annealing process to form metal oxynitride (e.g., HfOxNy).

摘要翻译： 在一个实施例中，提供了一种用于形成介电材料的方法，其包括在ALD过程期间将衬底依次暴露于含金属的前体和氧化气体以形成金属氧化物（例如，HfO x x x） 随后将衬底暴露于惰性等离子体工艺和热退火工艺中。 通常，金属氧化物含有铪，钽，钛，铝，锆，镧或其组合。 在一个实例中，惰性等离子体工艺包含氩并且不含氮，而热退火工艺含有氧。 在另一个实例中，形成金属氧化物的ALD工艺包括将基板顺序地暴露于金属前体和含有由催化水蒸汽发生器形成的水蒸汽的氧化气体。 在替代实施例中，提供了形成电介质材料的方法，其包括将衬底暴露于沉积工艺以形成金属氧化物层，并随后将衬底暴露于氮化等离子体工艺和热退火工艺以形成金属氮氧化物（例如 ，HfO x N N y）。

公开(公告)号：US06670242B1

公开(公告)日：2003-12-30

申请号：US09651447

申请日：2000-08-30

申请人： David Charles Brady ,  Yi Ma ,  Pradip Kumar Roy

发明人： David Charles Brady ,  Yi Ma ,  Pradip Kumar Roy

IPC分类号： H01L21336

CPC分类号： C30B29/06 ,  C30B33/005 ,  H01L21/02238 ,  H01L21/02255 ,  H01L21/28202 ,  H01L21/28273 ,  H01L21/31604 ,  H01L21/31612 ,  H01L21/31662 ,  H01L21/3185 ,  H01L29/513 ,  H01L29/518

摘要： A method for making an integrated circuit device includes forming source and drain regions in a semiconductor substrate and defining a channel region therebetween, forming a graded, grown, gate oxide layer adjacent the channel region, forming a nitride layer adjacent the gate oxide layer, and forming a gate electrode layer adjacent the nitride layer. The gate oxide layer may be formed by growing a first oxide portion by upwardly ramping the channel region to a first temperature lower than a glass transition temperature, and exposing the channel region to an oxidizing ambient at the first temperature and for a first time period. A second oxide portion may be grown between the first oxide portion and the channel region by exposing the channel region to an oxidizing ambient at a second temperature higher than the glass transition temperature for a second time period so that the second oxide portion has a thickness in a range of about 2% to about 75% of a total thickness of the gate oxide layer. Forming the nitride layer may include forming a non-stoichiometric nitride layer, and the nitride layer is preferably formed to have a thickness of less than about 15 Å. The nitride layer reduces penetration of a dopant, such as boron, into the gate oxide layer.

摘要翻译： 一种制造集成电路器件的方法包括：在半导体衬底中形成源区和漏极区，并在其间限定沟道区，形成与沟道区相邻的渐变，生长的栅极氧化层，形成与栅极氧化物层相邻的氮化物层，以及 形成与氮化物层相邻的栅电极层。 栅极氧化物层可以通过使沟道区域向上斜坡至低于玻璃化转变温度的第一温度并且使第一氧化物部分在第一温度和第一时间段内将沟道区域暴露于氧化环境而形成第一氧化物部分。 在第二氧化物部分可以在第一氧化物部分和沟道区域之间生长，通过在高于玻璃化转变温度的第二温度下将沟道区域暴露于氧化环境第二时间段，使得第二氧化物部分的厚度为 栅极氧化物层的总厚度的约2％至约75％的范围。 形成氮化物层可以包括形成非化学计量的氮化物层，并且氮化物层优选形成为具有小于约的厚度。 氮化物层将诸如硼的掺杂剂的渗透减少到栅极氧化物层中。

公开(公告)号：US06548854B1

公开(公告)日：2003-04-15

申请号：US08995435

申请日：1997-12-22

申请人： Isik C. Kizilyalli ,  Yi Ma ,  Pradip Kumar Roy

发明人： Isik C. Kizilyalli ,  Yi Ma ,  Pradip Kumar Roy

IPC分类号： H01L2976

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L28/56 ,  H01L29/513 ,  H01L29/517

摘要： A gate or capacitor insulator structure using a first grown oxide layer, a high-k dielectric material on the grown oxide layer, and a deposited oxide layer on the high-k dielectric material. The deposited oxide layer is preferably a densified deposited oxide layer. A conducting layer, such as a gate or capacitor plate, may overlay the densified oxide layer.

摘要翻译： 使用第一生长氧化物层，生长的氧化物层上的高k电介质材料和高k电介质材料上的沉积氧化物层的栅极或电容器绝缘体结构。 沉积的氧化物层优选是致密化的沉积氧化物层。 诸如栅极或电容器板的导电层可以覆盖致密的氧化物层。

公开(公告)号：US06417570B1

公开(公告)日：2002-07-09

申请号：US09334977

申请日：1999-06-17

申请人： Yi Ma ,  Pradip K. Roy

发明人： Yi Ma ,  Pradip K. Roy

IPC分类号： H01L2940

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28202 ,  H01L29/513 ,  H01L29/518

摘要： A layered gate dielectric structure suppresses boron diffusion and provides a gate dielectric structure which is free of trap sites and pinholes, and which does not introduce mobility or drive current problems. The layered gate dielectric structure includes a film which is originally formed as a structurally deficient nitride film which is subsequently converted to either an oxynitride film or a stoichiometric nitride film.

摘要翻译： 分层栅介质结构抑制硼扩散，并提供没有陷阱位置和针孔的栅极电介质结构，并且不引入迁移率或驱动电流问题。 层状栅介质结构包括最初形成为结构缺陷的氮化物膜的膜，其随后被转换为氧氮化物膜或化学计量氮化物膜。