公开(公告)号：US08291966B2

公开(公告)日：2012-10-23

申请号：US11608648

申请日：2006-12-08

申请人： Joseph T. Lindgren ,  Warren M. Farnworth ,  William M. Hiatt ,  Nishant Sinha

发明人： Joseph T. Lindgren ,  Warren M. Farnworth ,  William M. Hiatt ,  Nishant Sinha

IPC分类号： F28F7/02 ,  F28D15/02

CPC分类号： H01L23/367 ,  H01L23/427 ,  H01L24/31 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/10158 ,  H01L2924/19041 ,  H01L2224/0401

摘要： Microelectronic devices with improved heat dissipation, methods of making microelectronic devices, and methods of cooling microelectronic devices are disclosed herein. In one embodiment, the microelectronic device includes a microelectronic substrate having a first surface, a second surface facing opposite from the first surface, and a plurality of active devices at least proximate to the first surface. The second surface has a plurality of heat transfer surface features that increase the surface area of the second surface. In another embodiment, an enclosure having a heat sink and a single or multi-phase thermal conductor can be positioned adjacent to the second surface to transfer heat from the active devices.

摘要翻译： 本文公开了具有改善的散热的微电子器件，制造微电子器件的方法以及冷却微电子器件的方法。 在一个实施例中，微电子器件包括具有第一表面，与第一表面相对的第二表面的微电子衬底以及至少靠近第一表面的多个有源器件。 第二表面具有增加第二表面的表面积的多个传热表面特征。 在另一个实施例中，具有散热器和单相或多相热导体的外壳可以邻近第二表面定位以传递来自有源器件的热量。

公开(公告)号：US20120220126A1

公开(公告)日：2012-08-30

申请号：US13466349

申请日：2012-05-08

申请人： Paul Morgan ,  Nishant Sinha

发明人： Paul Morgan ,  Nishant Sinha

IPC分类号： H01L21/283

CPC分类号： H01L21/283 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76879

摘要： Selective deposition of metal over dielectric layers in a manner that minimizes of eliminates keyhole formation is provided. According to one embodiment, a dielectric target layer is formed over a substrate layer, wherein the target layer may be configured as allow conformal metal deposition, and a dielectric second layer is formed over the target layer, wherein the second layer may be configured to allow bottom-up metal deposition. An opening may then be formed in the second layer and metal may be selectively deposited over substrate layer.

摘要翻译： 提供金属在电介质层上的选择性沉积，以最小化消除键孔形成的方式。 根据一个实施例，介电目标层形成在衬底层上，其中目标层可以被配置为允许保形金属沉积，并且在目标层上形成电介质第二层，其中第二层可被配置为允许 自下而上的金属沉积。 然后可以在第二层中形成开口，并且可以在衬底层上选择性地沉积金属。

公开(公告)号：US08252119B2

公开(公告)日：2012-08-28

申请号：US12195003

申请日：2008-08-20

申请人： Joseph N. Greeley ,  Nishant Sinha ,  Lukasz Hupka ,  Timothy A. Quick ,  Prashant Raghu

发明人： Joseph N. Greeley ,  Nishant Sinha ,  Lukasz Hupka ,  Timothy A. Quick ,  Prashant Raghu

IPC分类号： B08B3/08

CPC分类号： B08B3/08 ,  C11D3/37 ,  C11D7/06 ,  C11D11/0047 ,  H01L21/02057 ,  H01L21/67051 ,  H01L21/67057

摘要： Several embodiments of cleaning systems using polyelectrolyte and various associated methods for cleaning microelectronic substrates are disclosed herein. One embodiment is directed to a system that has a substrate support for holding the microelectronic substrate, a dispenser positioned above the substrate support and facing a surface of the microelectronic substrate, a reservoir in fluid communication with the dispenser via a conduit, and a washing solution contained in the reservoir. The washing solution includes a polyelectrolyte.

摘要翻译： 本文公开了使用聚电解质的清洁系统和用于清洁微电子衬底的各种相关方法的几个实施例。 一个实施例涉及一种具有用于保持微电子基板的基板支撑件的系统，位于基板支撑件上方并面向微电子基板的表面的分配器，经由导管与分配器流体连通的储存器和洗涤液 储存在容器中。 洗涤液包括聚电解质。

公开(公告)号：US08183157B2

公开(公告)日：2012-05-22

申请号：US13032492

申请日：2011-02-22

申请人： Naraji B Rana ,  Nishant Sinha ,  Prashant Raghu ,  Jim J. Hofmann ,  Neil Joseph Greeley

发明人： Naraji B Rana ,  Nishant Sinha ,  Prashant Raghu ,  Jim J. Hofmann ,  Neil Joseph Greeley

IPC分类号： H01L21/311

CPC分类号： H01L28/90 ,  H01G4/33 ,  H01L21/28282 ,  H01L21/31144 ,  H01L21/32139 ,  H01L27/10814 ,  H01L27/10855 ,  H01L27/11807 ,  Y10S438/906 ,  Y10T29/43

摘要： Some embodiments include methods of forming capacitors. Storage nodes are formed within a material. The storage nodes have sidewalls along the material. Some of the material is removed to expose portions of the sidewalls. The exposed portions of the sidewalls are coated with a substance that isn't wetted by water. Additional material is removed to expose uncoated regions of the sidewalls. The substance is removed, and then capacitor dielectric material is formed along the sidewalls of the storage nodes. Capacitor electrode material is then formed over the capacitor dielectric material. Some embodiments include methods of utilizing a silicon dioxide-containing masking structure in which the silicon dioxide of the masking structure is coated with a substance that isn't wetted by water.

摘要翻译： 一些实施例包括形成电容器的方法。 存储节点形成在材料内。 存储节点具有沿材料的侧壁。 去除一些材料以暴露侧壁的部分。 侧壁的暴露部分涂覆有未被水润湿的物质。 除去附加材料以暴露侧壁的未涂覆区域。 物质被去除，然后电容器电介质材料沿着存储节点的侧壁形成。 然后在电容器电介质材料上形成电容器电极材料。 一些实施方案包括利用含二氧化硅掩蔽结构的方法，其中掩蔽结构的二氧化硅被未被水润湿的物质涂覆。

公开(公告)号：US08018069B2

公开(公告)日：2011-09-13

申请号：US12815900

申请日：2010-06-15

申请人： Nishant Sinha

发明人： Nishant Sinha

IPC分类号： H01L23/48

CPC分类号： H01L23/147 ,  H01L21/76898 ,  H01L23/49827 ,  H01L24/48 ,  H01L25/0657 ,  H01L2224/48091 ,  H01L2225/06572 ,  H01L2924/00014 ,  H01L2924/00015 ,  H01L2924/01078 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2224/85399 ,  H01L2224/05599 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： Devices with conductive through-waver vias. In one embodiment, the device is formed by a method comprising providing a layer of semiconducting material, forming a layer of metal on a first side of the layer of semiconducting material, forming an opening in the layer of semiconducting material to thereby expose a portion of the layer of metal, the opening extending from at least a second side of the layer of semiconducting material to the layer of metal, and performing a deposition process to form a conductive contact in the opening using the exposed portion of the metal layer as a seed layer.

摘要翻译： 具有导电通过通孔的器件。 在一个实施例中，器件通过包括提供半导体材料层的方法形成，在半导体材料层的第一侧上形成金属层，在半导体材料层中形成开口，从而暴露出部分 所述金属层从所述半导体材料层的至少第二侧延伸到所述金属层，并且执行沉积工艺以在所述开口中使用所述金属层的暴露部分作为种子形成导电接触 层。

公开(公告)号：US20110149656A1

公开(公告)日：2011-06-23

申请号：US12646847

申请日：2009-12-23

申请人： Sanh D. Tang ,  Nishant Sinha ,  John Zahurak

发明人： Sanh D. Tang ,  Nishant Sinha ,  John Zahurak

IPC分类号： G11C16/04 ,  H01L29/788 ,  H01L21/84 ,  H01L21/336

CPC分类号： H01L27/11551 ,  G11C16/0458 ,  G11C16/0483 ,  H01L21/28273 ,  H01L27/11524 ,  H01L27/11556 ,  H01L29/66825 ,  H01L29/7881

摘要： Embodiments of the invention pertain to vertical memory structures. Embodiments of the invention describe memory nodes comprising two memory cells on opposing sides of a vertical channel separating a source region and a drain region. Embodiments of the invention may utilize floating gate NAND memory cells, polysilicon diodes, MiM diodes, or MiiM diodes. Embodiments of the invention may be used to form flash memory, RRAM, Memristor RAM, Oxide Ram or OTPROM.

摘要翻译： 本发明的实施例涉及垂直存储器结构。 本发明的实施例描述了在分离源区和漏区的垂直沟道的相对侧上包括两个存储单元的存储器节点。 本发明的实施例可以利用浮动栅极NAND存储器单元，多晶硅二极管，MiM二极管或者MiiM二极管。 本发明的实施例可用于形成闪速存储器，RRAM，忆阻器RAM，氧化物Ram或OTPROM。

公开(公告)号：US07951414B2

公开(公告)日：2011-05-31

申请号：US12052039

申请日：2008-03-20

申请人： Nishant Sinha

发明人： Nishant Sinha

IPC分类号： B05D5/12

CPC分类号： H01L21/76877 ,  C25D5/02 ,  C25D5/04 ,  C25D5/08 ,  C25D5/10 ,  C25D21/10 ,  H01L21/288 ,  H01L21/76816 ,  H01L21/7684 ,  H01L21/76847 ,  H01L21/76874 ,  H01L21/76879

摘要： Some embodiments include methods of forming conductive material within high aspect ratio openings and low aspect ratio openings. Initially, the high aspect ratio openings may be filled with a first conductive material while the low aspect ratio openings are only partially filled with the first conductive material. Additional material may then be selectively plated over the first conductive material within the low aspect ratio openings relative to the first conductive material within the high aspect ratio openings. In some embodiments, the additional material may be activation material that only partially fills the low aspect ratio opening, and another conductive material may be subsequently plated onto the activation material to fill the low aspect ratio openings.

摘要翻译： 一些实施例包括在高纵横比开口和低纵横比开口内形成导电材料的方法。 首先，高纵横比开口可以填充第一导电材料，而低纵横比开口仅部分地填充有第一导电材料。 然后可以在高纵横比开口内相对于第一导电材料，在低纵横比开口内的第一导电材料上选择性地镀覆附加材料。 在一些实施例中，附加材料可以是仅部分填充低纵横比开口的活化材料，并且可以随后将另一种导电材料电镀到活化材料上以填充低纵横比开口。

公开(公告)号：US07915735B2

公开(公告)日：2011-03-29

申请号：US11198208

申请日：2005-08-05

申请人： Paul Morgan ,  Nishant Sinha

发明人： Paul Morgan ,  Nishant Sinha

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40 ,  H01L21/44

CPC分类号： H01L21/283 ,  H01L21/76802 ,  H01L21/76834 ,  H01L21/76879

摘要： Selective deposition of metal over dielectric layers in a manner that minimizes or eliminates keyhole formation is provided. According to one embodiment, a dielectric target layer is formed over a substrate layer, wherein the target layer may be configured to allow conformal metal deposition, and a dielectric second layer is formed over the target layer, wherein the second layer may be configured to allow bottom-up metal deposition. An opening may then be formed in the second layer and metal may be selectively deposited over the substrate layer.

摘要翻译： 提供了以最小化或消除钥匙孔形成的方式在电介质层上选择性沉积金属。 根据一个实施例，介电目标层形成在衬底层上，其中目标层可以被配置为允许保形金属沉积，并且在目标层上形成介电第二层，其中第二层可以被配置为允许 自下而上的金属沉积。 然后可以在第二层中形成开口，并且可以在衬底层上选择性地沉积金属。

公开(公告)号：US20110048475A1

公开(公告)日：2011-03-03

申请号：US12944527

申请日：2010-11-11

申请人： Nishant Sinha

发明人： Nishant Sinha

IPC分类号： B08B3/12

CPC分类号： B08B3/12 ,  H01L21/67057

摘要： Megasonic cleaning systems and methods of using megasonic pressure waves to impart cavitation energy proximate a surface of a microelectronic substrate are disclosed herein. In one embodiment, a megasonic cleaning system includes a process tank for containing a liquid, a support element for carrying a substrate submerged in the liquid, and first and second transducers positioned in the tank. The first transducer is further positioned and/or operated to initiate cavitation events in a bulk portion of the liquid proximate a surface of the substrate. The second transducer is further positioned and/or operated to control an interface of fluid friction between the substrate and the bulk portion of the liquid.

摘要翻译： 这里公开了使用兆声波压力波在微电子衬底的表面附近赋予空化能的超声波清洗系统和方法。 在一个实施例中，兆声波清洁系统包括用于容纳液体的处理罐，用于承载浸没在液体中的基板的支撑元件，以及位于罐中的第一和第二换能器。 第一换能器被进一步定位和/或操作以在靠近基底表面的液体的主体部分中引发空化事件。 第二换能器被进一步定位和/或操作以控制衬底和液体的主体部分之间的流体摩擦的界面。

公开(公告)号：US20100230724A1

公开(公告)日：2010-09-16

申请号：US12402103

申请日：2009-03-11

申请人： Nishant Sinha ,  Krishna K. Parat

发明人： Nishant Sinha ,  Krishna K. Parat

IPC分类号： H01L29/00 ,  H01L21/00

CPC分类号： H01L27/11551 ,  H01L27/11524

摘要： Methods of forming semiconductor devices that include one or more arrays of memory devices in a three-dimensional arrangement, such as those that include forming a conductive contact in a dielectric material overlying a memory array, wherein a wafer bonding and cleaving process may be utilized to provide a foundation material for forming another memory array having an active region in electrical contact with the conductive contact. Additionally, the conductive contact may be formed in a donor wafer, which in turn may be bonded to a dielectric material overlying a memory array using another wafer bonding process. Novel semiconductor devices and structures including the same may be formed using such methods, for example.

摘要翻译： 形成包括三维布置的一个或多个存储器件阵列的半导体器件的方法，例如包括在覆盖存储器阵列的电介质材料中形成导电接触的方法，其中可利用晶片接合和切割工艺 提供用于形成具有与导电触点电接触的有源区的另一个存储器阵列的基础材料。 此外，导电接触可以形成在施主晶片中，该施主晶片又可以使用另一晶片接合工艺将其结合到覆盖存储器阵列的电介质材料上。 可以使用例如这样的方法形成包括其的新型半导体器件和结构。