公开(公告)号：US6060891A

公开(公告)日：2000-05-09

申请号：US797719

申请日：1997-02-11

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1/073 ,  G01R31/28

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：USD402638S

公开(公告)日：1998-12-15

申请号：US70029

申请日：1997-04-25

申请人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

设计人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

公开(公告)号：USD401567S

公开(公告)日：1998-11-24

申请号：US70005

申请日：1997-04-25

申请人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

设计人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

公开(公告)号：US5815000A

公开(公告)日：1998-09-29

申请号：US580687

申请日：1995-12-29

申请人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

发明人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

IPC分类号： G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L21/68 ,  H01L23/13 ,  H01L23/498 ,  H05K3/00 ,  H05K3/42 ,  G01R31/02

CPC分类号： G01R1/0466 ,  G01R1/0483 ,  G01R31/2893 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/80 ,  H01L24/85 ,  H05K3/4007 ,  G01R3/00 ,  G01R31/2863 ,  H01L2224/16145 ,  H01L2224/48 ,  H01L2224/85001 ,  H01L2225/06562 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15174 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K2201/0133 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/0307 ,  H05K2203/0723 ,  H05K3/0058 ,  H05K3/0067 ,  H05K3/423

摘要： A method for packaging and testing a semiconductor die is provided. The method includes forming a temporary package for the die that has a size, shape and lead configuration that is the same as a conventional plastic or ceramic semiconductor package. The temporary package can be used for burn-in testing of the die using standard equipment. The die can then be removed from the package and certified as a known good die. In an illustrative embodiment the package is formed in a SOJ configuration. The package includes a base, an interconnect and a force applying mechanism. The package base can be formed of ceramic or plastic using a ceramic lamination process or a Cerdip formation process.

摘要翻译： 提供了一种用于封装和测试半导体管芯的方法。 该方法包括形成具有与常规塑料或陶瓷半导体封装相同的尺寸，形状和引线配置的裸片的临时封装。 临时包装可用于使用标准设备对模具进行老化测试。 然后可以将模具从包装中取出并被认证为已知的好的模具。 在说明性实施例中，封装形成为SOJ构造。 该包装包括底座，互连和力施加机构。 封装基底可以使用陶瓷层压工艺或Cerdip形成工艺由陶瓷或塑料制成。

公开(公告)号：USD394844S

公开(公告)日：1998-06-02

申请号：US70050

申请日：1997-04-25

申请人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

设计人： Warren M. Farnworth ,  Alan G. Wood ,  David R. Hembree ,  Salman Akram

公开(公告)号：US06285203B1

公开(公告)日：2001-09-04

申请号：US09332838

申请日：1999-06-14

申请人： Salman Akram ,  Warren M. Farnworth ,  Michael E. Hess ,  David R. Hembree

发明人： Salman Akram ,  Warren M. Farnworth ,  Michael E. Hess ,  David R. Hembree

IPC分类号： G01R102

CPC分类号： G01R1/0483 ,  G01R31/2886 ,  H01L2224/05554 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16145 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/8592 ,  H01L2924/01046 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/10157 ,  H01L2924/10253 ,  H01L2924/15312 ,  H01L2924/1815 ,  H01L2924/00014 ,  H01L2924/00

摘要： A test system for testing semiconductor components includes an interconnect having contacts for making temporary electrical connections with terminal contacts on the components. The interconnect contacts can be configured to electrically engage planar terminal contacts (e.g., bond pads, test pads) or bumped terminal contacts (e.g., solder bumps, solder balls) on the components. The test system also includes an alignment member for aligning the components to the interconnect. Different embodiments of the alignment member include: a curable polymer material molded in place on the interconnect; an alignment opening formed as an etched pocket in a substrate of the interconnect; and a separate fence attached to the interconnect using an alignment fixture.

公开(公告)号：US06798224B1

公开(公告)日：2004-09-28

申请号：US10072734

申请日：2002-02-05

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US06639416B1

公开(公告)日：2003-10-28

申请号：US09897592

申请日：2001-07-02

申请人： Salman Akram ,  Alan G. Wood ,  David R. Hembree ,  Warren M. Farnworth

发明人： Salman Akram ,  Alan G. Wood ,  David R. Hembree ,  Warren M. Farnworth

IPC分类号： G01R3102

CPC分类号： G01R31/2886 ,  G01R1/0483 ,  H01L2224/05554 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/30107 ,  H01L2924/00014 ,  H01L2924/00

摘要： A method and carrier for testing semiconductor dice such as bare dice or chip scale packages are provided. The carrier includes a base for retaining a single die, an interconnect for establishing temporary electrical communication with the die, and a force applying mechanism for biasing the die and interconnect together. In an illustrative embodiment the base includes conductors arranged in a universal pattern adapted to electrically connect to different sized interconnects. Interconnects are thus interchangeable on a base for testing different types of dice using the same base. The conductors on the base can be formed on a planar active surface of the base or on a stepped active surface having different sized cavities for mounting different sized interconnects. In an alternate embodiment the carrier includes an interposer. In a first interposer embodiment, the interposer connects directly to external test circuitry and can be changed to accommodate different sized interconnects. In a go second interposer embodiment, the interposer connects to conductors on the base and adapts the base for use with different sized interconnects.

摘要翻译： 提供了用于测试半导体裸片（例如裸裸片或芯片级封装）的方法和载体。 载体包括用于保持单个管芯的基座，用于建立与管芯的临时电连通的互连件，以及用于偏压管芯并互连在一起的施力机构。 在说明性实施例中，底座包括以适于电连接到不同尺寸的互连件的通用图案布置的导体。 因此，互连在基座上可以互换，用于使用相同的基底测试不同类型的骰子。 基座上的导体可以形成在基座的平面有源表面上或具有不同尺寸的空腔的阶梯式有源表面上，用于安装不同尺寸的互连。在替代实施例中，载体包括插入器。 在第一插入器实施例中，插入器直接连接到外部测试电路，并且可以改变以适应不同尺寸的互连。 在第二插入器实施例中，插入器连接到基座上的导体，并且使基座适配不同大小的互连使用。

公开(公告)号：US06359456B1

公开(公告)日：2002-03-19

申请号：US09929388

申请日：2001-08-14

申请人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

发明人： David R. Hembree ,  Warren M. Farnworth ,  Salman Akram ,  Alan G. Wood ,  C. Patrick Doherty ,  Andrew J. Krivy

IPC分类号： G01R1073

CPC分类号： G01R1/073 ,  G01R31/2886

摘要： A probe card for testing semiconductor wafers, and a method and system for testing wafers using the probe card are provided. The probe card is configured for use with a conventional testing apparatus, such as a wafer probe handler, in electrical communication with test circuitry. The probe card includes an interconnect substrate having contact members for establishing electrical communication with contact locations on the wafer. The probe card also includes a membrane for physically and electrically connecting the interconnect substrate to the testing apparatus, and a compressible member for cushioning the pressure exerted on the interconnect substrate by the testing apparatus. The interconnect substrate can be formed of silicon with raised contact members having penetrating projections. Alternately the contact members can be formed as indentations for testing bumped wafers. The membrane can be similar to multi layered TAB tape including metal foil conductors attached to a flexible, electrically-insulating, elastomeric tape. The probe card can be configured to contact all of the dice on the wafer at the same time, so that test signals can be electronically applied to selected dice as required.

摘要翻译： 提供了用于测试半导体晶片的探针卡，以及使用探针卡测试晶片的方法和系统。 探针卡被配置用于与测试电路电连通的常规测试装置，例如晶片探测器处理器。 探针卡包括具有用于与晶片上的接触位置建立电连通的接触构件的互连基板。 探针卡还包括用于将互连基板物理和电连接到测试装置的膜，以及用于缓冲由测试装置施加在互连基板上的压力的可压缩构件。 互连衬底可以由具有穿透突起的凸起接触构件的硅形成。 或者，接触构件可以形成为用于测试凸起的晶片的凹陷。 膜可以类似于多层TAB带，其包括附接到柔性，电绝缘的弹性体带的金属箔导体。 探针卡可以配置为同时接触晶片上的所有骰子，以便测试信号可以根据需要以电子方式应用于选定的骰子。

公开(公告)号：US5949242A

公开(公告)日：1999-09-07

申请号：US657854

申请日：1996-05-31

申请人： Alan G. Wood ,  Warren M. Farnworth ,  Salman Akram ,  David R. Hembree

发明人： Alan G. Wood ,  Warren M. Farnworth ,  Salman Akram ,  David R. Hembree

IPC分类号： G01R31/26 ,  G01R1/04 ,  G01R1/067 ,  G01R1/073 ,  G01R3/00 ,  G01R31/28 ,  H01L21/60 ,  H01L21/66 ,  H01L21/68 ,  H01L23/13 ,  H01L23/498 ,  H05K3/00 ,  H05K3/40 ,  H05K3/42 ,  G01R31/02

CPC分类号： G01R1/07314 ,  G01R1/0433 ,  G01R1/0483 ,  G01R31/2886 ,  G01R31/2893 ,  H01L21/6835 ,  H01L22/20 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/80 ,  H01L24/85 ,  H05K3/4007 ,  G01R1/0466 ,  G01R3/00 ,  G01R31/2863 ,  G01R31/2889 ,  H01L2224/16145 ,  H01L2224/48 ,  H01L2224/85001 ,  H01L2224/85205 ,  H01L2225/06562 ,  H01L24/48 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01042 ,  H01L2924/01074 ,  H01L2924/01077 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15151 ,  H01L2924/15174 ,  H01L2924/19041 ,  H01L2924/30105 ,  H05K2201/0133 ,  H05K2201/0347 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/09481 ,  H05K2201/09563 ,  H05K2203/0307 ,  H05K2203/0723 ,  H05K3/0058 ,  H05K3/0067 ,  H05K3/423

摘要： A method and apparatus for testing unpackaged semiconductor dice includes a mother board and a plurality of interconnects mounted on the mother board and adapted to establish a temporary electrical connection with the dice. The interconnects can be formed with a silicon substrate and raised contact members for contacting the bond pads of a die. Alternately the interconnects can be formed with micro bump contact members mounted on an insulating film. The mother board allows each die to be tested separately for speed and functionality and to also be burn-in tested in parallel using standard burn-in ovens. In an alternate embodiment testing is performed using a mother board/daughter board arrangement. Each daughter board includes interconnects that allow the dice to be tested individually for speed and functionality. Multiple daughter boards can then be mounted to the mother board for burn-in testing using standard burn-in ovens.

摘要翻译： 用于测试未封装半导体晶片的方法和装置包括安装在母板上的母板和多个互连件，并且适于与裸片建立临时电连接。 互连可以形成有硅衬底和用于接触管芯的接合焊盘的凸起的接触构件。 或者，互连可以由安装在绝缘膜上的微凸块接触构件形成。 母板允许每个模具分别测试速度和功能，并且还可以使用标准烧录炉并行测试。 在替代实施例中，使用母板/子板布置进行测试。 每个子板包括互连，允许骰子单独测试速度和功能。 然后可以将多个子板安装到母板上，以使用标准老化炉进行老化测试。