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    ELECTRICAL AND OPTICAL THROUGH-SILICON-VIA (TSV)
    71.
    发明申请
    ELECTRICAL AND OPTICAL THROUGH-SILICON-VIA (TSV) 有权
    电气和光电通硅（TSV）

    公开(公告)号：US20160116672A1

    公开(公告)日：2016-04-28

    申请号：US14879129

    申请日：2015-10-09

    Applicant: International Business Machines Corporation

    Inventor： Effendi Leobandung

    IPC: G02B6/12 ,  H01L23/532 ,  H01L23/528 ,  G02B6/132 ,  H01L21/768 ,  H01L25/00 ,  G02B6/136 ,  H01L23/48 ,  H01L25/065

    CPC classification number: G02B6/12002 ,  G02B6/132 ,  G02B6/136 ,  G02B6/43 ,  G02B2006/12176 ,  H01L21/76834 ,  H01L21/76898 ,  H01L23/481 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/16145 ,  H01L2225/06541 ,  H01L2225/06544

    Abstract: A through-silicon-via structure formed within a semiconductor device is provided. The TSV structure may include a trench located within a substrate of the semiconductor device, an insulator layer located on at least one side wall of the trench, an electrically conductive layer located on the insulator layer, a first dielectric layer located on the electrically conductive layer, and a second dielectric layer located on the first dielectric layer and filling the trench. The second dielectric layer includes a higher refractive index relative to the first dielectric layer, such that the first and the second dielectric layer create an optical waveguide. The electrically conductive layer provides electrical coupling between the semiconductor device and another semiconductor device, while the optical waveguide provides optical coupling between the semiconductor device and the another semiconductor device, whereby the another semiconductor device has another substrate that is separate from the substrate of the semiconductor device.

    Abstract translation: 提供了形成在半导体器件内的通硅通孔结构。 TSV结构可以包括位于半导体器件的衬底内的沟槽，位于沟槽的至少一个侧壁上的绝缘体层，位于绝缘体层上的导电层，位于导电层上的第一介电层 以及位于第一介电层上并填充沟槽的第二电介质层。 第二电介质层包括相对于第一电介质层的较高的折射率，使得第一和第二介电层产生光波导。 导电层在半导体器件和另一个半导体器件之间提供电耦合，而光波导在半导体器件和另一个半导体器件之间提供光学耦合，由此另一个半导体器件具有与半导体衬底分开的另一衬底 设备。

    OPTICAL COUPLER INTEGRATED ON A SUBSTRATE AND COMPRISING THREE ELEMENTS
    72.
    发明申请
    OPTICAL COUPLER INTEGRATED ON A SUBSTRATE AND COMPRISING THREE ELEMENTS 有权
    光耦合器集成在基板上并包含三个元件

    公开(公告)号：US20160091676A1

    公开(公告)日：2016-03-31

    申请号：US14857223

    申请日：2015-09-17

    Applicant: Commissariat A L'Energie Atomique et aux Energies Alternatives

    Inventor： Julien FAVREAU ,  Salim Boutami ,  Mickael Brun

    IPC: G02B6/42 ,  G02B6/132 ,  G02B6/122 ,  G02B6/136

    CPC classification number: G02B6/4204 ,  G02B6/12004 ,  G02B6/122 ,  G02B6/1228 ,  G02B6/132 ,  G02B6/136 ,  G02B6/4257 ,  G02B2006/12121

    Abstract: An optical coupler integrated on a substrate, that will optically couple a laser and a waveguide and including an external element, including two arms separated by a notch, this notch being delimited laterally by two first walls at a spacing that reduces towards the bottom of the notch; a central element, located in the notch delimited laterally by two second walls and with a first region in which the two second walls are in direct contact with two first walls as far as the bottom of the notch; and an intermediate element, extending between the external element and the central element. The optical index of the central element is greater than the optical index of the intermediate element, itself greater than the optical index of the arms of the external element. Such an optical coupler provides efficient coupling between a laser emitting in the mid-infrared and a waveguide integrated on a substrate.

    Abstract translation: 集成在基板上的光耦合器，其将光学地耦合激光器和波导并且包括外部元件，包括由凹口分开的两个臂，该凹口由两个第一壁横向限定，间隔朝向底部 缺口; 位于由两个第二壁横向限定的凹口中的中心元件，并且具有第一区域，其中两个第二壁与两个第一壁直接接触到凹口的底部; 以及在外部元件和中心元件之间延伸的中间元件。 中心元件的光学折射率大于中间元件的光学折射率，其本身大于外部元件的臂的光学折射率。 这种光耦合器提供了在中红外发射的激光与集成在衬底上的波导之间的有效耦合。

    DIFFERENTIAL SILICON INTERFACE FOR DIELECTRIC SLAB WAVEGUIDE
    73.
    发明申请
    DIFFERENTIAL SILICON INTERFACE FOR DIELECTRIC SLAB WAVEGUIDE 审中-公开
    用于电介质波导的差分硅接口

    公开(公告)号：US20160077293A1

    公开(公告)日：2016-03-17

    申请号：US14692794

    申请日：2015-04-22

    Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.

    Inventor： Chewn-Pu Jou ,  Tien-I Bao

    IPC: G02B6/42 ,  G02B6/132 ,  G02B6/136

    CPC classification number: G02B6/4274 ,  G02B6/102 ,  G02B6/132 ,  G02B6/136 ,  G02B6/43

    Abstract: The present disclosure relates to an integrated chip having differential coupling elements that couple electromagnetic radiation having a frequency outside of the visible spectrum between a silicon substrate and a dielectric waveguide overlying the silicon substrate. In some embodiments, the integrated chip has a dielectric waveguide disposed within an inter-level dielectric (ILD) material overlying a semiconductor substrate. A differential driver circuit generates a differential signal having a first transmission signal component at a first output node and a complementary second transmission signal component at a second output node. A first transmission electrode located along a first side of the dielectric waveguide receives the first transmission signal component from the first output node, and a second transmission electrode located along a second side of the dielectric waveguide receives the complementary second transmission signal component from the second output node.

    Abstract translation: 本公开涉及一种具有差分耦合元件的集成芯片，该耦合元件在硅衬底和覆盖硅衬底的电介质波导之间耦合具有可见光谱外的频率的电磁辐射。 在一些实施例中，集成芯片具有布置在覆盖半​​导体衬底的层间电介质（ILD）材料内的介质波导。 差分驱动器电路产生在第一输出节点处具有第一传输信号分量的差分信号和在第二输出节点处的互补的第二传输信号分量。 沿着电介质波导的第一侧设置的第一传输电极从第一输出节点接收第一传输信号分量，沿着介质波导的第二侧定位的第二传输电极从第二输出端接收互补的第二传输信号分量 节点。

    METHODS OF OPTICAL PATHWAY DEVICE CONSTRUCTION
    76.
    发明申请
    METHODS OF OPTICAL PATHWAY DEVICE CONSTRUCTION 审中-公开
    光路设备结构方法

    公开(公告)号：US20150378101A1

    公开(公告)日：2015-12-31

    申请号：US14751211

    申请日：2015-06-26

    Applicant: Dan Vance

    Inventor： Dan Vance

    IPC: G02B6/132 ,  G02B6/138 ,  G02B1/12

    CPC classification number: G02B6/132 ,  G02B1/12 ,  G02B6/04 ,  G02B6/1221 ,  G02B6/1228 ,  G02B6/138

    Abstract: Disclosed are devices, systems, and methods for construction or fabrication of optical fiber-like devices by depositing curable optical materials of differing indices of refraction in a controlled manner forming integral optical pathways, the integral optical pathways exhibiting total internal reflection and functioning essentially equivalent optical properties to conventional optical fibers optical pathways.

    Abstract translation: 公开了用于通过以受控的方式沉积具有不同折射率的可固化光学材料形成整体光学路径来构造或制造光纤样器件的器件，系统和方法，整体光学通路表现出全内反射和功能基本相当的光学 性能对常规光纤光路。

    METHOD FOR MAKING A PHOTONIC INTEGRATED CIRCUIT HAVING A PLURALITY OF LENSES
    79.
    发明申请
    METHOD FOR MAKING A PHOTONIC INTEGRATED CIRCUIT HAVING A PLURALITY OF LENSES 审中-公开
    制造具有多孔透镜的光电集成电路的方法

    公开(公告)号：US20150323739A1

    公开(公告)日：2015-11-12

    申请号：US14802504

    申请日：2015-07-17

    Applicant: STMicroelectronics, Inc.

    Inventor： John Hongguang Zhang

    IPC: G02B6/132 ,  G02B6/136

    CPC classification number: G02B6/43 ,  G02B6/122 ,  G02B6/124 ,  G02B6/132 ,  G02B6/136 ,  G02B6/42 ,  G02B6/4214 ,  G02B2006/12102

    Abstract: A photonic integrated circuit includes optical circuitry fabricated over an underlying circuitry layer. The optical circuitry includes a dielectric material having recesses disposed within, layers of a light waveguide material deposited within the recesses, and lenses disposed over each layer of waveguide material. The underlying circuitry layer may include, for example, a semiconductor wafer as well as circuitry fabricated during front end of line (FEOL) semiconductor manufacturing such as, for example, sources, gates, drains, interconnects, contacts, resistors, and other circuitry that may be manufactured during FEOL processes. The underlying circuitry layer may also include circuitry manufactured during back end of line semiconductor manufacturing processes such as, for example, interconnect structures, metallization layers, and contacts.

    Abstract translation: 光子集成电路包括在底层电路层上制造的光电路。 光学电路包括具有设置在沉积在凹部内的光波导材料的层内的凹槽的介电材料和设置在每层波导材料上的透镜。 底层电路层可以包括例如半导体晶片以及在前端（FEOL）半导体制造期间制造的电路，例如源，栅极，漏极，互连，触点，电阻器和其他电路，其中 可以在FEOL过程中制造。 底层电路层还可以包括在线半导体制造工艺的后端制造的电路，例如互连结构，金属化层和触点。

    Inverse Taper Waveguides for Low-Loss Mode Converters
    80.
    发明申请
    Inverse Taper Waveguides for Low-Loss Mode Converters 有权
    低损耗模式转换器的反向锥形波导

    公开(公告)号：US20150316720A1

    公开(公告)日：2015-11-05

    申请号：US14700892

    申请日：2015-04-30

    Applicant: Futurewei Technologies, Inc.

    Inventor： Li Yang ,  Huapu Pan ,  Qianfan Xu ,  Dawei Zheng ,  Xiao Shen

    IPC: G02B6/14 ,  G02B6/136 ,  G02B6/132 ,  G02B6/122

    CPC classification number: G02B6/14 ,  G02B6/1228 ,  G02B6/132 ,  G02B6/136 ,  G02B6/305

    Abstract: An apparatus comprises a substrate comprising a silicon dioxide (SiO2) material disposed on top of the substrate, a silicon waveguide comprising a first adiabatic tapering and enclosed in the silicon dioxide material, and a low-index waveguide disposed on top of the substrate and adjacent to the first adiabatic tapering. A mode converter fabrication method comprises obtaining a mode converter comprising a substrate, a silicon waveguide disposed on the substrate and comprising a sidewall and a first adiabatic tapering, and a hard mask disposed on the silicon waveguide and comprising a silicon dioxide (SiO2) layer, wherein the hard mask does not cover the sidewall, and oxidizing the silicon waveguide and the hard mask, wherein oxidizing the silicon waveguide and the hard mask encloses the silicon waveguide within the silicon dioxide layer.

    Abstract translation: 一种装置包括：衬底，其包括设置在衬底顶部的二氧化硅（SiO 2）材料，包括第一绝热锥形并封装在二氧化硅材料中的硅波导，以及设置在衬底顶部和相邻的低折射率波导 到第一个绝热锥形。 一种模式转换器制造方法，包括：获得模式转换器，该模式转换器包括衬底，布置在衬底上的硅波导，包括侧壁和第一绝热锥形，以及设置在硅波导上并包括二氧化硅（SiO 2）层的硬掩模， 其中所述硬掩模不覆盖所述侧壁，并且氧化所述硅波导和所述硬掩模，其中氧化所述硅波导和所述硬掩模将所述硅波导包围在所述二氧化硅层内。

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