公开(公告)号：US20110006376A1

公开(公告)日：2011-01-13

申请号：US12922119

申请日：2009-03-03

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Masao Moriguchi ,  Kenshi Tada ,  Steven Roy Droes

IPC分类号： H01L27/092 ,  H01L29/78 ,  H01L21/30 ,  H01L29/739

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1266 ,  H01L29/4908 ,  H01L29/66772

摘要： The present invention provides a semiconductor device capable of improving subthreshold characteristics of a PMOS transistor that is included in a thinned base layer and bonded to another substrate, a production method of such a semiconductor device, and a display device. The semiconductor device of the present invention is a semiconductor device, including: a substrate; and a device part bonded to the substrate, the device part including a base layer and a PMOS transistor, the PMOS transistor including a first electrical conduction path and a first gate electrode, the first electrical conduction path being provided inside the base layer on a side where the first gate electrode is disposed.

摘要翻译： 本发明提供一种半导体器件，其能够改善包括在薄化的基底层中并结合到另一衬底的PMOS晶体管的亚阈值特性，这种半导体器件的制造方法和显示器件。 本发明的半导体器件是半导体器件，包括：衬底; 以及与基板接合的器件部件，所述器件部件包括基极层和PMOS晶体管，所述PMOS晶体管包括第一导电路径和第一栅电极，所述第一导电路径设置在所述基极层的侧面 其中设置第一栅电极。

公开(公告)号：US20100289037A1

公开(公告)日：2010-11-18

申请号：US12812162

申请日：2008-10-10

申请人： Shin Matsumoto ,  Yutaka Takafuji ,  Yasumori Fukushima ,  kenshi Tada

发明人： Shin Matsumoto ,  Yutaka Takafuji ,  Yasumori Fukushima ,  kenshi Tada

IPC分类号： H01L33/00 ,  H01L27/092 ,  H01L21/336 ,  H01L29/786

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/124 ,  H01L29/78 ,  H01L29/78654

摘要： The present invention provides a semiconductor device having a plurality of MOS transistors with controllable threshold values in the same face and easy to manufacture, a manufacturing method thereof and a display device. The invention is a semiconductor device having a plurality of MOS transistors in the same face each having a structure formed by stacking a semiconductor active layer, a gate insulator, and a gate electrode, wherein the semiconductor device includes: an insulating layer stacked on a side opposite to a gate electrode side of the semiconductor active layer; and a conductive electrode stacked on a side opposite to a semiconductor active layer side of the insulating layer and extending over at least two of the plurality of MOS transistors.

摘要翻译： 本发明提供一种半导体器件，其具有在相同的面上具有可控制的阈值的多个MOS晶体管并且易于制造，其制造方法和显示装置。 本发明是一种具有多个MOS晶体管的半导体器件，它们具有通过层叠半导体有源层，栅极绝缘体和栅电极形成的结构，其中半导体器件包括：堆叠在一侧的绝缘层 与半导体有源层的栅电极侧相对; 以及在与所述绝缘层的半导体有源层侧相反的一侧层叠的多个MOS晶体管中的至少两个上延伸的导电电极。

公开(公告)号：US20100270658A1

公开(公告)日：2010-10-28

申请号：US12746156

申请日：2008-09-12

申请人： Kazuo Nakagawa ,  Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Shin Matsumoto ,  Kenshi Tada ,  Yutaka Takafuji

发明人： Kazuo Nakagawa ,  Michiko Takei ,  Yasumori Fukushima ,  Kazuhide Tomiyasu ,  Shin Matsumoto ,  Kenshi Tada ,  Yutaka Takafuji

IPC分类号： H01L29/02 ,  H01L21/762

CPC分类号： H01L27/1266 ,  H01L21/76254 ,  H01L27/1214 ,  H01L29/66772 ,  H01L29/78603 ,  H01L29/78606

摘要： A method is disclosed for producing a semiconductor device produced by (i) doping hydrogen ions or rare gas ions into a device substrate in which a transfer layer (16) is formed, (ii) then bonding the device substrate to a carrier target substrate, and (iii) transferring the transfer layer (16) onto the carrier substrate (30) by cleaving the device substrate along a portion in which the hydrogen ions or the rare gas ions are doped, the method including providing a blocking layer (11) for blocking diffusion of a bubble-causing substance between (i) a bonding surface (13), which serves as a bonding interface between the device substrate and the carrier substrate, and (ii) the transfer layer (16). This prevents bubbles from forming at the bonding interface between the semiconductor substrate and the target substrate due to the diffusion of the bubble-causing substance.

摘要翻译： 公开了一种用于制造半导体器件的方法，该半导体器件通过（i）将氢离子或稀有气体离子掺杂到其中形成转移层（16）的器件衬底中，（ii）然后将器件衬底接合到载体目标衬底， 以及（iii）通过沿着掺杂有氢离子或稀有气体离子的部分裂开所述器件衬底，将所述转移层（16）转移到所述载体衬底（30）上，所述方法包括提供用于 在（i）用作器件衬底和载体衬底之间的结合界面的接合表面（13）和（ii）转移层（16）之间阻塞气泡引起物质的扩散。 这样可防止由于起泡物质的扩散而在半导体衬底与目标衬底之间的结合界面处形成气泡。

公开(公告)号：US20100155905A1

公开(公告)日：2010-06-24

申请号：US12600813

申请日：2008-04-01

申请人： Yasumori Fukushima ,  Yutaka Takafuji ,  Kazuhide Tomiyasu ,  Michiko Takei ,  Steven Droes

发明人： Yasumori Fukushima ,  Yutaka Takafuji ,  Kazuhide Tomiyasu ,  Michiko Takei ,  Steven Droes

IPC分类号： H01L29/02 ,  H01L21/762

CPC分类号： H01L27/12 ,  H01L21/2007 ,  H01L21/31053 ,  H01L21/31055 ,  H01L21/76254 ,  H01L21/84 ,  H01L29/78636 ,  H01L2224/83894 ,  H01L2924/01079 ,  H01L2924/1305 ,  H01L2924/00

摘要： A device portion forming step includes an assisting layer forming step of forming a planarization assisting layer, which covers a plurality of conductive films, over a first planarizing layer before forming a second planarizing layer. In the assisting layer forming step, the planarization assisting layer is formed so that a height of the planarization assisting layer from a surface of the first planarizing layer located on a side opposite to the substrate layer becomes equal between at least a part of a region where the conductive films are formed, and at least a part of a region where no conductive film is formed.

摘要翻译： 器件部分形成步骤包括辅助层形成步骤，在形成第二平坦化层之前，在第一平坦化层上形成覆盖多个导电膜的平坦化辅助层。 在辅助层形成步骤中，形成平坦化辅助层，使得平坦化辅助层从位于与衬底层相反的一侧的第一平坦化层的表面的高度在至少一部分区域之间变得相等， 形成导电膜，并且形成不形成导电膜的区域的至少一部分。

公开(公告)号：US07528446B2

公开(公告)日：2009-05-05

申请号：US11086680

申请日：2005-03-23

申请人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

发明人： Yutaka Takafuji ,  Yasumori Fukushima ,  Masao Moriguchi

IPC分类号： H01L27/01

CPC分类号： H01L27/1266 ,  H01L21/76202 ,  H01L21/76254 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78603 ,  H01L29/78609

摘要： The present invention provides a semiconductor substrate, which comprises a singlecrystalline Si substrate which includes an active layer having a channel region, a source region, and a drain region, the singlecrystalline Si substrate including at least a part of a device structure not containing a well-structure or a channel stop region; a gate insulating film formed on the singlecrystalline Si substrate; a gate electrode formed on the gate insulating film; a LOCOS oxide film whose thickness is more than a thickness of the gate insulating film, the LOCOS oxide film being formed on the singlecrystalline Si substrate by surrounding the active layer; and an insulating film formed over the gate electrode and the LOCOS oxide film. On this account, on fabricating the semiconductor device having a high-performance integration system by forming the non-singlecrystalline Si semiconductor element and the singlecrystalline Si semiconductor element on the large insulating substrate, the process for making the singlecrystalline Si is simplified. Further, the foregoing arrangement provides a semiconductor substrate and a fabrication method thereof, which ensures device isolation of the minute singlecrystalline Si semiconductor element without highly-accurate photolithography, when the singlecrystalline Si semiconductor element is transferred onto the large insulating substrate.

摘要翻译： 本发明提供了一种半导体衬底，其包括单晶Si衬底，其包括具有沟道区，源极区和漏极区的有源层，所述单晶Si衬底包括不包含阱的器件结构的至少一部分 结构或通道停止区域; 形成在单晶Si衬底上的栅极绝缘膜; 形成在栅极绝缘膜上的栅电极; LOCOS氧化物膜的厚度大于栅极绝缘膜的厚度，LOCOS氧化物膜通过围绕有源层而形成在单晶Si衬底上; 以及形成在栅电极和LOCOS氧化物膜上的绝缘膜。 因此，通过在大的绝缘基板上形成非单晶Si半导体元件和单晶Si半导体元件来制造具有高性能的集成系统的半导体器件，简化了制造单晶硅的工艺。 此外，上述结构提供半导体衬底及其制造方法，当将单晶硅半导体元件转印到大绝缘衬底上时，确保了微单晶Si半导体元件的器件隔离而没有高精度光刻。

公开(公告)号：US07508034B2

公开(公告)日：2009-03-24

申请号：US10668186

申请日：2003-09-24

申请人： Yutaka Takafuji ,  Takashi Itoga

发明人： Yutaka Takafuji ,  Takashi Itoga

IPC分类号： H01L21/00

CPC分类号： H01L27/1266 ,  H01L21/26506 ,  H01L21/26566 ,  H01L21/2658 ,  H01L21/76254 ,  H01L27/1229 ,  H01L27/1251 ,  H01L27/3244 ,  H01L29/78603 ,  H01L29/78654 ,  H01L29/78666 ,  H01L29/78675 ,  H01L2221/68363 ,  H01L2224/24226 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01046 ,  H01L2924/01057 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12032 ,  H01L2924/12041 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/00

摘要： A semiconductor device of the present invention is arranged in such a manner that a MOS non-single-crystal silicon thin-film transistor including a non-single-crystal silicon thin film made of polycrystalline silicon, a MOS single-crystal silicon thin-film transistor including a single-crystal silicon thin film, and a metal wiring are provided on an insulating substrate. With this arrangement, (i) a semiconductor device in which a non-single-crystal silicon thin film and a single-crystal silicon thin-film device are formed and high-performance systems are integrated, (ii) a method of manufacturing the semiconductor device, and (iii) a single-crystal silicon substrate for forming the single-crystal silicon thin-film device of the semiconductor device are obtained.

摘要翻译： 本发明的半导体器件以如下方式配置：包括由多晶硅制成的非单晶硅薄膜的MOS非单晶硅薄膜晶体管，MOS单晶硅薄膜 包括单晶硅薄膜的晶体管和金属布线设置在绝缘基板上。 利用这种结构，（i）形成非单晶硅薄膜和单晶硅薄膜器件的半导体器件，并且集成了高性能系统，（ii）制造半导体的方法 器件，和（iii）用于形成半导体器件的单晶硅薄膜器件的单晶硅衬底。

公开(公告)号：US20090045461A1

公开(公告)日：2009-02-19

申请号：US12261121

申请日：2008-10-30

申请人： Steven R. Droes ,  Yutaka Takafuji

发明人： Steven R. Droes ,  Yutaka Takafuji

IPC分类号： H01L47/00

CPC分类号： H01L21/3221 ,  H01L21/26506 ,  H01L21/76254 ,  H01L27/1266 ,  H01L29/66772 ,  H01L29/78603

摘要： A hydrogen (H) exfoliation gettering method is provided for attaching fabricated circuits to receiver substrates. The method comprises: providing a Si substrate; forming a Si active layer overlying the substrate with circuit source/drain (S/D) regions; implanting a p-dopant into the S/D regions; forming gettering regions underling the S/D regions; implanting H in the Si substrate, forming a cleaving plane (peak concentration (Rp) H layer) in the Si substrate about as deep as the gettering regions; bonding the circuit to a receiver substrate; cleaving the Si substrate along the cleaving plane; and binding the implanted H underlying the S/D regions with p-dopant in the gettering regions, as a result of post-bond annealing.

摘要翻译： 提供氢（H）剥离吸气方法，用于将制造的电路连接到接收器基板。 该方法包括：提供Si衬底; 在电路源极/漏极（S / D）区域上形成覆盖衬底的Si有源层; 将P掺杂剂注入到S / D区域中; 形成S / D区域下游的吸气区域; 在Si衬底中注入H，在Si衬底中形成与吸杂区一样深的切割面（峰值浓度（Rp）H层）; 将电路接合到接收器基板; 沿着切割面切割Si衬底; 并且作为后键合退火的结果，在吸杂区域中将S / D区域下面的注入的H与p掺杂剂结合。

公开(公告)号：US07436027B2

公开(公告)日：2008-10-14

申请号：US11646274

申请日：2006-12-28

申请人： Yasuyuki Ogawa ,  Yutaka Takafuji

发明人： Yasuyuki Ogawa ,  Yutaka Takafuji

IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392

CPC分类号： H01L27/1266 ,  H01L21/6835 ,  H01L23/544 ,  H01L24/24 ,  H01L24/26 ,  H01L24/82 ,  H01L24/83 ,  H01L27/1203 ,  H01L27/1214 ,  H01L29/78654 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/24226 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01027 ,  H01L2924/01033 ,  H01L2924/01051 ,  H01L2924/01057 ,  H01L2924/01082 ,  H01L2924/01088 ,  H01L2924/04941 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/00

摘要： In a semiconductor device including a monocrystalline thin film transistor 16a that has been formed on a monocrystalline Si wafer 100 and then is transferred to a insulating substrate 2, LOCOS oxidization is performed with respect to the element-isolation region of the monocrystalline Si wafer 100 so as to create a field oxide film (SiO2 film) 104, and a marker 107 is formed on the field oxide film 104. With this structure, alignment of components may be performed based on a gate electrode 106 upon or after the transfer step.

摘要翻译： 在包括单晶硅晶片100上形成的单晶硅晶体管16a的半导体器件中，然后转移到绝缘基片2上，相对于单晶Si晶片100的元件隔离区域进行LOCOS氧化 以形成场氧化膜（SiO 2膜）104，在场氧化膜104上形成标记物107。 利用这种结构，可以在传送步骤之后或之后基于栅电极106执行部件的对准。

公开(公告)号：US07425475B2

公开(公告)日：2008-09-16

申请号：US11199166

申请日：2005-08-09

申请人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

发明人： Yasumori Fukushima ,  Masao Moriguchi ,  Yutaka Takafuji

IPC分类号： H01L21/00

CPC分类号： H01L21/84 ,  H01L21/32 ,  H01L21/76254 ,  H01L27/1203 ,  H01L29/78654

摘要： A method for fabricating a semiconductor device according to the present invention is a method for fabricating a semiconductor device including a substrate layer including a plurality of first regions each having an active region and a plurality of second regions each being provided between adjacent ones of the first region. The fabrication method includes an isolation insulation film formation step of forming an isolation insulation film in each of the second regions so that a surface of the isolation insulation film becomes at the same height as that of a surface of a gate oxide film covering the active region, a peeling layer formation step of forming a peeling layer by ion-implanting hydrogen into the substrate layer after the isolation insulation film formation step, and a separation step of separating part of the substrate layer along the peeling layer.

摘要翻译： 根据本发明的制造半导体器件的方法是一种半导体器件的制造方法，该半导体器件包括：衬底层，该衬底层包括多个第一区域，每个第一区域具有有源区域和多个第二区域， 地区。 制造方法包括隔离绝缘膜形成步骤，在每个第二区域中形成隔离绝缘膜，使得隔离绝缘膜的表面变得与覆盖有源区域的栅极氧化物膜的表面相同的高度 剥离层形成步骤，在隔离绝缘膜形成步骤之后，通过将氢离子注入到衬底层中形成剥离层，以及分离步骤，用于沿剥离层分离衬底层的一部分。

公开(公告)号：US07244990B2

公开(公告)日：2007-07-17

申请号：US10802735

申请日：2004-03-18

申请人： Yutaka Takafuji ,  Takashi Itoga

发明人： Yutaka Takafuji ,  Takashi Itoga

IPC分类号： H01L27/01 ,  H01L27/12 ,  H01L31/0392

CPC分类号： H01L27/1266 ,  H01L21/6835 ,  H01L21/76254 ,  H01L21/76259 ,  H01L24/24 ,  H01L24/26 ,  H01L24/82 ,  H01L24/83 ,  H01L27/1214 ,  H01L27/1218 ,  H01L2221/68359 ,  H01L2221/68363 ,  H01L2224/24226 ,  H01L2224/8319 ,  H01L2224/8385 ,  H01L2224/83894 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01015 ,  H01L2924/01019 ,  H01L2924/01021 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01039 ,  H01L2924/01046 ,  H01L2924/0105 ,  H01L2924/01056 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/0132 ,  H01L2924/04953 ,  H01L2924/07802 ,  H01L2924/09701 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/12044 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/15788 ,  H01L2924/3025 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/3512 ,  H01L2924/00

摘要： On an SOI substrate, a hydrogen ion implantation section in which distribution of hydrogen ions peaks in a BOX layer (buried oxide film layer), and a single-crystal silicon thin-film transistor are formed. Then this SOI substrate is bonded with an insulating substrate. Subsequently, the SOI substrate is cleaved at the hydrogen ion implantation section by carrying out heat treatment, so that an unnecessary part of the SOI substrate is removed, Furthermore, the BOX layer remaining on the single-crystal silicon thin-film transistor is removed by etching. With this, it is possible to from a single-crystal silicon thin-film device on an insulating substrate, without using an adhesive. Moreover, it is possible to provide a semiconductor device which has no surface damage and includes a single-crystal silicon thin film which is thin and uniform in thickness.

摘要翻译： 在SOI衬底上形成氢离子注入部分，其中氢离子在BOX层（掩埋氧化物膜层）中分布，并形成单晶硅薄膜晶体管。 然后，该SOI衬底与绝缘衬底接合。 随后，通过进行热处理，在氢离子注入部分将SOI衬底切割，从而去除了SOI衬底的不必要部分。此外，残留在单晶硅薄膜晶体管上的BOX层通过 蚀刻。 由此，可以在不使用粘合剂的情况下从绝缘基板上的单晶硅薄膜器件进行。 此外，可以提供没有表面损伤的半导体器件，并且包括薄而均匀的单晶硅薄膜。