公开(公告)号：US09013310B2

公开(公告)日：2015-04-21

申请号：US12178894

申请日：2008-07-24

申请人： Choongyeun Cho ,  Daeik Kim ,  Jonghae Kim ,  Moon Ju Kim

发明人： Choongyeun Cho ,  Daeik Kim ,  Jonghae Kim ,  Moon Ju Kim

IPC分类号： G08B13/14 ,  G06K19/077 ,  H01Q1/22 ,  H01Q1/24 ,  H01Q7/00 ,  H01Q23/00

CPC分类号： G06K19/07749 ,  H01Q1/2225 ,  H01Q1/248 ,  H01Q7/00 ,  H01Q23/00

摘要： A radio frequency identification (RFID) device and method of fabrication are presented. The RFID device includes an RFID antenna, a capacitor, and an RFID integrated circuit. The RFID antenna includes an elongate conductive trace disposed within an antenna area of the RFID device, and the capacitor includes an elongate capacitive structure for storing power. The elongate capacitive structure is aligned with the elongate conductive trace and embedded within the antenna area of the RFID device. The RFID integrated circuit is electrically coupled to the RFID antenna and to the capacitor, and the capacitor stores power within the antenna area of the RFID device to facilitate RFID integrated circuit functionality.

摘要翻译： 提出了射频识别（RFID）装置及其制造方法。 RFID设备包括RFID天线，电容器和RFID集成电路。 RFID天线包括设置在RFID设备的天线区域内的细长导电迹线，并且电容器包括用于存储电力的细长电容结构。 细长的电容结构与细长导电迹线对准，并且嵌入在RFID器件的天线区域内。 RFID集成电路电耦合到RFID天线和电容器，并且电容器在RFID设备的天线区域内存储功率以便于RFID集成电路功能。

公开(公告)号：US08937355B2

公开(公告)日：2015-01-20

申请号：US13469464

申请日：2012-05-11

申请人： Choongyeun Cho ,  Daeik Kim ,  Jonghae Kim ,  Moon J. Kim ,  Jean-Olivier Plouchart ,  Robert E. Trzcinski

发明人： Choongyeun Cho ,  Daeik Kim ,  Jonghae Kim ,  Moon J. Kim ,  Jean-Olivier Plouchart ,  Robert E. Trzcinski

IPC分类号： H01L21/00 ,  H01L49/02 ,  H01L23/522 ,  H01L27/02 ,  H01F17/00

CPC分类号： H01L28/10 ,  H01F17/0013 ,  H01F2017/0073 ,  H01L23/5227 ,  H01L27/0203 ,  H01L2924/0002 ,  H01L2924/00

摘要： Sub-100 nanometer semiconductor devices and methods and program products for manufacturing devices are provided, in particular inductors comprising a plurality of spaced parallel metal lines disposed on a dielectric surface and each having width, heights, spacing and cross-sectional areas determined as a function of Design Rule Check rules. For one planarization process rule a metal density ratio of 80% metal to 20% dielectric surface is determined and produced. In one example a sum of metal line spacing gaps is less than a sum of metal line interior sidewall heights. In one aspect at least one of line height, width and line spacing dimensions is selected to optimize one or more chip yield, chip performance, chip manufacturability and inductor Q factor parameters.

公开(公告)号：US08723646B2

公开(公告)日：2014-05-13

申请号：US12210371

申请日：2008-09-15

申请人： Choongyeun Cho ,  Richard Ferri ,  Daeik Kim ,  Jonghae Kim ,  Moon Ju Kim

发明人： Choongyeun Cho ,  Richard Ferri ,  Daeik Kim ,  Jonghae Kim ,  Moon Ju Kim

IPC分类号： H04Q5/22

CPC分类号： H04Q9/00 ,  H04Q2209/47

摘要： An identification method and identification device are presented employing radio frequency and acoustic wave communication modes. The identification method includes: receiving at an acoustic wave and radio frequency identification device an acoustic wave signal of a first frequency and a radio frequency signal of a second frequency, where the acoustic wave signal and the radio frequency signal are received from an acoustic wave and radio frequency identification reader, and the first frequency and the second frequency are different frequencies; and responding to the receiving by transmitting at least one of an acoustic wave identification (AWID) or a radio frequency identification (RFID) from the acoustic wave and radio frequency identification device.

摘要翻译： 采用射频和声波通信方式提出了识别方法和识别装置。 识别方法包括：在声波和射频识别装置处接收第一频率的声波信号和从声波接收声波信号和射频信号的第二频率的射频信号， 射频识别读取器，第一频率和第二频率是不同的频率; 以及通过从声波和射频识别装置发送声波识别（AWID）或射频识别（RFID）中的至少一个来响应于接收。

公开(公告)号：US08604586B2

公开(公告)日：2013-12-10

申请号：US12536819

申请日：2009-08-06

申请人： Wootag Kang ,  Jonghae Kim

发明人： Wootag Kang ,  Jonghae Kim

IPC分类号： H01L27/06

CPC分类号： H01L28/40 ,  H01L27/0805 ,  H01L27/101

摘要： Methods and devices related to a plurality of high breakdown voltage embedded capacitors are presented. A semiconductor device may include gate material embedded in an insulator, a plurality of metal contacts, and a plurality of capacitors. The plurality of capacitors may include a lower electrode, a dielectric formed so as to cover a surface of the lower electrode, and an upper electrode formed on the dielectric. Further, the plurality of contacts may connect each of the lower electrodes of the plurality of capacitors to the gate material. The plurality of capacitors may be connected in series via the gate material.

摘要翻译： 提出了与多个高击穿电压嵌入式电容器相关的方法和装置。 半导体器件可以包括嵌入绝缘体中的栅极材料，多个金属触点和多个电容器。 多个电容器可以包括下电极，形成为覆盖下电极的表面的电介质和形成在电介质上的上电极。 此外，多个触点可以将多个电容器中的每个下电极连接到栅极材料。 多个电容器可以经由栅极材料串联连接。

公开(公告)号：US08451581B2

公开(公告)日：2013-05-28

申请号：US12687328

申请日：2010-01-14

申请人： Arvind Chandrasekaran ,  Jonghae Kim

发明人： Arvind Chandrasekaran ,  Jonghae Kim

IPC分类号： H01G4/229 ,  H01F21/02 ,  H01Q1/52

CPC分类号： H05K1/0239 ,  H01L23/552 ,  H01L23/66 ,  H01L25/0657 ,  H01L2223/6655 ,  H01L2223/6677 ,  H01L2224/16225 ,  H01L2924/15311 ,  H01L2924/19051 ,  H01L2924/3011 ,  H05K1/025 ,  H05K1/162 ,  H05K1/165 ,  H05K3/3436 ,  H05K2201/0723 ,  H05K2201/10098 ,  H05K2201/2036

摘要： A passive device having a portion in the package substrate and a portion in the system board such that the portions of the device are electromagnetically coupled. A transformer including inductors in the package substrate and system board electromagnetically coupled across a space between the substrate and board that is surrounded by solder balls coupling the substrate and board. A capacitor including plates in the substrate and board electromagnetically coupled across a space between the substrate and board that is surrounded by solder balls coupling the substrate and board. A core material can at least partially fill the space between the substrate and board. The solder balls surrounding the space can be coupled to ground. Metal shielding can be put in the substrate and/or board surrounding the device. The metal shielding can be coupled to the solder balls. The metal shielding can be coupled to ground.

摘要翻译： 一种无源器件，其具有封装衬底中的一部分和系统板中的部分，使得器件的部分电磁耦合。 一种变压器，其包括封装衬底中的电感器和电子耦合在基板和板之间的空间的电感器，所述空间由耦合所述衬底和板的焊球围绕。 一种电容器，包括在衬底中的板和电极耦合在基板和板之间的空间的板，所述空间被耦合基板和板的焊球围绕。 核心材料可以至少部分地填充衬底和板之间的空间。 围绕空间的焊球可以联接到地面。 可以将金属屏蔽放置在设备周围的基板和/或板中。 金属屏蔽可以耦合到焊球。 金属屏蔽可以耦合到地面。

公开(公告)号：US20130054853A1

公开(公告)日：2013-02-28

申请号：US13222399

申请日：2011-08-31

申请人： Feng Wang ,  Jonghae Kim

发明人： Feng Wang ,  Jonghae Kim

IPC分类号： G06F13/00

CPC分类号： G06F13/161 ,  G06F13/1652 ,  Y02D10/14

摘要： A load state of a slave memory is detected and provided to a master device. The master device communicates prefetch access requests to the slave memory based, at least in part, on the detected load state. Optionally, the master device communicates prefetch requests to the slave memory according to a schedule based, at least in part, on the detected load state.

摘要翻译： 从存储器的负载状态被检测并提供给主设备。 至少部分地基于检测到的负载状态，主设备将预取访问请求传送到从属存储器。 可选地，主设备至少部分地基于检测到的负载状态，根据调度将预取请求传送到从存储器。

公开(公告)号：US08362599B2

公开(公告)日：2013-01-29

申请号：US12566338

申请日：2009-09-24

申请人： Jonghae Kim ,  Brian M. Henderson ,  Matthew M. Nowak ,  Jiayu Xu

发明人： Jonghae Kim ,  Brian M. Henderson ,  Matthew M. Nowak ,  Jiayu Xu

IPC分类号： H01L23/552

CPC分类号： H01L23/552 ,  H01L23/645 ,  H01L2224/0401 ,  H01L2224/05567 ,  H01L2224/0557 ,  H01L2224/06181 ,  H01L2224/13025 ,  H01L2224/16 ,  H01L2224/16235 ,  H01L2224/16265 ,  H01L2224/17181 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/15311 ,  H01L2924/19011 ,  H01L2924/19104 ,  H01L2924/3025 ,  H01L2924/00

摘要： Method of forming a radio frequency integrated circuit (RFIC) is provided. The RFIC comprises one or more electronic devices formed in a semiconductor substrate and one or more passive devices on a dielectric substrate, arranged in a stacking manner. Electrical shield structure is formed in between to shield electronic devices in the semiconductor substrate from the passive devices in the dielectric substrate. Vertical through-silicon-vias (TSVs) are formed to provide electrical connections between the passive devices in the dielectric substrate and the electronic devices in the semiconductor substrate.

摘要翻译： 提供了形成射频集成电路（RFIC）的方法。 RFIC包括形成在半导体衬底中的一个或多个电子器件和以堆叠方式布置的电介质衬底上的一个或多个无源器件。 在屏蔽结构之间形成有屏蔽半导体衬底中的电子器件与电介质衬底中的无源器件。 形成垂直通硅通孔（TSV）以提供电介质基板中的无源器件与半导体衬底中的电子器件之间的电连接。

公开(公告)号：US08359421B2

公开(公告)日：2013-01-22

申请号：US12536991

申请日：2009-08-06

申请人： Feng Wang ,  Matthew Michael Nowak ,  Jonghae Kim

发明人： Feng Wang ,  Matthew Michael Nowak ,  Jonghae Kim

IPC分类号： G06F13/00 ,  G06F12/00 ,  G06F15/16

CPC分类号： G06F13/1663 ,  G06F13/1684 ,  Y02D10/14

摘要： A method includes identifying a first set of masters and a second set of masters from a plurality of masters. The plurality of masters have access to a multi-channel memory via a crossbar interconnect. The method includes partitioning the crossbar interconnect into a plurality of partitions comprising at least a first partition corresponding to the first set of masters and a second partition corresponding to the second set of masters. The method also includes allocating a first set of buffer areas within the multi-channel memory. The first set of buffer areas correspond to the first set of masters. The method further includes allocating a second set of buffer areas within the multi-channel memory. The second set of buffers correspond to the second set of masters.

摘要翻译： 一种方法包括从多个主器件识别第一组主器件和第二组主器件。 多个主机通过交叉开关互连访问多通道存储器。 该方法包括将交叉开关互连划分成多个分区，其包括至少对应于第一组主机的第一分区和对应于第二组主机的第二分区。 该方法还包括在多通道存储器内分配第一组缓冲区。 第一组缓冲区对应于第一组主机。 该方法还包括在多通道存储器内分配第二组缓冲区。 第二组缓冲器对应于第二组主机。

公开(公告)号：US20120199949A1

公开(公告)日：2012-08-09

申请号：US13021151

申请日：2011-02-04

申请人： Je-Hsiung Lan ,  Matthew Michael Nowak ,  Evgeni P. Gousev ,  Jonghae Kim ,  Clarence Chui

发明人： Je-Hsiung Lan ,  Matthew Michael Nowak ,  Evgeni P. Gousev ,  Jonghae Kim ,  Clarence Chui

IPC分类号： H01L29/92 ,  H01L21/62

CPC分类号： H01L28/82 ,  H01G4/012 ,  H01G4/10 ,  H01L23/5223 ,  H01L23/642 ,  H01L28/87 ,  H01L29/945 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15192 ,  H01L2924/15311

摘要： Higher capacitance density is achieved by increasing a surface area of a capacitor. A larger surface area may be obtained by forming isotropic ball shapes (a concave surface) in the trenches on the semiconductor die. The concave surfaces are fabricated by depositing bilayers of amorphous-silicon and silicon oxide. Openings are patterned in the silicon oxide hard mask for trenches. The openings are transferred to the amorphous-silicon layers through isotropic etching to form concave surfaces. Conducting, insulating, and conducting layers are deposited on the concave surfaces of the trenches by atomic layer deposition.

摘要翻译： 通过增加电容器的表面积来实现更高的电容密度。 可以通过在半导体管芯上的沟槽中形成各向同性球形（凹面）来获得更大的表面积。 通过沉积非晶硅和氧化硅的双层来制造凹面。 在用于沟槽的氧化硅硬掩模中图案化开口。 通过各向同性蚀刻将开口转移到非晶硅层以形成凹面。 导电，绝缘和导电层通过原子层沉积沉积在沟槽的凹面上。

公开(公告)号：US08148953B2

公开(公告)日：2012-04-03

申请号：US11946550

申请日：2007-11-28

申请人： Choongyeun Cho ,  Daeik Kim ,  Jonghae Kim ,  Moon Ju Kim ,  James Randal Moulic

发明人： Choongyeun Cho ,  Daeik Kim ,  Jonghae Kim ,  Moon Ju Kim ,  James Randal Moulic

IPC分类号： H02J7/00

CPC分类号： H02J7/345

摘要： An apparatus and method for recycling and reusing charge in an electronic circuit. The apparatus includes at least one capacitor coupled to a circuit block in the electronic circuit, the capacitor being configured to collect current charge consumed by the circuit block when set to a charge collection mode, and a voltage level comparator configured to detect a fully charged state when the capacitor is fully charged. Further, the apparatus includes a first electrical switch configured to allow, once the fully charged state is detected, the capacitor to switch to a discharge mode for discharging the current charge collected back into the power supply for reuse by the electrical system and a second switch configured to allow, after the capacitor has fully discharged the current charge collected, the capacitor to switch back to the charge collection mode, such that, the current charge is recycled and reused by the electrical system.

摘要翻译： 一种用于在电子电路中再循环和再利用电荷的装置和方法。 该装置包括耦合到电子电路中的电路块的至少一个电容器，电容器被配置为当设置为电荷收集模式时收集由电路块消耗的当前电荷;以及电压电平比较器，被配置为检测完全充电状态 当电容器充满电时。 此外，该装置包括第一电开关，其被配置为允许一旦检测到完全充电状态，电容器切换到放电模式，用于将收集的当前电荷放回电源供电系统和第二开关 配置为允许在电容器已经完全放电所收集的当前电荷之后，电容器切换回电荷收集模式，使得当前电荷被电气系统再循环和再利用。