公开(公告)号：US06319844B1

公开(公告)日：2001-11-20

申请号：US09544490

申请日：2000-04-07

申请人： Tatsuya Usami ,  Hidenobu Miyamoto

发明人： Tatsuya Usami ,  Hidenobu Miyamoto

IPC分类号： H01L21302

CPC分类号： H01L21/76802 ,  H01L21/31116 ,  H01L21/31144 ,  H01L21/76805 ,  H01L21/76838

摘要： According to a fabrication method of a semiconductor device, differing areas of metal interconnect layers 102a and 102b are formed on top of interlayer base layer 101. An HSQ layer 103 is then deposited over them. A plasma SiO2 is then deposited on top of the HSQ film 103. Afterwards, the top surface of the plasma SiO2 film 104 is subjected to the CMP process so that its surface can be smoothed. A photoresist film 105 is deposited on top of the SiO2 film 104 and then patterned for a subsequent step of making via holes. Afterwards, the insulation film 104 and HSQ film 103 are selectively etched so as to dig via holes 110 so that the bottoms 120 of the via holes 110 respectively end at the top surfaces of the interconnect layers 102a and 102b. This etching is performed using a mixture of a fluorine-based gas and a hydrogen-based gas.

摘要翻译： 根据半导体器件的制造方法，在层间基底层101的顶部形成金属互连层102a和102b的不同区域。然后在其上沉积HSQ层103。 然后将等离子体SiO 2沉积在HSQ膜103的顶部上。然后，对等离子体SiO 2膜104的顶表面进行CMP处理，使其表面平滑。 将光致抗蚀剂膜105沉积在SiO 2膜104的顶部上，然后被图案化以用于随后的制造通孔的步骤。 然后，选择性地蚀刻绝缘膜104和HSQ膜103，以便挖掘通孔110，使得通孔110的底部120分别在互连层102a和102b的顶表面上终止。 该蚀刻使用氟系气体和氢系气体的混合物进行。

公开(公告)号：US06255732B1

公开(公告)日：2001-07-03

申请号：US09366517

申请日：1999-08-03

申请人： Takashi Yokoyama ,  Tatsuya Usami

发明人： Takashi Yokoyama ,  Tatsuya Usami

IPC分类号： H01L2348

CPC分类号： H01L21/76834 ,  H01L21/76801 ,  H01L21/76802 ,  H01L21/76814 ,  H01L21/76826 ,  H01L21/76828 ,  H01L21/76831 ,  H01L23/5329 ,  H01L2924/0002 ,  H01L2924/00

摘要： An interlayer insulation film containing a dielectric component represented by a chemical formula having a Si—H bond or a Si—CH3 bond is formed on a substrate. Next, a photoresist is formed on the interlayer insulation film. The photoresist is then formed into a form of a contact hole. Thereafter, dry-etching of the interlayer insulation film is conducted by use of the photoresist as a mask. Subsequently, the photoresist is removed, and the interlayer insulation film is exposed to nitrogen plasma and hydrogen plasma, for example.

摘要翻译： 在基板上形成含有由Si-H键或Si-CH3键形成的化学式表示的介电成分的层间绝缘膜。 接着，在层间绝缘膜上形成光致抗蚀剂。 然后将光致抗蚀剂形成为接触孔的形式。 此后，通过使用光致抗蚀剂作为掩模进行层间绝缘膜的干法蚀刻。 随后，除去光致抗蚀剂，并且例如将层间绝缘膜暴露于氮等离子体和氢等离子体。

公开(公告)号：US06222269B1

公开(公告)日：2001-04-24

申请号：US08996105

申请日：1997-12-22

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L2348

CPC分类号： H01L21/76802 ,  H01L21/76801 ,  H01L21/76829 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76834

摘要： Described in the present invention is a semiconductor device in which a plurality of interconnect lines are disposed, through an insulating layer, on the same layer above a semiconductor substrate having a semiconductor element; a first interlevel insulator is formed selectively in a narrowly-spaced region between adjacent interconnect lines; a second interlevel insulator is formed in a widely-spaced region between said adjacent interconnect lines, and the first interlevel insulator has a smaller dielectric constant than the second interlevel insulator. According to such a constitution, strength and reliability can be heightened and performance can be improved easily even in a miniaturized interconnect structure.

公开(公告)号：US06194775B1

公开(公告)日：2001-02-27

申请号：US09007155

申请日：1998-01-14

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L2986

CPC分类号： H01L27/11 ,  H01L21/3185 ,  H01L27/1112 ,  Y10S257/904

摘要： In a method of manufacturing a semiconductor device, an insulating film is formed on a semiconductor substrate. A semiconductor film pattern is formed on the insulating film. A direct thermal nitriding method is performed to at least a portion of the semiconductor film pattern. The direct thermal nitriding method is performed by lamp annealing in a gas composed of nitrogen such that a thermally nitrided film has a film thickness of equal to or thicker than 1.5 nm. Thus, invasion of a hydrogen atom or ion into the semiconductor film pattern can be prevented.

摘要翻译： 在制造半导体器件的方法中，在半导体衬底上形成绝缘膜。 在绝缘膜上形成半导体膜图形。 对半导体膜图案的至少一部分进行直接热氮化方法。 直接热氮化方法通过在由氮组成的气体中进行灯退火，使得热氮化膜具有等于或大于1.5nm的膜厚度来进行。 因此，可以防止氢原子或离子侵入到半导体膜图案中。

公开(公告)号：US06187662B1

公开(公告)日：2001-02-13

申请号：US09229213

申请日：1999-01-13

申请人： Tatsuya Usami ,  Noriaki Oda

发明人： Tatsuya Usami ,  Noriaki Oda

IPC分类号： H01L21316

CPC分类号： H01L21/76801 ,  H01L21/02129 ,  H01L21/02131 ,  H01L21/02134 ,  H01L21/0214 ,  H01L21/0217 ,  H01L21/02274 ,  H01L21/02282 ,  H01L21/3124 ,  H01L21/3143 ,  H01L21/31612 ,  H01L21/31625 ,  H01L21/31629 ,  H01L21/76834

摘要： A semiconductor device includes a first insulating film formed on a semiconductor substrate. Wiring patterns are partially formed on the first interlayer insulating film. A second insulating film is formed to cover the first insulating film and the wiring patterns. A third insulating film is formed on the second insulating film. In this case, at least an upper surface portion of the first insulating film has a moisture containing percentage lower than that of the second insulating film.

摘要翻译： 半导体器件包括形成在半导体衬底上的第一绝缘膜。 部分地在第一层间绝缘膜上形成布线图案。 形成第二绝缘膜以覆盖第一绝缘膜和布线图案。 在第二绝缘膜上形成第三绝缘膜。 在这种情况下，第一绝缘膜的至少上表面部的含水率比第二绝缘膜低。

公开(公告)号：US6140225A

公开(公告)日：2000-10-31

申请号：US104714

申请日：1998-06-25

申请人： Tatsuya Usami ,  Hidemitsu Aoki ,  Yasuaki Tsuchiya ,  Shinya Yamasaki

发明人： Tatsuya Usami ,  Hidemitsu Aoki ,  Yasuaki Tsuchiya ,  Shinya Yamasaki

IPC分类号： H01L21/302 ,  H01L21/033 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/312 ,  H01L21/3205 ,  H01L21/3213 ,  H01L21/768 ,  H01L23/522 ,  H01L21/4753 ,  H01L21/461

CPC分类号： H01L21/32139 ,  H01L21/0332 ,  H01L21/31138 ,  H01L21/31144 ,  H01L21/3205 ,  H01L21/32136 ,  H01L21/76802 ,  H01L21/76811 ,  H01L21/76813 ,  H01L21/3124

摘要： A first insulating film with a dielectric constant lower than that of a silicon oxide film is formed on a semiconductor substrate. Next, a second insulating film, which has degrees of moisture absorption and deformation in an oxygen plasma process and exposure to a resist releasing solution equal to or less than those of a silicon oxide film, is formed on the first insulating film. Then, a third insulating film, which has degrees of moisture absorption and deformation in an oxygen plasma process and exposure to a resist releasing solution equal to or less than those of a silicon oxide film are formed on the second insulating film. Thereafter, the third insulating film is patterned to a prescribed pattern. An opening is formed in the first and second insulating films using the third insulating film as a mask.

摘要翻译： 在半导体衬底上形成介电常数比氧化硅膜低的第一绝缘膜。 接下来，在第一绝缘膜上形成第二绝缘膜，其在氧等离子体处理中具有吸湿变形程度，并且暴露于等于或小于氧化硅膜的抗蚀剂释放溶液。 然后，在第二绝缘膜上形成第三绝缘膜，其在氧等离子体处理中具有吸湿变形程度，并且暴露于等于或小于氧化硅膜的抗蚀剂释放溶液。 此后，将第三绝缘膜图案化为规定的图案。 使用第三绝缘膜作为掩模在第一绝缘膜和第二绝缘膜中形成开口。

公开(公告)号：US08598044B2

公开(公告)日：2013-12-03

申请号：US11156735

申请日：2005-06-21

申请人： Tatsuya Usami ,  Sadayuki Ohnishi ,  Masayuki Hiroi ,  Akira Matsumoto

发明人： Tatsuya Usami ,  Sadayuki Ohnishi ,  Masayuki Hiroi ,  Akira Matsumoto

IPC分类号： H01L21/302

CPC分类号： H01L21/31144 ,  H01L21/02164 ,  H01L21/02271 ,  H01L21/02274 ,  H01L21/31612

摘要： An intermediate film 222 in a three-layered resist film 225 is formed by the chemical vapor deposition process at a temperature not higher than 300° C., using Si(OR1)(OR2)(OR3)(OR4), where each of R1, R2, R3 and R4 independently represents a carbon-containing group or a hydrogen atom, excluding the case where all of R1 to R4 are hydrogen atoms.

摘要翻译： 使用Si（OR1）（OR2）（OR3）（OR4）（OR4）（OR4），通过化学气相沉积工艺在不高于300℃的温度下形成三层抗蚀剂膜225中的中间膜222，其中R1 除了R 1〜R 4全部为氢原子的情况外，R 2，R 3和R 4各自独立地表示含碳基团或氢原子。

公开(公告)号：US08242014B2

公开(公告)日：2012-08-14

申请号：US13078605

申请日：2011-04-01

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/4763

CPC分类号： H01L23/53238 ,  H01L21/76801 ,  H01L21/7682 ,  H01L21/76822 ,  H01L21/76825 ,  H01L21/76849 ,  H01L21/76852 ,  H01L21/76885 ,  H01L21/76886 ,  H01L23/5222 ,  H01L23/5226 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device is manufactured by forming a first reinforcing insulating film and a first sacrificial interlayer. A first trench is formed and then filled with an interconnect covered with a cap metal. First and second sacrificial barrier dielectrics are formed, and the second sacrificial interlayer and the sacrificial barrier dielectric are selectively removed to form a hole exposing the cap metal. A conductive via connects the interconnect by forming a conductor in the hole, and a second cap metal covers the via. The interconnect exposes the via by selectively removing the sacrificial interlayers and dielectric. An insulating film covers the side wall and the upper portion of the interconnect, and the side wall of the conductive via which is connected to the interconnect from the side wall of the interconnect through the side wall of the via. An air-gap is provided in the insulating film.

摘要翻译： 通过形成第一加强绝缘膜和第一牺牲中间层来制造半导体器件。 形成第一沟槽，然后填充覆盖有帽金属的互连。 形成第一和第二牺牲阻挡电介质，并且选择性地去除第二牺牲中间层和牺牲阻挡电介质以形成露出帽金属的孔。 导电通孔通过在孔中形成导体来连接互连，并且第二帽金属覆盖通孔。 互连通过选择性地去除牺牲中间层和电介质来暴露通孔。 绝缘膜覆盖互连的侧壁和上部，以及导电通孔的侧壁，其通过通孔的侧壁从互连的侧壁连接到互连。 在绝缘膜中设置气隙。

公开(公告)号：US20120009789A1

公开(公告)日：2012-01-12

申请号：US13137847

申请日：2011-09-16

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/768

CPC分类号： H01L21/76811 ,  H01L21/76808 ,  H01L23/585 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method of producing a semiconductor device includes forming, on a first insulating film formed on a substrate, a first groove in an element-forming region to form one of a via and a wiring therein, and a first seal ring groove in a seal ring part, forming one of a via and a wiring in the first groove and a first metal layer in the first seal ring groove, and then removing the metal material in a part exposed to an outside of the first groove and the first seal ring groove, forming a second insulating film on the first insulating film, forming, on the second insulating film, a second groove, and a second seal ring groove in the seal ring part on the first seal ring groove, and forming one of a via and a wiring in the second groove and a second metal layer.

摘要翻译： 一种制造半导体器件的方法包括在形成在基板上的第一绝缘膜上形成元件形成区域中的第一槽，以在其中形成通孔和布线之一，以及密封环中的第一密封环槽 在第一槽中形成通孔和配线之一，在第一密封环槽中形成第一金属层，然后在暴露于第一槽和第一密封环槽的外侧的部分除去金属材料， 在所述第一绝缘膜上形成第二绝缘膜，在所述第二绝缘膜上形成所述第一密封环槽中的所述密封环部分中的第二槽和第二密封环槽，并且形成通孔和布线 在第二槽和第二金属层中。

公开(公告)号：US20110207318A1

公开(公告)日：2011-08-25

申请号：US13064940

申请日：2011-04-27

申请人： Tatsuya Usami

发明人： Tatsuya Usami

IPC分类号： H01L21/768

CPC分类号： H01L21/76826 ,  H01L21/76822 ,  H01L21/76832 ,  H01L21/76834 ,  H01L21/76883 ,  H01L23/53295 ,  H01L2924/0002 ,  H01L2924/30105 ,  H01L2924/00

摘要： A method of manufacturing a semiconductor device, includes burying a conductive pattern in an insulating film made of SiOH, SiCOH or organic polymer, treating surfaces of the insulating film and the conductive pattern with plasma which includes a hydrocarbon gas as a treatment gas, and forming a diffusion barrier film, which is formed of an SiCH film, an SiCHN film, an SiCHO film or an SiCHON film, over the insulating film and the conductive pattern with performing a plasma CVD by adding an Si-containing gas to the treatment gas while increasing the addition amount gradually or in a step-by-step manner.

摘要翻译： 一种制造半导体器件的方法，包括将导电图案埋入由SiOH，SiCOH或有机聚合物制成的绝缘膜中，用包括烃气体的等离子体处理绝缘膜和导电图案作为处理气体，并形成 在绝缘膜和导电图案上由SiCH膜，SiCHN膜，SiCHO膜或SiCHON膜形成的扩散阻挡膜，通过向处理气体中添加含Si气体进行等离子体CVD，同时 逐渐或逐步增加添加量。