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81.
公开(公告)号:US10353837B2
公开(公告)日:2019-07-16
申请号:US15087535
申请日:2016-03-31
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku , Richard Dominic Wietfeldt , George Alan Wiley
IPC: G06F13/364 , G06F13/42 , G06F13/26 , G06F13/24 , G06F13/36 , G06F13/362 , G06F11/30
Abstract: To accommodate multiple masters over bus architectures supporting a single master device, a mechanism is provided for an inactive master device to assert an in-band IRQ. A current master then polls the other inactive master devices over a shared data bus to ascertain which inactive master device is asserting the IRQ. Upon identifying the asserting inactive master device, the current master device grants control of the data bus to the new master device, thereby making the inactive master the new active master device.
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公开(公告)号:US09921981B2
公开(公告)日:2018-03-20
申请号:US14462363
申请日:2014-08-18
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku , Richard Dominic Wietfeldt , George Alan Wiley
CPC classification number: G06F13/4226 , G06F13/22 , G06F13/24 , G06F13/26 , G06F2211/001 , G06F2211/002
Abstract: A master device is provided which is coupled to a shared single line interrupt request (IRQ) bus and a control data bus. The master device group slave devices coupled to the shared single line IRQ bus into one or more groups, where each group is associated with a different IRQ signal. The master device then monitors the IRQ bus to ascertain when an IRQ signal is asserted by at least one slave device. The master device then identifies a group to with which the IRQ signal is associated. The slave devices for the identified group are then scanned or queried by the master device to ascertain which slave device asserted the IRQ signal on the IRQ bus. Each group uses a distinguishable IRQ signal to allow the master device to ascertain which group to query or scan.
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公开(公告)号:US09710424B2
公开(公告)日:2017-07-18
申请号:US14682846
申请日:2015-04-09
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku
CPC classification number: G06F13/4295 , G06F13/4282 , G06F13/4291
Abstract: System, methods and apparatus are described that offer improved performance of a camera control interface (CCIe) bus. A method of data communications includes transmitting a first synchronization code on a serial bus, establishing synchronization with a first device coupled to the serial bus in response to the first synchronization code, communicating with the first device over the serial bus in accordance with a first protocol, after establishing synchronization with the first device, transmitting a first unsynchronization code on the serial bus, where the unsynchronization code is configured to cause a loss of synchronization with the first device, transmitting a second synchronization code on the serial bus, establishing synchronization with a second device coupled to the serial bus in response to the second synchronization code, and communicating with the second device over the serial bus in accordance with a second protocol, after establishing synchronization with the second device.
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公开(公告)号:US09710412B2
公开(公告)日:2017-07-18
申请号:US14278682
申请日:2014-05-15
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku
CPC classification number: G06F13/385 , H04L5/20 , H04L25/0272 , H04L25/0278 , H04L25/028
Abstract: System, methods and apparatus are described that provide an N-factorial (N!) voltage-mode driver. A method communicating on an N! interface includes encoding data in a symbol to be transmitted over the N wires of the interface, and for each wire of the N wires, calculating a resultant current for the wire by summing current flows defined for two or more two-wire combinations that include the wire, and coupling a switchable voltage source to the each wire. Each bit in the symbol defines a current flow between a pair of the N wires that is one of a plurality of possible two-wire combinations of the N wires. The switchable voltage source may be selected from a plurality of switchable voltage sources in order to provide a current in the each wire that is proportionate to the resultant current calculated for the each wire.
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公开(公告)号:US09684624B2
公开(公告)日:2017-06-20
申请号:US14616572
申请日:2015-02-06
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku
IPC: G06F1/12 , G06F13/42 , G06F13/364 , H04L7/00
CPC classification number: G06F13/4234 , G06F1/12 , G06F13/364 , H04L7/0037
Abstract: Master and slave devices may be coupled to a control data bus. A method includes controlling data transmissions over a bus using a master device. A clock signal is provided by the master device on a clock line (SCL) of a serial bus, a receive clock generated from transitions on the SCL line when a slave device is transmitting data on the SDA line, is calibrated using a delay based on a duration of time measured between an edge of the clock signal provided on the SCL line and at least one transition produced on the SDA line by a slave device in response to the edge of the clock signal. Data, including double data rate data, may be reliably received using the calibrated receive clock.
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公开(公告)号:US09681049B2
公开(公告)日:2017-06-13
申请号:US14693656
申请日:2015-04-22
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku
IPC: H04N5/232 , G03B13/36 , G02B27/64 , H04N101/00
CPC classification number: H04N5/23264 , G02B27/646 , G03B13/36 , H04N5/23212 , H04N5/23248 , H04N5/23258 , H04N5/23287 , H04N2101/00 , H04N2201/0428 , H04N2201/046
Abstract: Methods and systems are disclosed for damping unwanted vibrations or ringing of a lens in an imaging device. For example, one method includes determining a target distance to move a lens, and dividing the target distance into multiple steps having at least a first step and a subsequent step, moving the lens, via an actuator, by the first step, thereby causing a first vibration, retrieving a damping parameter indicative of a time delay, the damping parameter being based on at least one characteristic of the actuator and the number of steps, and repeating said moving the lens at least one subsequent step after delaying the subsequent step by one of the damping parameters, each moving the lens a subsequent step causing a subsequent vibration, and the damping parameters affecting the vibration such that the first and subsequent vibrations at least in part modify each other to lower overall vibration.
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87.
公开(公告)号:US09673969B2
公开(公告)日:2017-06-06
申请号:US14992450
申请日:2016-01-11
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku , George Alan Wiley , Chulkyu Lee , Joseph Cheung
IPC: H04L27/00 , H04L7/033 , H04L7/027 , H04L7/00 , H04L25/02 , H04L25/49 , H04L25/493 , H03K5/1252 , H03K5/1534 , H04L25/14
CPC classification number: H04L7/033 , H03K5/1252 , H03K5/1534 , H04L7/0066 , H04L7/027 , H04L25/0272 , H04L25/14 , H04L25/49 , H04L25/4906 , H04L25/493
Abstract: A method for performing multi-wire signaling decoding is provided. A raw symbol spread over a plurality of n wires is received via a plurality of differential receivers. The raw symbol is converted into a sequential number from a set of sequential numbers. Each sequential number is converted to a transition number. A plurality of transition numbers is converted into a sequence of data bits. A clock signal is then extracted from the reception of raw symbols.
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公开(公告)号:US09673968B2
公开(公告)日:2017-06-06
申请号:US15156555
申请日:2016-05-17
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku , Joseph Cheung , George Alan Wiley
IPC: H04L7/00 , H03K5/13 , H03K5/1534 , H04L7/033 , H03K3/017 , H03K5/153 , H03L7/081 , H03K5/133 , H03K5/134 , H03K19/00 , H03K5/14 , H03K5/00
CPC classification number: H04L7/0087 , H03K3/017 , H03K5/13 , H03K5/133 , H03K5/134 , H03K5/14 , H03K5/153 , H03K5/1534 , H03K19/00 , H03K2005/00293 , H03L7/081 , H04L7/0037 , H04L7/033 , H04L7/0331
Abstract: A method, an apparatus, and a computer program product are described. The apparatus generates a receive clock signal for receiving data from a multi-wire open-drain link by determining a transition in a signal received from the multi-wire open-drain link, generating a clock pulse responsive to the transition, delaying the clock pulse by a preconfigured first interval if the transition is in a first direction, and delaying the clock by a preconfigured second interval if the transition is in a second direction. The preconfigured first and/or second intervals are configured based on a rise time and/or a fall time associated with the communication interface and may be calibrated by measuring respective delays associated with clock pulses generated for first and second calibration transitions.
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公开(公告)号:US09672176B2
公开(公告)日:2017-06-06
申请号:US14511165
申请日:2014-10-09
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku
IPC: G06F13/00 , G06F13/36 , G06F13/362 , G06F13/40 , G06F13/42
CPC classification number: G06F13/362 , G06F13/40 , G06F13/4291
Abstract: System, methods and apparatus are described that facilitate transmission of data, particularly between two or more devices within an electronic apparatus. Embodiments disclosed herein relate to scanning for slave identifiers (SIDs) on a CCIe bus. A disclosed method includes transmitting a first inquiry on a control data bus, where the first inquiry includes a first configuration of bits, determining presence of a slave device that has a slave identifier that includes a second configuration of bits that matches the first configuration of bits, and repetitively transmitting additional inquiries on the control data bus with different configurations of bits until all bits of the slave identifier are determined. The slave device may assert a response to each inquiry that includes a configuration of bits that matches a corresponding configuration of bits in the slave identifier.
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公开(公告)号:US20170083468A1
公开(公告)日:2017-03-23
申请号:US14860609
申请日:2015-09-21
Applicant: QUALCOMM Incorporated
Inventor: Shoichiro Sengoku
IPC: G06F13/364 , G06F13/40 , G06F13/42
CPC classification number: G06F13/364 , G06F13/404 , G06F13/4282 , H04L61/2038 , H04L61/2092
Abstract: A self-identification system is provided for slave devices that share a bus with a plurality of other identical slave devices. Each slave device may include two or more additional interfaces (e.g., single line), distinct from the shared bus, and coupled to at least one adjacent slave device. A protocol known to the master and slave devices is used to allow each slave device to identify itself without the need to explicitly transmit a unique identifier between the master device and the slave devices. The plurality of slave devices are daisy chained via the first and second interfaces, which are selectively driven and/or weakly pulled up or down in response to one or more broadcasts from the master device. Based on the state of their first and second interface, a slave device may respond to a broadcast and thus implicitly provides an identifier to the master device.
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