公开(公告)号：US20140189299A1

公开(公告)日：2014-07-03

申请号：US13730565

申请日：2012-12-28

申请人： Paolo Narvaez ,  Ganapati N. Srinivasa ,  Eugene Gorbatov ,  Dheeraj R. Subbareddy ,  Mishali Naik ,  Alon Naveh ,  Abirami Prabhakaran ,  Eliezer Weissmann ,  David A. Koufaty ,  Paul Brett ,  Scott D. Hahn ,  Andrew J. Herdrich ,  Ravishankar Iyer ,  Nagabhushan Chitlur ,  Inder M. Sodhi ,  Gaurav Khanna ,  Russell J. Fenger

发明人： Paolo Narvaez ,  Ganapati N. Srinivasa ,  Eugene Gorbatov ,  Dheeraj R. Subbareddy ,  Mishali Naik ,  Alon Naveh ,  Abirami Prabhakaran ,  Eliezer Weissmann ,  David A. Koufaty ,  Paul Brett ,  Scott D. Hahn ,  Andrew J. Herdrich ,  Ravishankar Iyer ,  Nagabhushan Chitlur ,  Inder M. Sodhi ,  Gaurav Khanna ,  Russell J. Fenger

IPC分类号： G06F9/38

CPC分类号： G06F9/3891

摘要： A heterogeneous processor architecture is described. For example, a processor according to one embodiment of the invention comprises: a set of large physical processor cores; a set of small physical processor cores having relatively lower performance processing capabilities and relatively lower power usage relative to the large physical processor cores; virtual-to-physical (V-P) mapping logic to expose the set of large physical processor cores to software through a corresponding set of virtual cores and to hide the set of small physical processor core from the software.

摘要翻译： 描述异构处理器架构。 例如，根据本发明的一个实施例的处理器包括：一组大的物理处理器核心; 一组具有相对较低性能处理能力的小物理处理器核和相对于大型物理处理器核的相对较低的功率使用; 虚拟到物理（V-P）映射逻辑，以通过相应的一组虚拟核心将大型物理处理器核心集合暴露给软件，并从该软件中隐藏一组小型物理处理器核心。

公开(公告)号：US20140091949A1

公开(公告)日：2014-04-03

申请号：US13993333

申请日：2011-12-30

申请人： Omesh Tickoo ,  Ravishankar Iyer

发明人： Omesh Tickoo ,  Ravishankar Iyer

IPC分类号： G08G1/0967

CPC分类号： G08G1/096791 ,  G01C21/3492 ,  G08G1/0965 ,  G08G1/161 ,  H04W4/024 ,  H04W4/027 ,  H04W4/46 ,  H04W84/18

摘要： An ad hoc network may be established between vehicles using a wireless connection. The wireless network may be used for sending and receiving information about road conditions, such as average speed, a location and configuration of a road obstruction, images of an accident scene, and a traffic flow plan. The wireless network may also be used for communicating with emergency response vehicles in order to enable faster and more effective responses to accidents.

摘要翻译： 可以使用无线连接在车辆之间建立自组织网络。 无线网络可以用于发送和接收关于道路状况的信息，例如平均速度，道路障碍物的位置和配置，事故场景的图像和交通流量计划。 无线网络还可以用于与紧急响应车辆进行通信，以便能够更快且更有效地应对事故。

公开(公告)号：US20140007098A1

公开(公告)日：2014-01-02

申请号：US13997379

申请日：2011-12-28

申请人： Paul M. Stillwell, JR. ,  Omesh Tickoo ,  Vineet Chadha ,  Yong Zhang ,  Rameshkumar G. Illikkal ,  Ravishankar Iyer

发明人： Paul M. Stillwell, JR. ,  Omesh Tickoo ,  Vineet Chadha ,  Yong Zhang ,  Rameshkumar G. Illikkal ,  Ravishankar Iyer

IPC分类号： G06F9/455

CPC分类号： G06F9/455 ,  G06F9/30003 ,  G06F9/45533

摘要： Embodiments of apparatuses and methods for processor accelerator interface virtualization are disclosed. In one embodiment, an apparatus includes instruction hardware and execution hardware. The instruction hardware is to receive instructions. One of the instruction types is an accelerator job request instruction type, which the execution hardware executes to cause the processor to submit a job request to an accelerator.

摘要翻译： 公开了用于处理器加速器接口虚拟化的装置和方法的实施例。 在一个实施例中，一种装置包括指令硬件和执行硬件。 指令硬件是接收指令。 指令类型之一是加速器作业请求指令类型，执行硬件执行以使处理器向加速器提交作业请求。

公开(公告)号：US20130138843A1

公开(公告)日：2013-05-30

申请号：US13729172

申请日：2012-12-28

申请人： Michael J. Espig ,  Zhen Fang ,  Ravishankar Iyer ,  David J. Harriman

发明人： Michael J. Espig ,  Zhen Fang ,  Ravishankar Iyer ,  David J. Harriman

IPC分类号： G06F13/24

CPC分类号： G06F13/24 ,  G06F9/542

摘要： In one embodiment, the present invention includes a method for handling a registration message received from a host processor, where the registration message delegates a poll operation with respect to a device from the host processor to another component. Information from the message may be stored in a poll table, and the component may send a read request to poll the device and report a result of the poll to the host processor based on a state of the device. Other embodiments are described and claimed.

摘要翻译： 在一个实施例中，本发明包括一种用于处理从主机处理器接收的注册消息的方法，其中所述注册消息将关于设备的轮询操作从主机处理器委托给另一个组件。 来自消息的信息可以存储在轮询表中，并且组件可以发送读请求以轮询该设备并且基于该设备的状态向轮询处理器报告轮询的结果。 描述和要求保护其他实施例。

公开(公告)号：US20080244221A1

公开(公告)日：2008-10-02

申请号：US11694322

申请日：2007-03-30

申请人： Donald K. Newell ,  Jaideep Moses ,  Ravishankar Iyer ,  Rameshkumar G. Illikkal ,  Srihari Makineni

发明人： Donald K. Newell ,  Jaideep Moses ,  Ravishankar Iyer ,  Rameshkumar G. Illikkal ,  Srihari Makineni

IPC分类号： G06F15/00

CPC分类号： G06F15/16

摘要： Embodiments of apparatuses, methods, and systems for exposing system topology to an execution environment are disclosed. In one embodiment, an apparatus includes execution cores and resources on a single integrated circuit, and topology logic. The topology logic is to populate a data structure with information regarding a relationship between the execution cores and the resources.

摘要翻译： 公开了将系统拓扑暴露给执行环境的装置，方法和系统的实施例。 在一个实施例中，装置包括在单个集成电路上的执行核心和资源以及拓扑逻辑。 拓扑逻辑是使用关于执行核心和资源之间的关系的信息来填充数据结构。

公开(公告)号：US09626586B2

公开(公告)日：2017-04-18

申请号：US14320092

申请日：2014-06-30

申请人： Yong Zhang ,  Ravishankar Iyer ,  Rameshkumar G. Illikkal ,  Donald K. Newell ,  Jianping Zhou

发明人： Yong Zhang ,  Ravishankar Iyer ,  Rameshkumar G. Illikkal ,  Donald K. Newell ,  Jianping Zhou

IPC分类号： G06K9/00 ,  G06K9/48 ,  G06K9/46

CPC分类号： G06K9/481 ,  G06K9/00973 ,  G06K9/4671 ,  G06K2009/485

摘要： Methods and systems of recognizing images may include an apparatus having a hardware module with logic to, for a plurality of vectors in an image, determine a first intermediate computation based on even pixels of an image vector, and determine a second intermediate computation based on odd pixels of an image vector. The logic can also combine the first and second intermediate computations into a Hessian matrix computation.

公开(公告)号：US20160306415A1

公开(公告)日：2016-10-20

申请号：US15192134

申请日：2016-06-24

申请人： Andrew J. Herdrich ,  Rameshkumar G. Illikkal ,  Ravishankar Iyer ,  Sadagopan Srinivasan ,  Jaideep Moses ,  Srihari Makineni

发明人： Andrew J. Herdrich ,  Rameshkumar G. Illikkal ,  Ravishankar Iyer ,  Sadagopan Srinivasan ,  Jaideep Moses ,  Srihari Makineni

IPC分类号： G06F1/32 ,  G06F12/08

CPC分类号： G06F1/3293 ,  G06F1/3206 ,  G06F1/3287 ,  G06F9/4418 ,  G06F9/5094 ,  G06F12/084 ,  G06F13/24 ,  G06F2212/1028 ,  G06F2212/60 ,  G06F2212/62 ,  H04W52/028 ,  H04W88/02 ,  Y02B70/30 ,  Y02B70/32 ,  Y02D10/122 ,  Y02D10/22 ,  Y02D70/00

摘要： In one embodiment, the present invention includes a method for receiving an interrupt from an accelerator, sending a resume signal directly to a small core responsive to the interrupt and providing a subset of an execution state of the large core to the first small core, and determining whether the small core can handle a request associated with the interrupt, and performing an operation corresponding to the request in the small core if the determination is in the affirmative, and otherwise providing the large core execution state and the resume signal to the large core. Other embodiments are described and claimed.

公开(公告)号：US20160182345A1

公开(公告)日：2016-06-23

申请号：US14581595

申请日：2014-12-23

申请人： Andrew J. Herdrich ,  Patrick Connor ,  Dinesh Kumar ,  Alexander W. Min ,  Ravishankar Iyer ,  Daniel J. Dahle ,  Kapil Sood ,  Jeffrey B. Shaw

发明人： Andrew J. Herdrich ,  Patrick Connor ,  Dinesh Kumar ,  Alexander W. Min ,  Ravishankar Iyer ,  Daniel J. Dahle ,  Kapil Sood ,  Jeffrey B. Shaw

IPC分类号： H04L12/26

CPC分类号： H04L43/50 ,  G06F12/0811 ,  G06F12/084 ,  G06F2212/152 ,  G06F2212/601 ,  H04L41/0896 ,  H04L41/5009 ,  H04L41/5025 ,  H04L41/5035 ,  H04L41/5096 ,  H04L43/16

摘要： In embodiments, apparatuses, methods and storage media (transitory and non-transitory) are described that are associated with end-to-end datacenter performance control. In various embodiments, an apparatus for computing may receive a datacenter performance target, determine an end-to-end datacenter performance level based at least in part on quality of service data collected from a plurality of nodes, and send a mitigation command based at least in part on a result of a comparison of the end-to-end datacenter performance level determined to the datacenter performance target. In various embodiments, the apparatus for computing may include one or more processors, a memory, a datacenter performance monitor to receive a datacenter performance target corresponding to a service level agreement, and a mitigation module to send a mitigation command based at least in part on a result of a comparison of an end-to-end datacenter performance level to a datacenter performance target.

摘要翻译： 在实施例中，描述了与端对端数据中心性能控制相关联的装置，方法和存储介质（暂时性和非暂时性）。 在各种实施例中，用于计算的装置可以接收数据中心性能目标，至少部分地基于从多个节点收集的服务质量数据来确定端对端数据中心性能级别，并且至少基于从多个节点收集的服务数据发送缓解命令 部分原因是比较确定数据中心性能目标的端对端数据中心性能级别。 在各种实施例中，用于计算的装置可以包括一个或多个处理器，存储器，用于接收与服务水平协议相对应的数据中心性能目标的数据中心性能监视器，以及缓解模块，用于至少部分地基于 这是将端到端数据中心性能级别与数据中心性能目标进行比较的结果。

公开(公告)号：US08799902B2

公开(公告)日：2014-08-05

申请号：US11786019

申请日：2007-04-09

申请人： Ramesh Kumar Illikkal ,  Ravishankar Iyer ,  Jaideep Moses ,  Don Newell ,  Tryggve Fossum

发明人： Ramesh Kumar Illikkal ,  Ravishankar Iyer ,  Jaideep Moses ,  Don Newell ,  Tryggve Fossum

IPC分类号： G06F9/46 ,  G06F1/00 ,  G06F1/26 ,  G06F1/32 ,  G06F15/173

CPC分类号： G06F9/5077 ,  G06F9/5094 ,  G06F2209/504 ,  Y02D10/22 ,  Y02D10/36

摘要： A method and apparatus for throttling power and/or performance of processing elements based on a priority of software entities is herein described. Priority aware power management logic receives priority levels of software entities and modifies operating points of processing elements associated with the software entities accordingly. Therefore, in a power savings mode, processing elements executing low priority applications/tasks are reduced to a lower operating point, i.e. lower voltage, lower frequency, throttled instruction issue, throttled memory accesses, and/or less access to shared resources. In addition, utilization logic potentially trackes utilization of a resource per priority level, which allows the power manager to determine operating points based on the effect of each priority level on each other from the perspective of the resources themselves. Moreover, a software entity itself may assign operating points, which the power manager enforces.

摘要翻译： 这里描述了一种基于软件实体的优先级来节制处理元件的功率和/或性能的方法和装置。 优先级感知功率管理逻辑接收软件实体的优先级，并相应地修改与软件实体相关联的处理元件的工作点。 因此，在省电模式中，执行低优先级应用/任务的处理元件被降低到较低的工作点，即较低的电压，较低的频率，节流的指令问题，节流的存储器访问和/或较少的对共享资源的访问。 此外，利用逻辑潜在地追踪每个优先级别的资源的利用率，这允许电力管理者从资源本身的角度基于每个优先级的影响来确定工作点。 此外，软件实体本身可以分配功率管理器执行的操作点。

公开(公告)号：US20130311738A1

公开(公告)日：2013-11-21

申请号：US13996438

申请日：2012-03-30

申请人： Xiaowei Jiang ,  Hongliang Gao ,  Zhen Fang ,  Srihari Makineni ,  Ravishankar Iyer

发明人： Xiaowei Jiang ,  Hongliang Gao ,  Zhen Fang ,  Srihari Makineni ,  Ravishankar Iyer

IPC分类号： G06F12/14

CPC分类号： G06F12/1466 ,  G06F12/1027 ,  G06F12/126

摘要： An apparatus is described that contains a processing core comprising a CPU core and at least one accelerator coupled to the CPU core. The CPU core comprises a pipeline having a translation look aside buffer. The CPU core comprising logic circuitry to set a lock bit in attribute data of an entry within the translation look-aside buffer entry to lock a page of memory reserved for the accelerator.

摘要翻译： 描述了一种装置，其包含处理核心，其包括CPU核心和耦合到CPU核心的至少一个加速器。 CPU核心包括具有翻译旁边缓冲器的管线。 CPU核心包括逻辑电路，用于在转换后备缓冲器条目中的条目的属性数据中设置锁定位，以锁定为加速器保留的存储器页面。