公开(公告)号：US07585371B2

公开(公告)日：2009-09-08

申请号：US10822093

申请日：2004-04-08

申请人： Eric R. Blomiley ,  Nirmal Ramaswamy ,  Ross S. Dando ,  Joel A. Drewes ,  Danny Dynka

发明人： Eric R. Blomiley ,  Nirmal Ramaswamy ,  Ross S. Dando ,  Joel A. Drewes ,  Danny Dynka

IPC分类号： C23C8/00 ,  C23C16/00

CPC分类号： C23C16/481 ,  C23C14/505 ,  C23C14/541 ,  C23C16/45521 ,  C23C16/4584 ,  C23C16/52 ,  C30B25/02 ,  C30B29/06

摘要： In one implementation, a substrate susceptor for receiving a semiconductor substrate for selective epitaxial silicon-comprising depositing thereon, where the depositing comprises measuring emissivity of the susceptor from at least one susceptor location in a non-contacting manner, includes a body having a front substrate receiving side, a back side, and a peripheral edge. At least one susceptor location from which emissivity is to be measured is received on at least one of the front substrate receiving side, the back side, and the edge. Such at least one susceptor location comprises an outermost surface comprising a material upon which selective epitaxial silicon will not deposit upon during selective epitaxial silicon depositing on a semiconductor substrate received by the susceptor for at least an initial thickness of epitaxial silicon depositing on said substrate. Other aspects and implementations are contemplated.

摘要翻译： 在一个实施方案中，用于接收用于选择性外延硅的半导体衬底的衬底感受体包括沉积在其上，其中所述沉积包括以非接触方式从至少一个感受器位置测量所述基座的发射率，所述衬底基座包括具有前衬底 接收侧，后侧和周缘。 在前基板接收侧，后侧和边缘中的至少一个上接收要测量发射率的至少一个感受器位置。 这样的至少一个感受器位置包括最外表面，其包括材料，选择性外延硅将不会沉积在选择性外延硅沉积在由基座接收的半导体衬底上，以至少沉积在所述衬底上的外延硅的初始厚度。 考虑了其他方面和实现。

公开(公告)号：US20090179231A1

公开(公告)日：2009-07-16

申请号：US12410179

申请日：2009-03-24

申请人： Nirmal Ramaswamy ,  Gurtej S. Sandhu ,  Cem Basceri ,  Eric R. Blomiley

发明人： Nirmal Ramaswamy ,  Gurtej S. Sandhu ,  Cem Basceri ,  Eric R. Blomiley

IPC分类号： H01L29/772

CPC分类号： H01L29/66787 ,  H01L21/0237 ,  H01L21/02381 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/66742 ,  H01L29/78642

摘要： This invention includes methods of forming layers comprising epitaxial silicon, and field effect transistors. In one implementation, a method of forming a layer comprising epitaxial silicon comprises epitaxially growing a silicon-comprising layer from an exposed monocrystalline material. The epitaxially grown silicon comprises at least one of carbon, germanium, and oxygen present at a total concentration of no greater than 1 atomic percent. In one implementation, the layer comprises a silicon germanium alloy comprising at least 1 atomic percent germanium, and further comprises at least one of carbon and oxygen at a total concentration of no greater than 1 atomic percent. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括形成包括外延硅和场效应晶体管的层的方法。 在一个实施方案中，形成包含外延硅的层的方法包括从暴露的单晶材料外延生长含硅层。 外延生长的硅包括以不超过1原子％的总浓度存在的碳，锗和氧中的至少一种。 在一个实施方案中，该层包括含有至少1原子％锗的硅锗合金，并且还包含总浓度不大于1原子％的碳和氧中的至少一种。 考虑了其他方面和实现。

公开(公告)号：US07538392B2

公开(公告)日：2009-05-26

申请号：US11834367

申请日：2007-08-06

申请人： Nirmal Ramaswamy ,  Eric Blomiley ,  Joel Drewes

发明人： Nirmal Ramaswamy ,  Eric Blomiley ,  Joel Drewes

IPC分类号： H01L21/84

CPC分类号： H01L21/84 ,  H01L21/76283 ,  H01L21/823481 ,  H01L21/823878 ,  H01L27/1203 ,  H01L29/0653 ,  H01L29/66772

摘要： The present invention is generally directed to a method of forming a pseudo SOI substrate and semiconductor devices. In one illustrative embodiment, the method comprises forming a plurality of trenches in a semiconducting substrate comprised of silicon, each of the trenches having a depth, forming a layer of insulating material within each of the plurality of trenches, the layer of insulating material having a thickness that is less than the depth of the trenches, and performing an anneal process on the substrate in a hydrogen environment to cause the silicon substrate material to merge above the layer of insulating material within the plurality of trenches to thereby define a pseudo SOI substrate.

摘要翻译： 本发明一般涉及形成伪SOI衬底和半导体器件的方法。 在一个说明性实施例中，该方法包括在由硅组成的半导体衬底中形成多个沟槽，每个沟槽具有深度，在多个沟槽的每一个内形成绝缘材料层，该绝缘材料层具有 厚度小于沟槽的深度，并且在氢环境中对衬底进行退火处理，以使硅衬底材料在多个沟槽内的绝缘材料层上方合并，从而限定伪SOI衬底。

公开(公告)号：US20090045447A1

公开(公告)日：2009-02-19

申请号：US11840485

申请日：2007-08-17

申请人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

发明人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Bhaskar Srinivasan ,  John Smythe

IPC分类号： H01L29/78 ,  H01L21/316 ,  H01L21/28

CPC分类号： H01L21/31691 ,  H01L21/28273 ,  H01L21/3142 ,  H01L29/42332 ,  H01L29/7881

摘要： Methods and devices are disclosed, such as those involving forming a charge trap for, e.g., a memory device, which can include flash memory cells. A substrate is exposed to temporally-separated pulses of a titanium source material, a strontium source material, and an oxygen source material capable of forming an oxide with the titanium source material and the strontium source material to form the charge trapping layer on the substrate.

摘要翻译： 公开了方法和装置，例如涉及为例如可以包括闪速存储器单元的存储器件形成电荷阱的那些。 将衬底暴露于钛源材料，锶源材料和能够与钛源材料和锶源材料形成氧化物的氧源材料的时间分离的脉冲，以在衬底上形成电荷捕获层。

公开(公告)号：US07390710B2

公开(公告)日：2008-06-24

申请号：US10932795

申请日：2004-09-02

申请人： Garo Derderian ,  Nirmal Ramaswamy

发明人： Garo Derderian ,  Nirmal Ramaswamy

IPC分类号： H01L21/8238

CPC分类号： H01L27/11521 ,  H01L27/115 ,  H01L29/42336

摘要： Layers of epitaxial silicon are used to protect the tunnel dielectric layer of a floating-gate memory cell from excessive oxidation or removal during the formation of shallow trench isolation (STI) regions. Following trench formation, the layers of epitaxial silicon are grown from silicon-containing layers on opposing sides of the tunnel dielectric layer, thereby permitting their thickness to be limited to approximately one-half of the thickness of the tunnel dielectric layer. The epitaxial silicon may be oxidized prior to filling the trench with a dielectric material or a dielectric fill may occur prior to oxidizing at least the epitaxial silicon covering the ends of the tunnel dielectric layer.

摘要翻译： 使用外延硅层来保护浮栅存储器单元的隧道介电层免于在形成浅沟槽隔离（STI）区域期间的过度氧化或去除。 在沟槽形成之后，外延硅层从隧道介电层的相对侧上的含硅层生长，从而允许其厚度被限制为隧道介电层的厚度的大约二分之一。 外延硅可以在用电介质材料填充沟槽之前被氧化，或者在氧化至少覆盖隧道介电层的端部的外延硅之前可能发生电介质填充。

公开(公告)号：US07276416B2

公开(公告)日：2007-10-02

申请号：US11256424

申请日：2005-10-20

申请人： Nirmal Ramaswamy ,  Gurtej S. Sandhu ,  Cem Basceri ,  Eric R. Blomiley

发明人： Nirmal Ramaswamy ,  Gurtej S. Sandhu ,  Cem Basceri ,  Eric R. Blomiley

IPC分类号： H01L21/336

CPC分类号： H01L29/66787 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/66553 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/78642

摘要： The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括形成外延含硅材料的方法和形成垂直晶体管的方法。 在一个实施方案中，形成外延含硅材料的方法包括提供包括单晶材料的衬底。 单晶材料的第一部分向外暴露，而单晶材料的第二部分被掩蔽。 第一含硅层从第一部分的暴露的单晶材料而不是被掩蔽的第二部分的单晶材料外延生长。 在生长第一含硅层之后，单晶材料的第二部分被未掩蔽。 然后从第一含硅层和第二部分的未掩模的单晶材料外延生长第二含硅层。 考虑了其他方面和实现。

公开(公告)号：US20070178646A1

公开(公告)日：2007-08-02

申请号：US11730039

申请日：2007-03-29

申请人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Cem Basceri ,  Eric Blomiley

发明人： Nirmal Ramaswamy ,  Gurtej Sandhu ,  Cem Basceri ,  Eric Blomiley

IPC分类号： H01L21/336 ,  H01L21/20

CPC分类号： H01L29/66787 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L29/66553 ,  H01L29/66666 ,  H01L29/7827 ,  H01L29/78642

摘要： The invention includes methods of forming epitaxial silicon-comprising material and methods of forming vertical transistors. In one implementation, a method of forming epitaxial silicon-comprising material includes providing a substrate comprising monocrystalline material. A first portion of the monocrystalline material is outwardly exposed while a second portion of the monocrystalline material is masked. A first silicon-comprising layer is epitaxially grown from the exposed monocrystalline material of the first portion and not from the monocrystalline material of the masked second portion. After growing the first silicon-comprising layer, the second portion of the monocrystalline material is unmasked. A second silicon-comprising layer is then epitaxially grown from the first silicon-comprising layer and from the unmasked monocrystalline material of the second portion. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括形成外延含硅材料的方法和形成垂直晶体管的方法。 在一个实施方案中，形成外延含硅材料的方法包括提供包括单晶材料的衬底。 单晶材料的第一部分向外暴露，而单晶材料的第二部分被掩蔽。 第一含硅层从第一部分的暴露的单晶材料而不是被掩蔽的第二部分的单晶材料外延生长。 在生长第一含硅层之后，单晶材料的第二部分被未掩蔽。 然后从第一含硅层和第二部分的未掩模的单晶材料外延生长第二含硅层。 考虑了其他方面和实现。

公开(公告)号：US20070087576A1

公开(公告)日：2007-04-19

申请号：US11601232

申请日：2006-11-17

申请人： Eric Blomiley ,  Nirmal Ramaswamy ,  Ross Dando ,  Joel Drewes ,  Danny Dynka

发明人： Eric Blomiley ,  Nirmal Ramaswamy ,  Ross Dando ,  Joel Drewes ,  Danny Dynka

IPC分类号： C23C16/00 ,  H01L21/31

CPC分类号： C23C16/481 ,  C23C14/505 ,  C23C14/541 ,  C23C16/45521 ,  C23C16/4584 ,  C23C16/52 ,  C30B25/02 ,  C30B29/06

摘要： In one implementation, a substrate susceptor for receiving a semiconductor substrate for selective epitaxial silicon-comprising depositing thereon, where the depositing comprises measuring emissivity of the susceptor from at least one susceptor location in a non-contacting manner, includes a body having a front substrate receiving side, a back side, and a peripheral edge. At least one susceptor location from which emissivity is to be measured is received on at least one of the front substrate receiving side, the back side, and the edge. Such at least one susceptor location comprises an outermost surface comprising a material upon which selective epitaxial silicon will not deposit upon during selective epitaxial silicon depositing on a semiconductor substrate received by the susceptor for at least an initial thickness of epitaxial silicon depositing on said substrate. Other aspects and implementations are contemplated.

摘要翻译： 在一个实施方案中，用于接收用于选择性外延硅的半导体衬底的衬底感受体包括沉积在其上，其中所述沉积包括以非接触方式从至少一个感受器位置测量所述基座的发射率，所述衬底基座包括具有前衬底 接收侧，后侧和周缘。 在前基板接收侧，后侧和边缘中的至少一个上接收要测量发射率的至少一个感受器位置。 这样的至少一个感受器位置包括最外表面，其包括材料，选择性外延硅将不会沉积在选择性外延硅沉积在由基座接收的半导体衬底上，以至少沉积在所述衬底上的外延硅的初始厚度。 考虑了其他方面和实现。

公开(公告)号：US20060254506A1

公开(公告)日：2006-11-16

申请号：US11490662

申请日：2006-07-21

申请人： Nirmal Ramaswamy ,  Eric Blomiley ,  Joel Drewes

发明人： Nirmal Ramaswamy ,  Eric Blomiley ,  Joel Drewes

IPC分类号： C30B23/00 ,  C30B25/00 ,  C30B28/12 ,  C30B28/14

CPC分类号： H01L21/67248 ,  C23C16/4405 ,  C23C16/481 ,  G01J5/0003 ,  H01L21/67115

摘要： The invention includes methods of depositing elemental silicon-comprising materials over a semiconductor substrate, and methods of cleaning an internal wall of a chamber. In one implementation, a semiconductor substrate is positioned within a chamber for deposition. The chamber comprises an infrared radiation transparent wall. An elemental silicon-comprising material is deposited on the semiconductor substrate. During such depositing, a deposit is formed on the infrared radiation transparent wall within the chamber. After such depositing, a plasma is generated within the chamber with a cleaning gas from at least one plasma generating electrode received external of the chamber proximate the infrared radiation transparent wall effective to remove at least some of the deposit from the infrared radiation transparent wall within the chamber. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括在半导体衬底上沉积元素含硅材料的方法，以及清洁室内壁的方法。 在一个实施方案中，半导体衬底位于用于沉积的室内。 该室包括红外辐射透明壁。 元素含硅材料沉积在半导体衬底上。 在这样的沉积期间，在室内的红外辐射透明壁上形成沉积物。 在这种沉积之后，在室内产生等离子体，其中来自至少一个等离子体产生电极的清洁气体被接收在靠近红外辐射透明壁的腔室的外部，有效地去除了红外辐射透明壁内的至少一些沉积物 房间。 考虑了其他方面和实现。

公开(公告)号：US20060243209A1

公开(公告)日：2006-11-02

申请号：US11444768

申请日：2006-05-31

申请人： Eric Blomiley ,  Nirmal Ramaswamy ,  Ross Dando ,  Joel Drewes ,  Danny Dynka

发明人： Eric Blomiley ,  Nirmal Ramaswamy ,  Ross Dando ,  Joel Drewes ,  Danny Dynka

IPC分类号： C23C16/00

CPC分类号： C23C16/481 ,  C23C14/505 ,  C23C14/541 ,  C23C16/45521 ,  C23C16/4584 ,  C23C16/52 ,  C30B25/02 ,  C30B29/06

摘要： In one implementation, a substrate susceptor for receiving a semiconductor substrate for selective epitaxial silicon-comprising depositing thereon, where the depositing comprises measuring emissivity of the susceptor from at least one susceptor location in a non-contacting manner, includes a body having a front substrate receiving side, a back side, and a peripheral edge. At least one susceptor location from which emissivity is to be measured is received on at least one of the front substrate receiving side, the back side, and the edge. Such at least one susceptor location comprises an outermost surface comprising a material upon which selective epitaxial silicon will not deposit upon during selective epitaxial silicon depositing on a semiconductor substrate received by the susceptor for at least an initial thickness of epitaxial silicon depositing on said substrate. Other aspects and implementations are contemplated. In one implementation, a substrate susceptor for receiving a semiconductor substrate for selective epitaxial silicon-comprising depositing thereon, where the depositing comprises measuring emissivity of the susceptor from at least one susceptor location in a non-contacting manner, includes a body having a front substrate receiving side, a back side, and a peripheral edge. At least one susceptor location from which emissivity is to be measured is received on at least one of the front substrate receiving side, the back side, and the edge. Such at least one susceptor location comprises an outermost surface comprising a material upon which selective epitaxial silicon will not deposit upon during selective epitaxial silicon depositing on a semiconductor substrate received by the susceptor for at least an initial thickness of epitaxial silicon depositing on said substrate. Other aspects and implementations are contemplated.

摘要翻译： 在一个实施方案中，用于接收用于选择性外延硅的半导体衬底的衬底感受体包括沉积在其上，其中所述沉积包括以非接触方式从至少一个感受器位置测量所述基座的发射率，所述衬底基座包括具有前衬底 接收侧，后侧和周缘。 在前基板接收侧，后侧和边缘中的至少一个上接收要测量发射率的至少一个感受器位置。 这样的至少一个感受器位置包括最外表面，其包括材料，选择性外延硅将不会沉积在选择性外延硅沉积在由基座接收的半导体衬底上，以至少沉积在所述衬底上的外延硅的初始厚度。 考虑了其他方面和实现。 在一个实施方案中，用于接收用于选择性外延硅的半导体衬底的衬底感受体包括沉积在其上，其中所述沉积包括以非接触方式从至少一个感受器位置测量所述基座的发射率，所述衬底基座包括具有前衬底 接收侧，后侧和周缘。 在前基板接收侧，后侧和边缘中的至少一个上接收要测量发射率的至少一个感受器位置。 这样的至少一个感受器位置包括最外表面，其包括材料，选择性外延硅将不会沉积在选择性外延硅沉积在由基座接收的半导体衬底上，以至少沉积在所述衬底上的外延硅的初始厚度。 考虑了其他方面和实现。