公开(公告)号：US20100164027A1

公开(公告)日：2010-07-01

申请号：US12522693

申请日：2007-11-28

Applicant: Torsten Kramer ,  Kathrin Knese ,  Hubert Benzel ,  Gregor Schuermann ,  Simon Armbruster ,  Christoph Schelling

Inventor： Torsten Kramer ,  Kathrin Knese ,  Hubert Benzel ,  Gregor Schuermann ,  Simon Armbruster ,  Christoph Schelling

IPC: H01L29/84 ,  H01L21/306

CPC classification number: B81C1/00182 ,  B81B2201/0264 ,  B81B2207/015 ,  B81C2201/0115 ,  G01L19/0038

Abstract: A method for producing a component having at least one diaphragm formed in the upper surface of the component, which diaphragm spans a cavity, and having at least one access opening to the cavity from the back side of the component, at least one first diaphragm layer and the cavity being produced in a monolithic semiconductor substrate from the upper surface of the component, and the access opening being produced in a temporally limited etching step from the back side of the substrate. The access opening is placed in a region in which the substrate material comes up to the first diaphragm layer. The etching process for producing the access opening includes at least one anisotropic etching step and at least one isotropic etching step, in the anisotropic etching step, an etching channel from the back side of the substrate being produced, which terminates beneath the first diaphragm layer in the vicinity of the cavity, and at least the end region of this etching channel being expanded in the isotropic etching step until the etching channel is connected to the cavity.

Abstract translation: 一种用于制造具有形成在所述部件的上表面中的至少一个光阑的部件的方法，所述至少一个光阑形成在所述部件的上表面中，所述光阑跨越空腔，并且具有至少一个从所述部件的后侧到所述腔的进入开口，至少一个第一隔膜层 并且所述空腔从所述部件的上表面在单片半导体衬底中产生，并且所述存取开口在时间上受限制的蚀刻步骤中从所述衬底的背面制造。 进入口放置在基板材料到达第一隔膜层的区域中。 用于制造进出口的蚀刻工艺包括至少一个各向异性蚀刻步骤和至少一个各向同性蚀刻步骤，在各向异性蚀刻步骤中，从所述基板的背面制造蚀刻通道，其终止于第一隔膜层下方 该腔的附近，并且至少该蚀刻通道的端部区域在各向同性蚀刻步骤中扩展，直到蚀刻通道连接到空腔。

公开(公告)号：US07713778B2

公开(公告)日：2010-05-11

申请号：US10544801

申请日：2004-02-13

Applicant: Yang Yang Li ,  Frederique Cunin ,  Michael J. Sailor ,  Jamie R. Link ,  Ting Gao

Inventor： Yang Yang Li ,  Frederique Cunin ,  Michael J. Sailor ,  Jamie R. Link ,  Ting Gao

IPC: H01L21/00

CPC classification number: B29D11/00346 ,  B29D11/0074 ,  B81B2201/06 ,  B81B2203/0361 ,  B81C99/0085 ,  B81C2201/0115 ,  B81C2201/034 ,  Y10S977/921

Abstract: A method of generating three-dimensional nanostructures that includes providing a silicon substrate, creating a porous silicon template from the silicon substrate, wherein the template is created to have a predetermined configuration, depositing a predetermined material on the porous silicon template, and removing the porous silicon template from the deposited material to leave a freestanding nanostructure.

Abstract translation: 一种产生三维纳米结构的方法，其包括提供硅衬底，从所述硅衬底产生多孔硅模板，其中所述模板被创建为具有预定构型，在所述多孔硅模板上沉积预定材料，以及除去所述多孔硅模板 硅模板从沉积的材料离开独立的纳米结构。

公开(公告)号：US07709933B2

公开(公告)日：2010-05-04

申请号：US10742055

申请日：2003-12-18

Applicant: Hans Artmann ,  Thorsten Pannek ,  Hans-Peter Trah ,  Franz Laermer

Inventor： Hans Artmann ,  Thorsten Pannek ,  Hans-Peter Trah ,  Franz Laermer

IPC: H01L31/036

CPC classification number: C04B38/007 ,  B81C1/00492 ,  B81C2201/0115 ,  C04B2111/28 ,  C04B35/14

Abstract: A structural element having a region of porous silicon or porous silicon oxide, which was obtained from a porization, starting from an edge area of the region, in at least largely crystalline silicon. Relative to the edge area, the crystalline silicon has a crystal orientation that has an orientation that differs from a orientation or from an orientation that is equivalent for reasons of symmetry. This structural element is suited for use in a mass-flow sensor, in a component for the thermal decoupling of sensor and/or actuator structures, or a gas sensor. Furthermore, methods for setting the thermal conductivity of a region of porous silicon or porous silicon oxide of a structural element are described. In particular, in a porization of crystalline silicon, starting from an edge area of the region, the crystalline orientation of the silicon relative to the edge area is selected such that a thermal conductivity comes about along a direction perpendicular to the edge area that differs from, in particular is lower than, the thermal conductivity, that comes about in this direction in an otherwise analogous porization of crystalline silicon having a orientation or an equivalent orientation relative to this edge area.

Abstract translation: 具有多孔硅或多孔氧化硅区域的结构元件，其从至少大部分为晶体硅的区域的边缘区域开始从孔化获得。 相对于边缘区域，晶体硅具有取向不同于<100>取向的晶体取向或者由于对称原因等同的取向。 该结构元件适用于质量流量传感器，用于传感器和/或致动器结构或气体传感器的热解耦的部件。 此外，描述了用于设定结构元件的多孔硅或多孔氧化硅区域的热导率的方法。 特别地，在从区域的边缘区域开始的晶体硅的孔化中，选择硅相对于边缘区域的晶体取向，使得热导率沿垂直于与边缘区域不同的边缘区域的方向 ，特别是低于导热率，其在相对于该边缘区域具有<100>取向或等同取向的晶体硅的另外类似的孔化中在该方向上。

公开(公告)号：US20100066208A1

公开(公告)日：2010-03-18

申请号：US12372369

申请日：2009-02-17

Applicant: Jaeyoung CHOI ,  Jongmin KIM ,  Sang Yoon LEE

Inventor： Jaeyoung CHOI ,  Jongmin KIM ,  Sang Yoon LEE

IPC: H02N2/18

CPC classification number: H02N2/18 ,  B81B2201/038 ,  B81B2203/0376 ,  B81C1/00103 ,  B81C2201/0115

Abstract: Exemplary embodiments relate to an energy converting apparatus and a method for converting energy, which may convert energy of an applied signal into electrical energy. The energy converting apparatus may include at least one nanowire which resonates in response to the applied signal. The resonating nanowire may contact an electrode allowing a current to flow through the electrode and the nanowire by a Schottky contact between the electrode and the nanowire. The method for converting energy may include applying a signal to at least one nanowire to resonate the nanowire, and generating electrical energy through the contact between the resonating nanowire and an electrode.

Abstract translation: 示例性实施例涉及能量转换装置和用于转换能量的方法，其可以将施加的信号的能量转换成电能。 能量转换装置可以包括响应于所施加的信号而谐振的至少一个纳米线。 谐振纳米线可以接触允许电流通过电极和纳米线之间的肖特基接触流过电极和纳米线的电极。 用于转换能量的方法可以包括将信号施加到至少一个纳米线以共振纳米线，以及通过谐振纳米线和电极之间的接触产生电能。

公开(公告)号：US20100006957A1

公开(公告)日：2010-01-14

申请号：US12477798

申请日：2009-06-03

Applicant: Greja Johanna Adriana Maria VERHEIJDEN ,  Roel Daamen ,  Gerhard Koops

Inventor： Greja Johanna Adriana Maria VERHEIJDEN ,  Roel Daamen ,  Gerhard Koops

IPC: H01L29/84 ,  H01L21/30

CPC classification number: B81C1/00293 ,  B81C2201/0115 ,  B81C2203/0136 ,  B81C2203/0145

Abstract: A method of packaging a micro electromechanical structure is disclosed. The method comprises the steps of forming the structure on a substrate, depositing a sacrificial layer over the structure, patterning the sacrificial layer, depositing a porous layer over the patterned sacrificial layer, removing the patterned sacrificial layer through the porous layer, treating the porous layer with a plasma and depositing a capping layer over the plasma-treated porous layer. The plasma treatment step ensures that the capping layer material cannot enter the cavity formed by the removal of the sacrificial layer through the porous layer. A device formed by this method is also disclosed.

Abstract translation: 公开了一种封装微机电结构的方法。 该方法包括以下步骤：在衬底上形成结构，在结构上沉积牺牲层，图案化牺牲层，在图案化的牺牲层上沉积多孔层，通过多孔层去除图案化的牺牲层，处理多孔层 并在等离子体处理的多孔层上沉积覆盖层。 等离子体处理步骤确保了封盖层材料不能进入通过多孔层去除牺牲层而形成的空腔。 还公开了通过该方法形成的器件。

公开(公告)号：US07569412B2

公开(公告)日：2009-08-04

申请号：US11011898

申请日：2004-12-13

Applicant: Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

Inventor： Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

IPC: H01L21/00

CPC classification number: B81C1/00182 ,  B81B2203/0127 ,  B81B2203/0315 ,  B81C2201/0115

Abstract: A method for producing a micromechanical diaphragm sensor includes providing a semiconductor substrate having a first region, a diaphragm, and a cavity that is located at least partially below the diaphragm. Above at least one part of the first region, a second region is generated in or on the surface of the semiconductor substrate, with at least one part of the second region being provided as crosspieces. The diaphragm is formed by a deposited sealing layer, and includes at least a part of the crosspieces.

Abstract translation: 微机械振动膜传感器的制造方法包括提供具有至少部分地位于隔膜下方的第一区域，隔膜和空腔的半导体基板。 在第一区域的至少一部分上方，在半导体衬底的表面中或表面上产生第二区域，第二区域的至少一部分被设置为十字形。 隔膜由沉积的密封层形成，并且包括至少一部分挡条。

公开(公告)号：US20090127640A1

公开(公告)日：2009-05-21

申请号：US12359904

申请日：2009-01-26

Applicant: Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

Inventor： Hubert Benzel ,  Frank Schaefer ,  Simon Armbruster ,  Gerhard Lammel ,  Christoph Schelling ,  Joerg Brasas

IPC: H01L29/84 ,  H01L21/3213

CPC classification number: B81B3/007 ,  B81B2201/0264 ,  B81B2203/0127 ,  B81C1/00658 ,  B81C2201/0115 ,  B81C2201/0116 ,  B81C2201/0136

Abstract: A manufacturing method for a micromechanical semiconductor element includes providing on a semiconductor substrate a patterned stabilizing element having at least one opening. The opening is arranged such that it allows access to a first region in the semiconductor substrate, the first region having a first doping. Furthermore, a selective removal of at least a portion of the semiconductor material having the first doping out of the first region of the semiconductor substrate is provided. In addition, a membrane is produced above the first region using a first epitaxy layer applied on the stabilizing element. In a further method step, at least a portion of the first region is used to produce a cavity underneath the stabilizing element. In this manner, the present invention provides for the production of the patterned stabilizing element by means of a second epitaxy layer, which is applied on the semiconductor substrate.

Abstract translation: 微机电半导体元件的制造方法包括在半导体衬底上提供具有至少一个开口的图案化稳定元件。 开口被布置成使得其允许接近半导体衬底中的第一区域，第一区域具有第一掺杂。 此外，提供了选择性地去除半导体衬底的第一区域中具有第一掺杂的半导体材料的至少一部分。 此外，使用施加在稳定元件上的第一外延层，在第一区域上方产生膜。 在另一方法步骤中，第一区域的至少一部分用于在稳定元件下方产生空腔。 以这种方式，本发明提供了通过施加在半导体衬底上的第二外延层来生产图案化的稳定元件。

公开(公告)号：US07396479B1

公开(公告)日：2008-07-08

申请号：US10883466

申请日：2004-06-30

Applicant: Kramadhati Ravi ,  Alan M. Myers

Inventor： Kramadhati Ravi ,  Alan M. Myers

IPC: B31D3/00 ,  H01L21/30 ,  H01L21/46

CPC classification number: H01L23/473 ,  B81C1/005 ,  B81C1/00507 ,  B81C2201/0109 ,  B81C2201/0115 ,  F04B19/006 ,  F04B37/02 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A method for preparing porous silicon in which an oxidized single crystal silicon wafer is first bonded to a polycrystalline wafer. The oxidized high quality wafer is then thinned to the desired thickness by grinding and polishing. An oxide may then be deposited on the wafer and patterned to expose regions were the porous silicon will be formed. The single crystal silicon wafer may then etched in the unmasked areas of the pattern to thin the single crystal silicon wafer to the desired thickness in the range of 0.1 microns to 1.0 microns. Next, the porous silicon may be formed using standard techniques. Once the porous silicon is formed the polycrystalline silicon wafer may be ground away and the oxide layer may be undercut to expose the porous silicon. Finally, an appropriate liner material may be applied to the porous silicon.

Abstract translation: 一种多孔硅的制造方法，其中首先将氧化的单晶硅晶片接合到多晶晶片。 然后通过研磨和抛光将氧化的高质量晶片减薄至所需厚度。 然后可以将氧化物沉积在晶片上并且被图案化以暴露出将形成多孔硅的区域。 然后可以在图案的未屏蔽区域中蚀刻单晶硅晶片，以将单晶硅晶片细化至0.1微米至1.0微米范围内的所需厚度。 接下来，可以使用标准技术形成多孔硅。 一旦多孔硅形成，多晶硅晶片可能被磨掉，并且氧化物层可能被切削以露出多孔硅。 最后，可以将合适的衬垫材料施加到多孔硅上。

公开(公告)号：US07368313B2

公开(公告)日：2008-05-06

申请号：US11053115

申请日：2005-02-07

Applicant: Hubert Benzel ,  Gerhard Lammel

Inventor： Hubert Benzel ,  Gerhard Lammel

IPC: H01L29/04

CPC classification number: B81C1/00158 ,  B81B2201/0264 ,  B81C2201/0115 ,  B81C2201/014 ,  G01L9/0042 ,  G01L9/0054

Abstract: In a method for manufacturing a micromechanical semiconductor component, e.g., a pressure sensor, a locally limited, buried, and at least partially oxidized porous layer is produced in a semiconductor substrate. A cavity is subsequently produced in the semiconductor substrate from the back, directly underneath the porous first layer, using a trench etch process. The porous first layer is used as a stop layer for the trench. Thin diaphragms having a low thickness tolerance may thus be produced for differential pressure measurement.

Abstract translation: 在制造微机电半导体部件的方法中，例如压力传感器，在半导体衬底中产生局部限制的，掩埋的和至少部分氧化的多孔层。 随后，使用沟槽蚀刻工艺，在半导体衬底中从后部直接在多孔第一层下方产生空腔。 多孔第一层用作沟槽的停止层。 因此可以产生具有低厚度公差的薄膜，用于差压测量。

公开(公告)号：US20070247696A1

公开(公告)日：2007-10-25

申请号：US11407470

申请日：2006-04-19

Applicant: Teruo Sasagawa ,  Lior Kogut

Inventor： Teruo Sasagawa ,  Lior Kogut

IPC: G02F1/03

CPC classification number: B81B3/001 ,  B81B2201/047 ,  B81C2201/0115 ,  G02B26/001

Abstract: A microelectromechanical device (MEMS) utilizing a porous electrode surface for reducing stiction is disclosed. In one embodiment, a microelectromechanical device is an interferometric modulator that includes a transparent electrode having a first surface; and a movable reflective electrode with a second surface facing the first surface. The movable reflective electrode is movable between a relaxed and actuated (collapsed) position. An aluminum layer is provided on either the first or second surface. The aluminum layer is then anodized to provide an aluminum oxide layer which has a porous surface. The porous surface, in the actuated position, decreases contact area between the electrodes, thus reducing stiction.

Abstract translation: 公开了一种利用多孔电极表面降低静摩擦力的微机电装置（MEMS）。 在一个实施例中，微机电器件是干涉式调制器，其包括具有第一表面的透明电极; 以及具有面向第一表面的第二表面的可移动反射电极。 可移动反射电极可在松弛和致动（折叠）位置之间移动。 在第一或第二表面上提供铝层。 然后将铝层阳极氧化以提供具有多孔表面的氧化铝层。 处于致动位置的多孔表面减小了电极之间的接触面积，从而减小了静电。