公开(公告)号：US20120286311A1

公开(公告)日：2012-11-15

申请号：US13413407

申请日：2012-03-06

Applicant: Mordehai Margalit

Inventor： Mordehai Margalit

IPC: H01L33/58 ,  H01L33/48

CPC classification number: H01L33/502 ,  H01L33/0012 ,  H01L33/32 ,  H01L33/382 ,  H01L33/385 ,  H01L33/40 ,  H01L33/44 ,  H01L33/50 ,  H01L33/507 ,  H01L33/508 ,  H01L33/52 ,  H01L33/56 ,  H01L33/58 ,  H01L33/60 ,  H01L33/62 ,  H01L33/647 ,  H01L2933/0016 ,  H01L2933/0025 ,  H01L2933/0033 ,  H01L2933/0041 ,  H01L2933/005 ,  H01L2933/0066

Abstract: A light emitting diode (LED) device and packaging for same is disclosed. In some aspects, the LED is manufactured using a vertical configuration including a plurality of layers. Certain layers act to promote mechanical, electrical, thermal, or optical characteristics of the device. The device avoids design problems, including manufacturing complexities, costs and heat dissipation problems found in conventional LED devices. Some embodiments include a plurality of optically permissive layers, including an optically permissive cover substrate or wafer stacked over a semiconductor LED and positioned using one or more alignment markers.

公开(公告)号：US20120012863A1

公开(公告)日：2012-01-19

申请号：US13257393

申请日：2009-03-23

Applicant: Alexandre M. Bratkovski ,  Viatcheslav Osipov

Inventor： Alexandre M. Bratkovski ,  Viatcheslav Osipov

IPC: H01L33/34

CPC classification number: H01L33/34 ,  H01L33/0012

Abstract: An indirect-bandgap-semiconductor, light-emitting diode. The indirect-bandgap-semiconductor, light-emitting diode includes a plurality of portions including a p-doped portion of an indirect-bandgap semiconductor, an intrinsic portion of the indirect-bandgap semiconductor, and a n-doped portion of the indirect-bandgap semiconductor. The intrinsic portion is disposed between the p-doped portion and the n-doped portion and forms a p-i junction with the p-doped portion, and an i-n junction with the n-doped portion. The p-i junction and the i-n junction are configured to facilitate formation of at least one hot electron-hole plasma in the intrinsic portion when the indirect-bandgap-semiconductor, light-emitting diode is reverse biased and to facilitate luminescence produced by recombination of a hot electron with a hole.

Abstract translation: 间接带隙半导体，发光二极管。 间接带隙半导体发光二极管包括多个部分，其包括间接带隙半导体的p掺杂部分，间接带隙半导体的本征部分和间接带隙的n掺杂部分 半导体。 本征部分设置在p掺杂部分和n掺杂部分之间，并与p掺杂部分形成p-i结，并与n掺杂部分形成i-n结。 当间接带隙半导体发光二极管被反向偏置时，pi结和in结被构造成便于在本征部分中形成至少一个热电子空穴等离子体，并且促进通过热的复合产生的发光 电子有孔。

公开(公告)号：US20080233670A1

公开(公告)日：2008-09-25

申请号：US12064033

申请日：2005-12-09

Applicant: Won-kook Choi ,  Yeon-sik Jung

Inventor： Won-kook Choi ,  Yeon-sik Jung

IPC: H01L21/00

CPC classification number: H01L33/0087 ,  H01L33/0012 ,  H01L33/0095 ,  H01L33/285

Abstract: A method of fabricating a p-i-n type light emitting diode using p-type ZnO, and particularly, a technique for fabricating a p-type ZnO thin film doped with copper, a light emitting diode manufactured using the same, and its application to electrical and magnetic devices. The method of fabricating a p-i-n type light emitting diode using p-type ZnO includes depositing a low-temperature ZnO buffer layer on a sapphire single-crystal substrate, depositing an n-type gallium doped ZnO layer on the deposited low-temperature ZnO buffer layer, depositing an intrinsic ZnO thin film on the deposited n-type gallium doped ZnO layer, forming a p-type ZnO thin film layer on the deposited intrinsic ZnO thin film, forming a MESA structure on the p-type ZnO thin film layer through wet etching to obtain a diode structure, and subjecting the diode structure to post-heat treatment.

Abstract translation: 使用p型ZnO制造pin型发光二极管的方法，特别是制造掺杂有铜的p型ZnO薄膜的技术，使用其制造的发光二极管及其在电磁场中的应用 设备。 使用p型ZnO制造pin型发光二极管的方法包括在蓝宝石单晶衬底上沉积低温ZnO缓冲层，在沉积的低温ZnO缓冲层上沉积n型掺杂镓的ZnO层 在沉积的n型镓掺杂ZnO层上沉积本征ZnO薄膜，在沉积的本征ZnO薄膜上形成p型ZnO薄膜层，通过湿法在p型ZnO薄膜层上形成MESA结构 蚀刻以获得二极管结构，并对二极管结构进行后热处理。

公开(公告)号：US07256101B2

公开(公告)日：2007-08-14

申请号：US10893596

申请日：2004-07-15

Applicant: Fabrice Letertre ,  Bruno Ghyselen ,  Olivier Rayssac

Inventor： Fabrice Letertre ,  Bruno Ghyselen ,  Olivier Rayssac

IPC: H01L21/30 ,  H01L21/46

CPC classification number: H01L21/76254 ,  H01L21/0445 ,  H01L21/187 ,  H01L21/7602 ,  H01L33/0012 ,  H01L33/0029

Abstract: Methods for preparing a semiconductor assembly are disclosed. In an implementation, the technique includes providing a support substrate and a bonding surface thereon, providing a donor substrate having a weakened zone that defines a useful layer and a bonding surface on the useful layer, and providing an interface layer of a predetermined material on the bonding surface of either the support substrate or the useful layer to provide a bonding surface thereon. The method also includes molecularly bonding the bonding surface of the interface layer to the bonding surface of the other of the support substrate or the useful layer to form a separable bonding interface therebetween, and to thus form the semiconductor assembly, and heat treating the semiconductor assembly to a temperature of at least 1000 to 1100° C. without substantially increasing molecular bonding between the bonding surface of the interface layer and the bonding surface of the other of the support substrate or the useful layer, so that the separable bonding interface maintains a sufficiently weak bond that can later be overcome by applying stresses to detach the useful layer from the donor substrate.

Abstract translation: 公开了制备半导体组件的方法。 在一个实施方案中，该技术包括在其上提供支撑衬底和结合表面，提供施主衬底，其具有限定可用层的弱化区和在有用层上的结合表面，以及在有用层上提供预定材料的界面层 粘合表面，以在其上提供粘合表面。 该方法还包括将界面层的结合表面分别结合到支撑衬底或有用层中的另一个的接合表面，以在其之间形成可分离的接合界面，从而形成半导体组件，并对半导体组件进行热处理 达到至少1000〜1100℃的温度，而不会在界面层的接合面与支撑基板或有用层的另一方的接合面之间基本上增加分子接合，使得可分离的接合界面保持足够的 弱键可以随后通过施加应力来克服有用层与施主衬底的分离。

公开(公告)号：US07180098B2

公开(公告)日：2007-02-20

申请号：US10817982

申请日：2004-04-05

Applicant: Chris Speyer ,  William E. Moore

Inventor： Chris Speyer ,  William E. Moore

IPC: H01L27/15

CPC classification number: H01L31/173 ,  H01L27/15 ,  H01L31/1055 ,  H01L31/107 ,  H01L31/1105 ,  H01L33/0012 ,  H01L33/0054 ,  H01L33/34

Abstract: The present invention is generally directed to an optical isolator device, and various methods of making same. In one illustrative embodiment, the method comprises obtaining a single SOI substrate, the SOI substrate having an active layer comprised of silicon and a buried insulation layer, forming a doped layer of silicon above the active layer of the SOI substrate, forming first and second isolated regions in at least the doped layer of silicon, forming a photon generating device in the first isolated region, and forming a photon receiving device in the second isolated region. In one illustrative embodiment, the device comprises a substrate comprised of a bulk layer of silicon, a buried insulation layer formed on the bulk silicon layer, and a doped layer of silicon positioned above the buried insulating layer, first and second isolated regions formed in the doped layer of silicon, a photon generating device formed in the first isolated region, and a photon receiving device formed in the second isolated region.

Abstract translation: 本发明一般涉及一种光隔离器装置及其制造方法。 在一个说明性实施例中，该方法包括获得单个SOI衬底，SOI衬底具有由硅构成的有源层和掩埋绝缘层，在SOI衬底的有源层上形成硅的掺杂层，形成第一和第二隔离层 至少在硅的掺杂层中的区域，在第一隔离区域中形成光子产生装置，并在第二隔离区域中形成光子接收装置。 在一个说明性实施例中，该器件包括由本体硅层构成的衬底，在体硅层上形成的掩埋绝缘层和位于掩埋绝缘层上方的硅的掺杂层，形成在第一和第二隔离区中的第一和第二隔离区 硅的掺杂层，形成在第一隔离区域中的光子产生装置，以及形成在第二隔离区域中的光子接收装置。

公开(公告)号：US07166485B1

公开(公告)日：2007-01-23

申请号：US11175797

申请日：2005-07-05

Applicant: Tingkai Li ,  Sheng Teng Hsu ,  Wei-Wei Zhuang

Inventor： Tingkai Li ,  Sheng Teng Hsu ,  Wei-Wei Zhuang

IPC: H01L21/00 ,  H01L29/06

CPC classification number: H01L33/34 ,  B82Y20/00 ,  H01L33/0012

Abstract: A superlattice nanocrystal Si—SiO2 electroluminescence (EL) device and fabrication method have been provided. The method comprises: providing a Si substrate; forming an initial SiO2 layer overlying the Si substrate; forming an initial polysilicon layer overlying the initial SiO2 layer; forming SiO2 layer overlying the initial polysilicon layer; repeating the polysilicon and SiO2 layer formation, forming a superlattice; doping the superlattice with a rare earth element; depositing an electrode overlying the doped superlattice; and, forming an EL device. In one aspect, the polysilicon layers are formed by using a chemical vapor deposition (CVD) process to deposit an amorphous silicon layer, and annealing. Alternately, a DC-sputtering process deposits each amorphous silicon layer, and following the forming of the superlattice, polysilicon is formed by annealing the amorphous silicon layers. Silicon dioxide can be formed by either thermal annealing or by deposition using a DC-sputtering process.

Abstract translation: 已经提供了超晶格纳米晶Si-SiO 2电致发光（EL）器件及其制造方法。 该方法包括：提供Si衬底; 形成覆盖Si衬底的初始SiO 2层; 形成覆盖初始SiO 2层的初始多晶硅层; 形成覆盖初始多晶硅层的SiO 2层; 重复多晶硅和SiO 2层形成，形成超晶格; 用稀土元素掺杂超晶格; 沉积覆盖掺杂超晶格的电极; 并且形成EL器件。 在一个方面，通过使用化学气相沉积（CVD）工艺沉积非晶硅层和退火来形成多晶硅层。 或者，DC溅射工艺沉积每个非晶硅层，并且在形成超晶格之后，通过退火非晶硅层形成多晶硅。 可以通过热退火或通过使用DC溅射工艺的沉积来形成二氧化硅。

公开(公告)号：US20070010037A1

公开(公告)日：2007-01-11

申请号：US11175797

申请日：2005-07-05

Applicant: Tingkai Li ,  Sheng Hsu ,  Wei-Wei Zhuang

Inventor： Tingkai Li ,  Sheng Hsu ,  Wei-Wei Zhuang

IPC: H01L21/00

CPC classification number: H01L33/34 ,  B82Y20/00 ,  H01L33/0012

Abstract: A superlattice nanocrystal Si—SiO2 electroluminescence (EL) device and fabrication method have been provided. The method comprises: providing a Si substrate; forming an initial SiO2 layer overlying the Si substrate; forming an initial polysilicon layer overlying the initial SiO2 layer; forming SiO2 layer overlying the initial polysilicon layer; repeating the polysilicon and SiO2 layer formation, forming a superlattice; doping the superlattice with a rare earth element; depositing an electrode overlying the doped superlattice; and, forming an EL device. In one aspect, the polysilicon layers are formed by using a chemical vapor deposition (CVD) process to deposit an amorphous silicon layer, and annealing. Alternately, a DC-sputtering process deposits each amorphous silicon layer, and following the forming of the superlattice, polysilicon is formed by annealing the amorphous silicon layers. Silicon dioxide can be formed by either thermal annealing or by deposition using a DC-sputtering process.

Abstract translation: 已经提供了超晶格纳米晶Si-SiO 2电致发光（EL）器件及其制造方法。 该方法包括：提供Si衬底; 形成覆盖Si衬底的初始SiO 2层; 形成覆盖初始SiO 2层的初始多晶硅层; 形成覆盖在初始多晶硅层上的SiO 2层; 重复多晶硅和SiO 2层形成，形成超晶格; 用稀土元素掺杂超晶格; 沉积覆盖掺杂超晶格的电极; 并且形成EL器件。 在一个方面，通过使用化学气相沉积（CVD）工艺沉积非晶硅层和退火来形成多晶硅层。 或者，DC溅射工艺沉积每个非晶硅层，并且在形成超晶格之后，通过退火非晶硅层形成多晶硅。 可以通过热退火或通过使用DC溅射工艺的沉积来形成二氧化硅。

公开(公告)号：US07119359B2

公开(公告)日：2006-10-10

申请号：US10728562

申请日：2003-12-05

Applicant: Robert R. Alfano ,  Shengkun Zhang ,  Wubao Wang

Inventor： Robert R. Alfano ,  Shengkun Zhang ,  Wubao Wang

IPC: H01L33/00 ,  H01L29/205 ,  H01L31/0304

CPC classification number: B82Y20/00 ,  B82Y10/00 ,  H01L31/035236 ,  H01L31/1035 ,  H01L33/0012 ,  H01L33/06

Abstract: The design and operation of a p-i-n device, operating in a sequential resonant tunneling condition for use as a photodetector and an optically pumped emitter, is disclosed. The device contains III-nitride multiple-quantum-well (MQW) layers grown between a III-nitride p-n junction. Transparent ohmic contacts are made on both p and n sides. The device operates under a certain electrical bias that makes the energy level of the first excitation state in each well layer correspond with the energy level of the ground state in the adjoining well layer. The device works as a high-efficiency and high-speed photodetector with photo-generated carriers transported through the active MQW region by sequential resonant tunneling. In a sequential resonant tunneling condition, the device also works as an optically pumped infrared emitter that emits infrared photons with energy equal to the energy difference between the first excitation state and the ground state in the MQWs.

公开(公告)号：US06445127B1

公开(公告)日：2002-09-03

申请号：US09250732

申请日：1999-02-16

Applicant: Yasunari Oku ,  Hidenori Kamei

Inventor： Yasunari Oku ,  Hidenori Kamei

IPC: H01J162

CPC classification number: H01L33/32 ,  H01L33/0012

Abstract: A gallium-nitride-group compound-semiconductor light-emitting device having an improved luminous intensity that makes it more suitable for use in the full-color outdoor display of an advanced performance. A gallium-nitride-group compound-semiconductor light-emitting device comprising an n-type layer 3, a light-emitting layer 4 and p-type layers 5, 6, the light-emitting layer 4 is doped with a p-type impurity, Mg for example, in a certain specific concentration, so a pn junction is formed within the light-emitting layer 4 and a light emission caused by the electron transition between conduction band and valence band is obtained. In a GaN group compound-semiconductor light-emitting device comprising at least an n-type clad layer 3, a p-type clad layer 5 and a light-emitting layer formed in between the clad layers 3, 5, stacked on a substrate 1. The light-emitting layer 4 is structured as a substance of stacked layers including an n-type layer 41 and a p-type layer 42, or these layers plus an i-type layer formed in between the layers 41 and 42, so a pn junction is formed within the light-emitting layer 4 itself. The injection of electrons and holes into the light-emitting layer 4 is expedited and the luminous intensity of the light-emitting layer 4 is increased.

Abstract translation: 具有改善的发光强度的氮化镓族化合物半导体发光器件，使其更适用于高级性能的全色室外显示器。 包含n型层3，发光层4和p型层5,6的氮化镓族化合物半导体发光器件，发光层4掺杂有p型杂质 ，例如Mg，在一定的浓度下，因此在发光层4内形成pn结，获得由导带和价带之间的电子跃迁引起的发光。 在包括至少n型覆盖层3，p型覆盖层5和形成在覆盖层3,5之间的发光层的GaN族化合物半导体发光器件中，层叠在基板1上 发光层4被构造为包括n型层41和p型层42的堆叠层的物质，或这些层加上形成在层41和42之间的i型层，因此 pn结形成在发光层4本身内。 电子和空穴注入发光层4的加速，并且发光层4的发光强度增加。

公开(公告)号：US06177690B1

公开(公告)日：2001-01-23

申请号：US09190436

申请日：1998-11-13

Applicant: Hiroyasu Noguchi ,  Eisaku Kato ,  Akira Ishibashi

Inventor： Hiroyasu Noguchi ,  Eisaku Kato ,  Akira Ishibashi

IPC: H01L3300

CPC classification number: B82Y20/00 ,  H01L33/0012 ,  H01S5/305 ,  H01S5/3086 ,  H01S5/347

Abstract: A semiconductor light emitting device having good characteristics, high reliability and long lifetime includes a p-n junction or p-i-n junction made by locating an active layer in a position inside an n-type doped layer or p-type doped layer sufficiently distant from the depletion layer between the p-type doped layer and the n-type doped layer. When a component of intensity of light from the active layer normal to the active layer is P(x), x for its maximum value Pmax is x=0, and the range of x satisfying P(x)>Pmax/e2 is −Ln −Ln is made lower than doping concentration of the other portion of the n-type doped layer, or doping concentration of at least a part of the p-type doped layer where x

Abstract translation: 具有良好特性，高可靠性和长寿命的半导体发光器件包括通过将有源层定位在n型掺杂层或p型掺杂层内的位于与耗尽层之间充分远的位置的pn结或pin结 p型掺杂层和n型掺杂层。 当来自有源层垂直于有源层的光的强度分量为P（x）时，其最大值Pmax的x为x = 0，满足P（x）> Pmax / e2的x的范围为-Ln 具有pn结的半导体发光器件中的 nn掺杂的至少一部分的掺杂浓度低于n型掺杂的另一部分的掺杂浓度 p型掺杂层的至少一部分的掺杂浓度，其中x