METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING A THIN FILM PROBE SHEET FOR USING THE SAME
    3.
    发明申请
    METHOD OF MANUFACTURING A SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE AND A METHOD OF MANUFACTURING A THIN FILM PROBE SHEET FOR USING THE SAME 有权
    制造半导体集成电路装置的方法和制造薄膜探针片的方法

    公开(公告)号:US20100279502A1

    公开(公告)日:2010-11-04

    申请号:US12836580

    申请日:2010-07-15

    IPC分类号: H01L21/768

    CPC分类号: G01R3/00 G01R1/07342

    摘要: A probe having a sufficient height is manufactured by selectively depositing, over the main surface of a wafer, a copper film in a region in which a metal film is to be formed and a region which will be outside an adhesion ring when a probe card is fabricated; forming the metal film, polyimide film, interconnect, another polyimide film, another interconnect and a further polyimide film; and then removing the wafer and copper film. According to the present invention, when probe testing is performed using a prober (thin film probe) having the probe formed in the above-described manner while utilizing the manufacturing technology of semiconductor integrated circuit devices, it is possible to prevent breakage of the prober and a wafer to be tested.

    摘要翻译: 通过选择性地在晶片的主表面上沉积在要形成金属膜的区域中的铜膜和当探针卡是在粘合环外部时将在粘合环外部的区域,制造具有足够高度的探针 制造的 形成金属膜,聚酰亚胺膜,互连,另一聚酰亚胺膜,另一互连和另外的聚酰亚胺膜; 然后取出晶片和铜膜。 根据本发明,在利用半导体集成电路器件的制造技术的情况下,使用具有以上述方式形成的探针的探测器(薄膜探针)进行探针测试时,可以防止探测器的破损, 待测试的晶圆。

    MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
    4.
    发明申请
    MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE 失效
    半导体集成电路器件的制造方法

    公开(公告)号:US20090130785A1

    公开(公告)日:2009-05-21

    申请号:US11719112

    申请日:2004-11-18

    IPC分类号: H01L21/66 G01R31/26

    CPC分类号: G01R1/0735 G01R3/00

    摘要: As the thickness of the card holder for preventing warping of a multilayered wiring substrate 1 is increased, there occurs a problem that a thin film sheet 2 is buried in a card holder and secure contact between probes 7 and test pads cannot be realized. For its prevention, the thin film sheet 2 and a bonding ring 6 are bonded in a state where a tensile force is applied only to the central region IA of the thin film sheet 2, and a tensile force is not applied to an outer peripheral region OA. Then, the height of the bonding ring 6 defining the height up to the probe surface of the thin film sheet 2 is increased, thereby increasing the height up to the probe surface of the thin film sheet 2.

    摘要翻译: 随着用于防止多层布线基板1翘曲的卡夹的厚度增加,存在薄膜片2被埋在卡夹中并且不能实现探针7和测试垫之间的牢固接触的​​问题。 为了防止,薄膜片2和接合环6在仅向薄膜片2的中心区域IA施加张力的状态下接合,并且拉伸力不施加到外围区域 OA。 然后,限定高达薄膜片2的探针表面的高度的接合环6的高度增加,从而增加高达薄膜片2的探针表面的高度。

    Manufacturing method of semiconductor integrated circuit device
    5.
    发明授权
    Manufacturing method of semiconductor integrated circuit device 失效
    半导体集成电路器件的制造方法

    公开(公告)号:US07534629B2

    公开(公告)日:2009-05-19

    申请号:US11448071

    申请日:2006-06-07

    IPC分类号: H01L21/66

    CPC分类号: G01R1/0735

    摘要: By using a membrane probe formed by using a manufacturing technique for semiconductor integrated circuit devices, the yield of probing collectively performed on a plurality of chips is to be enhanced. A probe card is formed by using a plurality of pushers, each pusher being formed of a POGO pin insulator, POGO pins, an FPC connector, a membrane probe HMS, an impact easing sheet, an impact easing plate, a chip condenser YRS and so on, wherein one or two POGO pins press a plurality of metal films arranged like islands. One or more cuts are made into what matches the chip to be tested in the area of the membrane probe in a direction substantially parallel to the extending direction of wiring electrically connected to probes formed in the membrane probe.

    摘要翻译: 通过使用通过使用半导体集成电路器件的制造技术形成的膜探针,将提高在多个芯片上共同执行的探测的产量。 通过使用多个推动器形成探针卡,每个推动器由POGO针绝缘体,POGO针,FPC连接器,膜探针HMS,冲击缓冲片,冲击缓冲板,芯片冷凝器YRS等形成 其中一个或两个POGO销按压布置成岛状的多个金属膜。 将一个或多个切口制成与膜探针区域中基本上平行于电连接到形成在膜探针中的探针的布线的延伸方向的方向匹配的待测芯片。

    Manufacturing method of semiconductor integrated circuit device and probe card
    6.
    发明授权
    Manufacturing method of semiconductor integrated circuit device and probe card 有权
    半导体集成电路器件和探针卡的制造方法

    公开(公告)号:US07517707B2

    公开(公告)日:2009-04-14

    申请号:US11783778

    申请日:2007-04-12

    IPC分类号: H01L31/26

    CPC分类号: G01R3/00 G01R1/07307

    摘要: Electrical testing is to be performed on a semiconductor integrated circuit device which the test pads formed. To facilitate such testing, the method of manufacture of the semiconductor integrated circuit device employs a probe card which has two or more contact terminals which can contact two or more electrodes. This probe card includes, in opposition to a wiring substrate of the semiconductor integrated circuit device in which a first wiring is formed, a first sheet having two or more contact terminals to contact the two or more electrodes; a second wiring electrically connected to the two or more contact terminals and the first wiring; and first dummy wirings which are near the region of formation of the two or more contact terminals, are arranged to a non-forming region of the second wiring, and do not participate in signal transfer.

    摘要翻译: 电测试将在形成测试焊盘的半导体集成电路器件上进行。 为了便于这种测试,半导体集成电路器件的制造方法采用具有两个或更多个能够接触两个或更多个电极的接触端子的探针卡。 该探针卡与形成有第一布线的半导体集成电路器件的布线基板相对应,具有接触两个以上的电极的两个以上的接触端子的第一片; 电连接到所述两个或更多个接触端子和所述第一布线的第二布线; 并且在两个或多个接触端子的形成区域附近的第一虚拟布线被布置到第二布线的非形成区域,并且不参与信号传递。

    Manufacturing method of semiconductor integrated circuit device and probe card
    7.
    发明申请
    Manufacturing method of semiconductor integrated circuit device and probe card 有权
    半导体集成电路器件和探针卡的制造方法

    公开(公告)号:US20070190671A1

    公开(公告)日:2007-08-16

    申请号:US11783778

    申请日:2007-04-12

    IPC分类号: H01L21/66

    CPC分类号: G01R3/00 G01R1/07307

    摘要: Electrical testing is to be performed on a semiconductor integrated circuit device which the test pads formed. To facilitate such testing, the method of manufacture of the semiconductor integrated circuit device employs a probe card which has two or more contact terminals which can contact two or more electrodes. This probe card includes, in opposition to a wiring substrate of the semiconductor integrated circuit device in which a first wiring is formed, a first sheet having two or more contact terminals to contact the two or more electrodes; a second wiring electrically connected to the two or more contact terminals and the first wiring; and first dummy wirings which are near the region of formation of the two or more contact terminals, are arranged to a non-forming region of the second wiring, and do not participate in signal transfer.

    摘要翻译: 电测试将在形成测试焊盘的半导体集成电路器件上进行。 为了便于这种测试,半导体集成电路器件的制造方法采用具有两个或更多个能够接触两个或更多个电极的接触端子的探针卡。 该探针卡与形成有第一布线的半导体集成电路器件的布线基板相对应,具有接触两个以上的电极的两个以上的接触端子的第一片; 电连接到所述两个或更多个接触端子和所述第一布线的第二布线; 并且在两个或多个接触端子的形成区域附近的第一虚拟布线被布置到第二布线的非形成区域,并且不参与信号传递。

    Manufacturing method of semiconductor integrated circuit device
    9.
    发明申请
    Manufacturing method of semiconductor integrated circuit device 有权
    半导体集成电路器件的制造方法

    公开(公告)号:US20060286715A1

    公开(公告)日:2006-12-21

    申请号:US11471712

    申请日:2006-06-21

    IPC分类号: H01L21/00

    摘要: During probe testing using a prober having probe needles formed by using a manufacturing technology for a semiconductor integrated circuit device, reliable contact is ensured between the probe needles and test pads. A pressing tool having at least one hole portion formed therein and extending therethrough between the main and back surface thereof is prepared. An elastomer in the form of a sheet and a polyimide sheet are successively disposed on the main surface of the pressing tool. With th elastomer and the polyimide sheet being electrostatically attracted to the pressing tool, the pressing tool is disposed on a thin-film sheet such that the main surface thereof faces the back surface (the surface opposite to the main surface thereof formed with the probe) of the thin-film sheet. Then, the thin-film sheet with the pressing tool bonded thereto is attached to a probe card.

    摘要翻译: 在使用具有通过使用用于半导体集成电路器件的制造技术形成的探针的探针的探针测试期间,确保探针和测试垫之间的可靠接触。 制备具有形成在其中并在其主表面和后表面之间延伸穿过其中的至少一个孔部分的按压工具。 在压制工具的主表面上依次设置片状和聚酰亚胺片形式的弹性体。 利用弹性体,将聚酰亚胺片静电吸引到按压工具上,将压制工具设置在薄膜片上,使得其主表面面向背面(与形成有探针的主表面相反的表面) 的薄膜片。 然后,将与其接合的按压工具的薄膜片安装在探针卡上。

    Thin film probe sheet and semiconductor chip inspection system
    10.
    发明申请
    Thin film probe sheet and semiconductor chip inspection system 审中-公开
    薄膜探针片和半导体芯片检测系统

    公开(公告)号:US20060094162A1

    公开(公告)日:2006-05-04

    申请号:US11253575

    申请日:2005-10-20

    IPC分类号: H01L21/50

    CPC分类号: G01R1/0735 Y10T29/49156

    摘要: In the highly accurate thin film probe sheet which is used for the contact to electrode pads disposed in high density with narrow pitches resulting from the increase in integration degree of semiconductor chips and for the inspection of semiconductor chips, a large spatial region in which a metal film selectively removable relative to terminal metal is formed in advance is formed in the peripheral region around minute contact terminals having sharp tips and disposed in high density with narrow pitches equivalent to those of the electrode pads. Thus, occurrence of damage in an inspection process is significantly reduced, and an inspection device simultaneously achieving the miniaturization and the durability can be provided.

    摘要翻译: 在用于与由半导体芯片的集成度增加和半导体芯片的检查而产生的窄间距高密度设置的电极焊盘接触的高精度薄膜探针片中,其中金属 在具有尖锐尖端的微小接触端子周围的周边区域中预先形成相对于端子金属可选择的膜,并以与电极焊盘相同的窄间距高密度地设置。 因此,检查过程中的损坏的发生显着减少,并且可以提供同时实现小型化和耐久性的检查装置。