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1.
公开(公告)号:US20140048904A1
公开(公告)日:2014-02-20
申请号:US13589717
申请日:2012-08-20
IPC分类号: H01L29/06 , H01L23/48 , H01L29/66 , H01L21/762 , H01L21/02
CPC分类号: H01L27/0694 , H01L21/02 , H01L21/743 , H01L21/762 , H01L21/76224 , H01L21/823418 , H01L21/823475 , H01L23/48 , H01L27/0629 , H01L29/06 , H01L29/0657 , H01L29/407 , H01L29/417 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/456 , H01L29/66477 , H01L29/66727 , H01L29/66734 , H01L29/78 , H01L29/7803 , H01L29/7813 , H01L29/7827 , H01L29/7845 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要: One embodiment of a semiconductor device includes a semiconductor body with a first side and a second side opposite to the first side. The semiconductor device further includes a first contact trench extending into the semiconductor body at the first side. The first contact trench includes a first conductive material electrically coupled to the semiconductor body adjoining the first contact trench. The semiconductor further includes a second contact trench extending into the semiconductor body at the second side. The second contact trench includes a second conductive material electrically coupled to the semiconductor body adjoining the second contact trench.
摘要翻译: 半导体器件的一个实施例包括具有第一侧和与第一侧相对的第二侧的半导体本体。 半导体器件还包括在第一侧延伸到半导体本体中的第一接触沟槽。 第一接触沟槽包括电耦合到邻接第一接触沟槽的半导体本体的第一导电材料。 半导体还包括在第二侧延伸到半导体本体中的第二接触沟槽。 第二接触沟槽包括电耦合到邻接第二接触沟槽的半导体本体的第二导电材料。
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公开(公告)号:US09281359B2
公开(公告)日:2016-03-08
申请号:US13589717
申请日:2012-08-20
IPC分类号: H01L29/66 , H01L29/06 , H01L21/762 , H01L21/02 , H01L23/48 , H01L27/06 , H01L29/417 , H01L29/78 , H01L21/74 , H01L29/861 , H01L21/8234 , H01L29/40 , H01L29/45
CPC分类号: H01L27/0694 , H01L21/02 , H01L21/743 , H01L21/762 , H01L21/76224 , H01L21/823418 , H01L21/823475 , H01L23/48 , H01L27/0629 , H01L29/06 , H01L29/0657 , H01L29/407 , H01L29/417 , H01L29/41741 , H01L29/41766 , H01L29/4236 , H01L29/456 , H01L29/66477 , H01L29/66727 , H01L29/66734 , H01L29/78 , H01L29/7803 , H01L29/7813 , H01L29/7827 , H01L29/7845 , H01L29/861 , H01L2924/0002 , H01L2924/00
摘要: One embodiment of a semiconductor device includes a semiconductor body with a first side and a second side opposite to the first side. The semiconductor device further includes a first contact trench extending into the semiconductor body at the first side. The first contact trench includes a first conductive material electrically coupled to the semiconductor body adjoining the first contact trench. The semiconductor further includes a second contact trench extending into the semiconductor body at the second side. The second contact trench includes a second conductive material electrically coupled to the semiconductor body adjoining the second contact trench.
摘要翻译: 半导体器件的一个实施例包括具有第一侧和与第一侧相对的第二侧的半导体本体。 半导体器件还包括在第一侧延伸到半导体本体中的第一接触沟槽。 第一接触沟槽包括电耦合到邻接第一接触沟槽的半导体本体的第一导电材料。 半导体还包括在第二侧延伸到半导体本体中的第二接触沟槽。 第二接触沟槽包括电耦合到邻接第二接触沟槽的半导体本体的第二导电材料。
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公开(公告)号:US20140073123A1
公开(公告)日:2014-03-13
申请号:US13614076
申请日:2012-09-13
申请人: Andreas Meiser , Markus Zundel
发明人: Andreas Meiser , Markus Zundel
IPC分类号: H01L21/768 , H01L21/28
CPC分类号: H01L29/7813 , H01L21/28008 , H01L21/28229 , H01L21/743 , H01L21/76877 , H01L21/76898 , H01L23/481 , H01L29/1095 , H01L29/401 , H01L29/407 , H01L29/4236 , H01L29/4916 , H01L29/495 , H01L29/51 , H01L29/66734 , H01L29/7827 , H01L2924/0002 , H01L2924/00
摘要: Disclosed is a method for producing a controllable semiconductor component. In a semiconductor body with a top side and a bottom side, a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body are formed in a common etching process. The first trench has a first width and the second trench has a second width greater than the first width. Then, in a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. Subsequently, the oxide layer is removed from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.
摘要翻译: 公开了一种制造可控半导体部件的方法。 在具有顶侧和底侧的半导体本体中,在公共蚀刻工艺中形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。 第一沟槽具有第一宽度,第二沟槽具有大于第一宽度的第二宽度。 然后,在共同的工艺中,在第一沟槽和第二沟槽中形成氧化物层,使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘。 随后,完全或至少部分地从第一沟槽去除氧化物层,使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。
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4.
公开(公告)号:US09076805B2
公开(公告)日:2015-07-07
申请号:US13549463
申请日:2012-07-14
申请人: Steffen Thiele , Andreas Meiser , Markus Zundel
发明人: Steffen Thiele , Andreas Meiser , Markus Zundel
IPC分类号: H01L29/78 , H01L23/58 , H01L29/417 , H03K17/082 , H01L27/12 , G01R19/00
CPC分类号: H01L29/7815 , G01R19/0092 , H01L23/58 , H01L27/124 , H01L29/41741 , H01L29/41766 , H01L29/7813 , H01L2924/0002 , H03K17/0822 , H03K2217/0027 , H01L2924/00
摘要: A semiconductor device a field of transistor cells integrated in a semiconductor body. A number of the transistor cells forming a power transistor and at least one of the transistor cells forming a sense transistor. A first source electrode is arranged on the semiconductor body electrically connected to the transistor cell(s) of the sense transistor but electrically isolated from the transistor cells of the power transistor. A second source electrode is arranged on the semiconductor body and covers the transistor cells of both the power transistor and the sense transistor, and at least partially covering the first source electrode in such a manner that the second source electrode is electrically connected only to the transistor cells of the power transistor but electrically isolated from the transistor cells of the sense transistor.
摘要翻译: 一种半导体器件,集成在半导体本体中的晶体管单元的场。 形成功率晶体管的多个晶体管单元和形成感测晶体管的至少一个晶体管单元。 第一源电极布置在电连接到感测晶体管的晶体管单元的半导体本体上,但与功率晶体管的晶体管单元电隔离。 第二源电极布置在半导体本体上并覆盖功率晶体管和感测晶体管的晶体管单元,并且至少部分地覆盖第一源电极,使得第二源电极仅电连接到晶体管 功率晶体管的单元,但与感测晶体管的晶体管单元电隔离。
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公开(公告)号:US09059256B2
公开(公告)日:2015-06-16
申请号:US13614076
申请日:2012-09-13
申请人: Andreas Meiser , Markus Zundel
发明人: Andreas Meiser , Markus Zundel
IPC分类号: H01L21/8242 , H01L21/336 , H01L21/76 , H01L21/311 , H01L21/768 , H01L21/28 , H01L23/48 , H01L21/74 , H01L29/40 , H01L29/423 , H01L29/78
CPC分类号: H01L29/7813 , H01L21/28008 , H01L21/28229 , H01L21/743 , H01L21/76877 , H01L21/76898 , H01L23/481 , H01L29/1095 , H01L29/401 , H01L29/407 , H01L29/4236 , H01L29/4916 , H01L29/495 , H01L29/51 , H01L29/66734 , H01L29/7827 , H01L2924/0002 , H01L2924/00
摘要: Disclosed is a method for producing a controllable semiconductor component. In a semiconductor body with a top side and a bottom side, a first trench protruding from the top side into the semiconductor body and a second trench protruding from the top side into the semiconductor body are formed in a common etching process. The first trench has a first width and the second trench has a second width greater than the first width. Then, in a common process, an oxide layer is formed in the first trench and in the second trench such that the oxide layer fills the first trench and electrically insulates a surface of the second trench. Subsequently, the oxide layer is removed from the first trench completely or at least partly such that the semiconductor body comprises an exposed first surface area arranged in the first trench.
摘要翻译: 公开了一种制造可控半导体部件的方法。 在具有顶侧和底侧的半导体本体中,在公共蚀刻工艺中形成从顶侧突出到半导体本体的第一沟槽和从顶侧突出到半导体本体中的第二沟槽。 第一沟槽具有第一宽度,第二沟槽具有大于第一宽度的第二宽度。 然后,在共同的工艺中,在第一沟槽和第二沟槽中形成氧化物层,使得氧化物层填充第一沟槽并使第二沟槽的表面电绝缘。 随后,完全或至少部分地从第一沟槽去除氧化物层,使得半导体主体包括布置在第一沟槽中的暴露的第一表面区域。
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公开(公告)号:US20060071276A1
公开(公告)日:2006-04-06
申请号:US11230705
申请日:2005-09-20
申请人: Markus Zundel , Norbert Krischke , Thorsten Meyer
发明人: Markus Zundel , Norbert Krischke , Thorsten Meyer
IPC分类号: H01L23/62
CPC分类号: H01L29/7808 , H01L27/0255 , H01L29/0696 , H01L29/7813 , H01L29/866
摘要: One embodiment of the invention relates to a field effect trench transistor with a multiplicity of transistor cells that are arranged like an array and whose gate electrodes are arranged in active trenches formed in a semiconductor body. Inactive trenches are arranged in the array of the transistor cells, there being no gate electrodes situated in said inactive trenches, and a series of polysilicon diodes are integrated in one or more of the inactive trenches which diodes, for protection against damage to the gate oxide through ESD pulses, are contact-connected to a source metallization at one of their ends and to a gate metallization at their other end, and/or alternatively or additionally one or more polysilicon zener diodes connected in series is or are integrated in the inactive trench or trenches and contact-connected to the gate metallization by one of its or their ends and to drain potential by its or their other end.
摘要翻译: 本发明的一个实施例涉及具有多个晶体管单元的场效应沟槽晶体管,其排列成阵列并且其栅电极被布置在形成于半导体本体中的有源沟槽中。 在晶体管单元的阵列中布置非活性沟槽,不存在位于所述非活性沟槽中的栅电极,并且一系列多晶硅二极管集成在一个或多个非活性沟槽中,这些二极管用于防止对栅极氧化物的损伤 通过ESD脉冲,在它们的一端处的源极金属化和其另一端的栅极金属化接触连接,和/或可选地或另外地一个或多个串联连接的多晶硅齐纳二极管被集成在非活性沟槽中 或沟槽,并且通过其端点之一与栅极金属化接触连接,并通过其或其另一端漏极电位。
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公开(公告)号:US08772861B2
公开(公告)日:2014-07-08
申请号:US11230705
申请日:2005-09-20
申请人: Markus Zundel , Norbert Krischke , Thorsten Meyer
发明人: Markus Zundel , Norbert Krischke , Thorsten Meyer
IPC分类号: H01L29/66
CPC分类号: H01L29/7808 , H01L27/0255 , H01L29/0696 , H01L29/7813 , H01L29/866
摘要: One embodiment of the invention relates to a field effect trench transistor with a multiplicity of transistor cells that are arranged like an array and whose gate electrodes are arranged in active trenches formed in a semiconductor body. Inactive trenches are arranged in the array of the transistor cells, there being no gate electrodes situated in said inactive trenches, and a series of polysilicon diodes are integrated in one or more of the inactive trenches which diodes, for protection against damage to the gate oxide through ESD pulses, are contact-connected to a source metallization at one of their ends and to a gate metallization at their other end, and/or alternatively or additionally one or more polysilicon zener diodes connected in series is or are integrated in the inactive trench or trenches and contact-connected to the gate metallization by one of its or their ends and to drain potential by its or their other end.
摘要翻译: 本发明的一个实施例涉及具有多个晶体管单元的场效应沟槽晶体管,其排列成阵列并且其栅电极被布置在形成于半导体本体中的有源沟槽中。 在晶体管单元的阵列中布置非活性沟槽,不存在位于所述非活性沟槽中的栅电极,并且一系列多晶硅二极管集成在一个或多个非活性沟槽中,这些二极管用于防止对栅极氧化物的损伤 通过ESD脉冲,在它们的一端处的源极金属化和其另一端的栅极金属化接触连接,和/或可选地或另外地一个或多个串联连接的多晶硅齐纳二极管被集成在非活性沟槽中 或沟槽,并且通过其端点之一与栅极金属化接触连接,并通过其或其另一端漏极电位。
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公开(公告)号:US20060071700A1
公开(公告)日:2006-04-06
申请号:US11240853
申请日:2005-09-30
申请人: Thorsten Meyer , Norbert Krischke , Markus Zundel
发明人: Thorsten Meyer , Norbert Krischke , Markus Zundel
IPC分类号: H01L35/00
CPC分类号: H01L23/34 , G01K7/01 , H01L27/0705 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要: A semiconductor device is disclosed. In one embodiment the semiconductor device includes a semiconductor body of which is integrated a temperature sensor for measuring the temperature prevailing in the semiconductor body. The temperature sensor has a MOS transistor and a bipolar transistor. The MOS transistor is integrated into the semiconductor body nd configured such that the substhreshold current intensity of the MOS transistor is proportional to the temperature to be measured. The subthreshold current of the MOS transistor is amplified by the bipolar transistor.
摘要翻译: 公开了一种半导体器件。 在一个实施例中,半导体器件包括半导体本体,其集成有用于测量半导体主体中的温度的温度传感器。 温度传感器具有MOS晶体管和双极晶体管。 MOS晶体管被集成到半导体主体nd中,其被配置为使得MOS晶体管的阈值电流强度与要测量的温度成比例。 MOS晶体管的亚阈值电流由双极晶体管放大。
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公开(公告)号:US20080088355A1
公开(公告)日:2008-04-17
申请号:US11870750
申请日:2007-10-11
IPC分类号: H03K17/687
CPC分类号: H01L29/7815 , H01L29/0653 , H01L29/0696 , H01L29/407 , H01L29/42368 , H01L29/7811 , H01L29/7813 , H03K17/18 , H03K17/687
摘要: An integrated circuit including a semiconductor device is disclosed. One embodiment provides a load current component, having a multiplicity of trenches in a cell array. A sensor component is integrated into the cell array of the load current component and has a sensor cell array, the area of which is smaller than the area of the cell array of the load current component by a specific factor. The trenches forming the cell array of the sensor component correspond to the trenches of the cell array of the load current component, configured such that the trenches of the sensor component at the at least one side merge uniformly into the trenches of the cell array of the load current component without interruptions or disturbances of the trench geometry.
摘要翻译: 公开了一种包括半导体器件的集成电路。 一个实施例提供负载电流分量,其具有单元阵列中的多个沟槽。 传感器组件被集成到负载电流分量的单元阵列中,并且具有传感器单元阵列,其区域小于负载电流分量的单元阵列的面积的特定因子。 形成传感器组件的单元阵列的沟槽对应于负载电流分量的单元阵列的沟槽,其被配置为使得至少一侧的传感器组件的沟槽均匀地合并到单元阵列的沟槽中 负载电流分量,不影响沟槽几何形状的干扰或干扰。
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公开(公告)号:US07307328B2
公开(公告)日:2007-12-11
申请号:US11240853
申请日:2005-09-30
申请人: Thorsten Meyer , Norbert Krischke , Markus Zundel
发明人: Thorsten Meyer , Norbert Krischke , Markus Zundel
IPC分类号: H01L31/04
CPC分类号: H01L23/34 , G01K7/01 , H01L27/0705 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要: A semiconductor device is disclosed. In one embodiment the semiconductor device includes a semiconductor body of which is integrated a temperature sensor for measuring the temperature prevailing in the semiconductor body. The temperature sensor has a MOS transistor and a bipolar transistor. The MOS transistor is integrated into the semiconductor body nd configured such that the substhreshold current intensity of the MOS transistor is proportional to the temperature to be measured. The subthreshold current of the MOS transistor is amplified by the bipolar transistor.
摘要翻译: 公开了一种半导体器件。 在一个实施例中,半导体器件包括半导体本体,其集成有用于测量半导体主体中的温度的温度传感器。 温度传感器具有MOS晶体管和双极晶体管。 MOS晶体管被集成到半导体主体nd中,其被配置为使得MOS晶体管的阈值电流强度与要测量的温度成比例。 MOS晶体管的亚阈值电流由双极晶体管放大。
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