Method For Filling Of Nanoscale Holes And Trenches And For Planarizing Of A Wafer Surface
    4.
    发明申请
    Method For Filling Of Nanoscale Holes And Trenches And For Planarizing Of A Wafer Surface 有权
    填充纳米孔和沟槽以及平面化晶圆表面的方法

    公开(公告)号:US20070082457A1

    公开(公告)日:2007-04-12

    申请号:US11533323

    申请日:2006-09-19

    IPC分类号: H01L21/76

    摘要: A processing method for use in the fabrication of fabrication of nanoscale electronic, optical, magnetic, biological, and fluidic devices and structures, for filling nanoscale holes and trenches, for planarizing a wafer surface, or for achieving both filling and planarizing of a wafer surface simultaneously. The method has the initial step of depositing a layer of a meltable material on a wafer surface. The material is then pressed using a transparent mold while shining a light pulse through the transparent mold to melt the deposited layer of meltable material. A flow of the molten layer material fills the holes and trenches, and conforms to surface features on the transparent mold. The transparent mold is subsequently removed.

    摘要翻译: 一种用于制造纳米尺度电子,光学,磁性,生物和流体装置和结构的处理方法,用于填充纳米尺度的孔和沟槽,用于平坦化晶片表面,或用于实现晶片表面的填充和平面化 同时。 该方法具有在晶片表面上沉积可熔材料层的初始步骤。 然后使用透明模具压制材料,同时通过透明模具照射光脉冲以熔化可熔化材料的沉积层。 熔融层材料的流动填充孔和沟槽,并符合透明模具上的表面特征。 随后去除透明模具。

    Method for filling of nanoscale holes and trenches and for planarizing of a wafer surface
    5.
    发明授权
    Method for filling of nanoscale holes and trenches and for planarizing of a wafer surface 有权
    用于填充纳米级孔和沟槽以及用于平坦化晶片表面的方法

    公开(公告)号:US07510946B2

    公开(公告)日:2009-03-31

    申请号:US11533323

    申请日:2006-09-19

    IPC分类号: H01L21/3105

    摘要: A processing method for use in the fabrication of fabrication of nanoscale electronic, optical, magnetic, biological, and fluidic devices and structures, for filling nanoscale holes and trenches, for planarizing a wafer surface, or for achieving both filling and planarizing of a wafer surface simultaneously. The method has the initial step of depositing a layer of a meltable material on a wafer surface. The material is then pressed using a transparent mold while shining a light pulse through the transparent mold to melt the deposited layer of meltable material. A flow of the molten layer material fills the holes and trenches, and conforms to surface features on the transparent mold. The transparent mold is subsequently removed.

    摘要翻译: 一种用于制造纳米尺度电子,光学,磁性,生物和流体装置和结构的处理方法,用于填充纳米尺度的孔和沟槽,用于平坦化晶片表面,或用于实现晶片表面的填充和平面化 同时。 该方法具有在晶片表面上沉积可熔材料层的初始步骤。 然后使用透明模具压制材料,同时通过透明模具照射光脉冲以熔化可熔化材料的沉积层。 熔融层材料的流动填充孔和沟槽,并符合透明模具上的表面特征。 随后去除透明模具。

    Method of fabricating nano-scale structures and nano-scale structures fabricated using the method
    7.
    发明授权
    Method of fabricating nano-scale structures and nano-scale structures fabricated using the method 有权
    使用该方法制造纳米尺度结构和纳米尺度结构的方法

    公开(公告)号:US09522821B2

    公开(公告)日:2016-12-20

    申请号:US14785338

    申请日:2014-04-09

    摘要: The invention provides a fabrication method of batch producing nano-scale structures, such as arrays of silicon pillars of high aspect ratio. The invention also relates to providing arrays of high aspect ratio silicon pillars fabricated using the improved fabrication method. The array of silicon pillars is fabricated from arrays of low aspect ratio pyramid-shaped structures. Mask formed from a hard material, such as a metal mask, is formed on top of each of the pyramid-shaped structures in a batch process. The pyramid-shaped structures are subsequently etched to remove substrate materials not protected by the hard masks, so that a high aspect ratio pillar or shaft is formed on the pyramid-shaped low aspect ratio base, resulting in an array of high aspect ratio silicon pillars.

    摘要翻译: 本发明提供了批量生产纳米级结构的制造方法,例如高纵横比的硅柱阵列。 本发明还涉及使用改进的制造方法制造的高纵横比硅柱阵列。 硅柱阵列由低纵横比金字塔形结构的阵列制成。 由金属掩模等硬质材料形成的掩模在分批处理中形成在每个金字塔形结构的顶部上。 金字塔形结构随后被蚀刻以除去未被硬掩模保护的衬底材料,从而在金字塔形的低纵横比基底上形成高纵横比的柱或轴,从而形成高纵横比硅柱的阵列 。

    METHOD OF FABRICATING NANO-SCALE STRUCTURES AND NANO-SCALE STRUCTURES FABRICATED USING THE METHOD
    8.
    发明申请
    METHOD OF FABRICATING NANO-SCALE STRUCTURES AND NANO-SCALE STRUCTURES FABRICATED USING THE METHOD 审中-公开
    使用该方法制作纳米尺度结构和纳米尺度结构的方法

    公开(公告)号:US20160068384A1

    公开(公告)日:2016-03-10

    申请号:US14785338

    申请日:2014-04-09

    IPC分类号: B81C1/00 B81B1/00

    摘要: The invention provides a fabrication method of batch producing nano-scale structures, such as arrays of silicon pillars of high aspect ratio. The invention also relates to providing arrays of high aspect ratio silicon pillars fabricated using the improved fabrication method. The array of silicon pillars is fabricated from arrays of low aspect ratio pyramid-shaped structures. Mask formed from a hard material, such as a metal mask, is formed on top of each of the pyramid-shaped structures in a batch process. The pyramid-shaped structures are subsequently etched to remove substrate materials not protected by the hard masks, so that a high aspect ratio pillar or shaft is formed on the pyramid-shaped low aspect ratio base, resulting in an array of high aspect ratio silicon pillars.

    摘要翻译: 本发明提供了批量生产纳米级结构的制造方法,例如高纵横比的硅柱阵列。 本发明还涉及使用改进的制造方法制造的高纵横比硅柱阵列。 硅柱阵列由低纵横比金字塔形结构的阵列制成。 由金属掩模等硬质材料形成的掩模在分批处理中形成在每个金字塔形结构的顶部上。 金字塔形结构随后被蚀刻以除去未被硬掩模保护的衬底材料,从而在金字塔形的低纵横比基底上形成高纵横比的柱或轴,导致高纵横比硅柱的阵列 。