Method of manufacturing semiconductor device
    1.
    发明申请
    Method of manufacturing semiconductor device 审中-公开
    制造半导体器件的方法

    公开(公告)号:US20070123035A1

    公开(公告)日:2007-05-31

    申请号:US11358715

    申请日:2006-02-22

    IPC分类号: H01L21/4763 H01L21/473

    CPC分类号: H01L21/76829 H01L21/76808

    摘要: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

    摘要翻译: 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤,使用SiH 4气体和CO 2通过CVD形成氧化硅膜的步骤 层间绝缘膜上的气体,形成化学放大抗蚀剂膜以覆盖氧化硅膜的步骤,以及在化学放大型抗蚀剂膜上形成第一开口的步骤,其中垂直布线部分为 要形成

    Method of manufacturing semiconductor device
    2.
    发明申请
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US20080305645A1

    公开(公告)日:2008-12-11

    申请号:US12219271

    申请日:2008-07-18

    IPC分类号: H01L21/302

    CPC分类号: H01L21/76829 H01L21/76808

    摘要: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

    摘要翻译: 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤,通过在层间绝缘膜上使用SiH 4气体和CO 2气体通过CVD形成氧化硅膜的步骤,形成 化学放大抗蚀剂膜覆盖氧化硅膜,以及在要形成垂直布线部分的化学放大抗蚀剂膜上的位置形成第一开口的步骤。

    Method of manufacturing semiconductor device
    3.
    发明授权
    Method of manufacturing semiconductor device 有权
    制造半导体器件的方法

    公开(公告)号:US07749897B2

    公开(公告)日:2010-07-06

    申请号:US12219271

    申请日:2008-07-18

    IPC分类号: H01L21/4763

    CPC分类号: H01L21/76829 H01L21/76808

    摘要: A method of manufacturing a semiconductor device comprising a wiring structure that includes a vertical wiring section is disclosed. The method comprises a step of forming an interlayer insulation film made of a low dielectric constant material on a wiring layer, a step of forming a silicon oxide film by CVD using SiH4 gas and CO2 gas on the interlayer insulation film, a step of forming a chemically amplified resist film to cover the silicon oxide film, and a step of forming a first opening in a position on the chemically amplified resist film where the vertical wiring section is to be formed.

    摘要翻译: 公开了一种制造包括垂直布线部分的布线结构的半导体器件的方法。 该方法包括在布线层上形成由低介电常数材料制成的层间绝缘膜的步骤,通过在层间绝缘膜上使用SiH 4气体和CO 2气体通过CVD形成氧化硅膜的步骤,形成 化学放大抗蚀剂膜覆盖氧化硅膜,以及在要形成垂直布线部分的化学放大抗蚀剂膜上的位置形成第一开口的步骤。

    Wiring board, production process thereof and connection method using same
    5.
    发明申请
    Wiring board, production process thereof and connection method using same 审中-公开
    接线板及其生产工艺及其连接方法

    公开(公告)号:US20070246158A1

    公开(公告)日:2007-10-25

    申请号:US11408373

    申请日:2006-04-21

    IPC分类号: B32B3/00

    摘要: The present invention provides a wiring board capable of realizing electrical connectivity even with connection leads having a fine pitch of 100 μm or less. The present invention relates to a wiring board with adhesive film comprising: a wiring board, in which the surface of a connection terminal portion on the end of a connection lead on the wiring board has a non-flat shape formed by a plating method; and, an adhesive film that covers the surface of the connection terminal portion and contains either a thermoplastic resin or a thermoplastic, thermosetting resin.

    摘要翻译: 本发明提供一种能够实现电连接性的布线板,即使是具有100μm以下的细间距的连接引线。 本发明涉及一种具有粘合膜的布线板,包括:布线板,其中布线板上的连接引线端部上的连接端子部分的表面具有通过镀覆方法形成的非平坦形状; 以及覆盖连接端子部的表面并且包含热塑性树脂或热塑性热固性树脂的粘合膜。

    Semiconductor device having reinforced low-k insulating film and its manufacture method
    7.
    发明授权
    Semiconductor device having reinforced low-k insulating film and its manufacture method 有权
    具有加强低k绝缘膜的半导体器件及其制造方法

    公开(公告)号:US08772182B2

    公开(公告)日:2014-07-08

    申请号:US12774302

    申请日:2010-05-05

    申请人: Yoshiyuki Ohkura

    发明人: Yoshiyuki Ohkura

    IPC分类号: H01L21/00

    摘要: A semiconductor device manufacture method has the steps of: (a) coating a low dielectric constant low-level insulating film above a semiconductor substrate formed with a plurality of semiconductor elements; (b) processing the low-level insulating film to increase a mechanical strength of the low-level insulating film; (c) coating a low dielectric constant high-level insulating film above the low-level insulating film; and (d) forming a buried wiring including a wiring pattern in the high-level insulating film and a via conductor in the low-level insulating film. The low-level insulating film and high-level insulating film are made from the same material. The process of increasing the mechanical strength includes an ultraviolet ray irradiation process or a hydrogen plasma applying process.

    摘要翻译: 半导体器件制造方法的步骤为:(a)在形成有多个半导体元件的半导体衬底上涂覆低介电常数低电平绝缘膜; (b)处理低级绝缘膜以增加低级绝缘膜的机械强度; (c)在低级绝缘膜之上涂覆低介电常数高级绝缘膜; 以及(d)在高级绝缘膜中形成包括布线图案的掩埋布线和低级绝缘膜中的通路导体。 低级绝缘膜和高级绝缘膜由相同的材料制成。 增加机械强度的过程包括紫外线照射过程或氢等离子体施加过程。