Structural analysis program, a structural analysis method, a structural analysis apparatus, and a production process of a semiconductor integrated circuit
    5.
    发明授权
    Structural analysis program, a structural analysis method, a structural analysis apparatus, and a production process of a semiconductor integrated circuit 有权
    结构分析程序,结构分析方法,结构分析装置和半导体集成电路的制造工艺

    公开(公告)号:US07483818B2

    公开(公告)日:2009-01-27

    申请号:US10157926

    申请日:2002-05-31

    IPC分类号: G06F17/50 G06F19/00

    CPC分类号: G06F17/5018

    摘要: A structural analysis program which enables easy structural analysis in accordance with a finite element method based on data representing a two-dimensional shape. A two-dimensional model of a structure is produced in response to a manipulation input which designates a material arrangement pattern and a thickness of each layer of the structure. A three-dimensional model is produced by adding the designated thickness of each layer to the material arrangement pattern of the layer so as to make the material arrangement pattern three-dimensional and stacking the three-dimensionalized material arrangement pattern of each layer. A finite element model is produced by dividing the three-dimensional model into a plurality of voxels. The computer performs structural analysis based on the produced finite element model. Thereby, an analysis result of a multilayer structure defined by the two-dimensional model is obtained.

    摘要翻译: 一种结构分析程序,其能够根据基于表示二维形状的数据的有限元方法进行容易的结构分析。 响应于指定结构的每个层的材料布置图案和厚度的操作输入而产生结构的二维模型。 通过将各层的指定厚度添加到层的材料布置图案以使三维材料布置图案和每层的三维化材料排列图案堆叠来生成三维模型。 通过将三维模型划分成多个体素来产生有限元模型。 计算机根据生产的有限元模型进行结构分析。 由此,得到由二维模型定义的多层结构的分析结果。

    Semiconductor device having a pillar structure
    8.
    发明授权
    Semiconductor device having a pillar structure 有权
    具有柱结构的半导体器件

    公开(公告)号:US07642650B2

    公开(公告)日:2010-01-05

    申请号:US10780701

    申请日:2004-02-19

    IPC分类号: H01L23/52

    摘要: A semiconductor device includes a first multilayer interconnection structure formed on a substrate and a second multilayer interconnection structure formed on the first multilayer interconnection structure, wherein the first multilayer interconnection structure includes a pillar extending from a surface of the substrate and reaching at least the second multilayer interconnection structure.

    摘要翻译: 半导体器件包括形成在衬底上的第一多层互连结构和形成在第一多层互连结构上的第二多层互连结构,其中第一多层互连结构包括从衬底的表面延伸并至少达到第二多层互连结构的第二多层互连结构 互连结构。