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    MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY DEVICE AND ERASE METHOD THEREOF
    1.
    发明申请
    MEMORY SYSTEM INCLUDING NONVOLATILE MEMORY DEVICE AND ERASE METHOD THEREOF 有权
    包括非易失性存储器件的存储器系统及其擦除方法

    公开(公告)号：US20150205539A1

    公开(公告)日：2015-07-23

    申请号：US14527092

    申请日：2014-10-29

    申请人： Sangkwon MOON ,  Jihong KIM ,  Jaeyong JEONG ,  Kyung Ho KIM

    发明人： Sangkwon MOON ,  Jihong KIM ,  Jaeyong JEONG ,  Kyung Ho KIM

    IPC分类号： G06F3/06

    CPC分类号： G06F3/0652 ,  G06F3/0616 ,  G06F3/0679 ,  G06F12/0246 ,  G06F2212/72

    摘要： An erase method of a nonvolatile memory device is provided which includes receiving an erase request; selecting an erase mode of a memory block corresponding to the erase request, based on an access condition of the nonvolatile memory device managed by a memory controller; and controlling the nonvolatile memory device to erase the memory block according to the selected erase mode. The erase mode includes a fast erase mode of which an erase time for the memory block is shorter than a reference time and a slow erase mode of which an erase time for the memory block is longer than the reference time.

    摘要翻译： 提供了一种非易失性存储器件的擦除方法，包括接收擦除请求; 基于由存储器控制器管理的非易失性存储器件的访问条件，选择与擦除请求对应的存储块的擦除模式; 以及根据所选择的擦除模式控制非易失性存储器件擦除存储器块。 擦除模式包括其中存储块的擦除时间短于参考时间的快速擦除模式以及存储块的擦除时间比参考时间长的缓慢擦除模式。

    NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF
    7.
    发明申请
    NONVOLATILE MEMORY DEVICE AND OPERATING METHOD THEREOF 审中-公开
    非易失性存储器件及其操作方法

    公开(公告)号：US20130135934A1

    公开(公告)日：2013-05-30

    申请号：US13599773

    申请日：2012-08-30

    申请人： Seung-Bum KIM ,  Jaeyong JEONG ,  Kitae PARK

    发明人： Seung-Bum KIM ,  Jaeyong JEONG ,  Kitae PARK

    IPC分类号： G11C16/04

    CPC分类号： G11C16/10 ,  G11C11/5621 ,  G11C16/0483 ,  G11C16/3427

    摘要： Disclosed is a method of operating a nonvolatile memory device which includes a first memory area and a second memory area, the number of pages being stored in each word line of the first memory area being smaller than the number of pages being stored in each word line of the second memory area, and the first memory area being configured to buffer data to be written in the second memory area. The method includes sensing pages stored in the first memory area to store the sensed pages in a page buffer; receiving an address for storing pages stored in the page buffer in the second memory area; and randomizing the pages stored in the page buffer based on the address.

    摘要翻译： 公开了一种操作包括第一存储区域和第二存储区域的非易失性存储器件的方法，存储在第一存储器区域的每个字线中的页数小于存储在每个字线中的页数 并且所述第一存储区域被配置为缓冲要写入到所述第二存储器区域中的数据。 该方法包括感测存储在第一存储器区域中的页面以将感测的页面存储在页面缓冲器中; 接收存储在第二存储器区域中的页面缓冲器中的页面的地址; 并且基于地址随机化存储在页面缓冲器中的页面。

    NON-VOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION
    8.
    发明申请
    NON-VOLATILE MEMORY DEVICE AND RELATED METHOD OF OPERATION 有权
    非易失性存储器件及其相关操作方法

    公开(公告)号：US20120331210A1

    公开(公告)日：2012-12-27

    申请号：US13526794

    申请日：2012-06-19

    申请人： JAEYONG JEONG ,  JU SEOK LEE

    发明人： JAEYONG JEONG ,  JU SEOK LEE

    IPC分类号： G06F12/02

    CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/24 ,  G11C16/3454

    摘要： A nonvolatile memory device comprises a cell array connected to a plurality of bit lines in an all bit line structure, a page buffer circuit connected to the plurality of bit lines, and control logic configured to control the page buffer circuit. The control logic controls the page buffer circuit to sense memory cells corresponding to both even-numbered and odd-numbered columns of a selected page in a first read mode and to sense memory cells corresponding to one of the even-numbered and odd-numbered columns of the selected page in a second read mode. A sensing operation is performed at least twice in the first read mode and once in the second read mode.

    摘要翻译： 非易失性存储器件包括连接到全位线结构中的多个位线的单元阵列，连接到多个位线的寻址缓冲器电路以及被配置为控制页缓冲器电路的控制逻辑。 控制逻辑控制页面缓冲电路以在第一读取模式中感测与选定页面的偶数和偶数列对应的存储器单元，并且读取对应于偶数和奇数列之一的存储器单元 的第二读取模式。 在第一读取模式下执行感测操作至少两次，并且在第二读取模式中执行一次感测操作。

    METHOD FOR MANAGING ADDRESS MAPPING TABLE AND A MEMORY DEVICE USING THE METHOD
    9.
    发明申请
    METHOD FOR MANAGING ADDRESS MAPPING TABLE AND A MEMORY DEVICE USING THE METHOD 审中-公开
    用于管理地址映射表的方法和使用该方法的存储器件

    公开(公告)号：US20110145485A1

    公开(公告)日：2011-06-16

    申请号：US12946893

    申请日：2010-11-16

    申请人： Jin-Young Chun ,  Jaeyong Jeong

    发明人： Jin-Young Chun ,  Jaeyong Jeong

    IPC分类号： G06F12/10 ,  G06F12/00 ,  G06F12/02

    CPC分类号： G06F12/0246 ,  G06F2212/7201

    摘要： An address mapping table includes arrays each being allocated to a logical address and in which a physical address mapping the logical address is stored. In the case where the physical address mapped to the logical address is changed, a value of a difference between a pre-changed physical address and a physical address to be changed is stored in the address mapping table. When the logical address is mapped to the physical address, the mapped physical address is calculated by adding up the logical address and values stored in the arrays allocated to the logical address. The address mapping table is managed to decrease the number of erase counts of a memory device in which the address mapping table is stored.

    摘要翻译： 地址映射表包括分配给逻辑地址的阵列，并且存储映射逻辑地址的物理地址。 在映射到逻辑地址的物理地址被改变的情况下，预先改变的物理地址和要改变的物理地址之间的差值被存储在地址映射表中。 当逻辑地址映射到物理地址时，通过将逻辑地址和存储在分配给逻辑地址的阵列中的值相加来计算映射的物理地址。 管理地址映射表以减少存储地址映射表的存储器件的擦除次数。