公开(公告)号：US08810021B2

公开(公告)日：2014-08-19

申请号：US13620799

申请日：2012-09-15

申请人： Yasutaka Nakashiba ,  Kenta Ogawa

发明人： Yasutaka Nakashiba ,  Kenta Ogawa

IPC分类号： H01L23/52

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/645 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device, includes a substrate with a first surface, a semiconductor chip disposed over the first surface of the substrate, the semiconductor chip including a first region and a second region, and an encapsulant resin formed over the first surface of the substrate and encapsulating the semiconductor chip. The encapsulant resin has a thickness that is less at the first region of the semiconductor chip than that at the second region.

摘要翻译： 一种半导体器件，包括具有第一表面的衬底，设置在衬底的第一表面上的半导体芯片，所述半导体芯片包括第一区域和第二区域，以及密封树脂，形成在衬底的第一表面上并且封装 半导体芯片。 密封树脂在半导体芯片的第一区域的厚度小于第二区域的厚度。

公开(公告)号：US20130043558A1

公开(公告)日：2013-02-21

申请号：US13620799

申请日：2012-09-15

申请人： Yasutaka NAKASHIBA ,  Kenta Ogawa

发明人： Yasutaka NAKASHIBA ,  Kenta Ogawa

IPC分类号： H01L29/02

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/645 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device, includes a substrate with a first surface, a semiconductor chip disposed over the first surface of the substrate, the semiconductor chip including a first region and a second region, and an encapsulant resin formed over the first surface of the substrate and encapsulating the semiconductor chip. The encapsulant resin has a thickness that is less at the first region of the semiconductor chip than that at the second region.

摘要翻译： 一种半导体器件，包括具有第一表面的衬底，设置在衬底的第一表面上的半导体芯片，所述半导体芯片包括第一区域和第二区域，以及密封树脂，形成在衬底的第一表面上并且封装 半导体芯片。 密封树脂在半导体芯片的第一区域的厚度小于第二区域的厚度。

公开(公告)号：US20120045114A1

公开(公告)日：2012-02-23

申请号：US13137288

申请日：2011-08-03

申请人： Yasuhiro Matsumaru ,  Kenta Ogawa

发明人： Yasuhiro Matsumaru ,  Kenta Ogawa

IPC分类号： G06K9/62

CPC分类号： G06K9/00 ,  G06K9/00577 ,  H01L23/295 ,  H01L23/3128 ,  H01L23/544 ,  H01L23/573 ,  H01L24/16 ,  H01L24/48 ,  H01L2223/5442 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/186 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： There is provided an authentication device including an authentication information storage unit that stores authentication information acquired from an authentication pattern including a part or the entirety of a mottled pattern or a dot pattern formed over an electronic component as information for indentifying each of a plurality of electronic components, an authentication information acquiring unit that acquires a first authentication information acquired from the authentication pattern formed over a first electronic component that is an object to be authenticated, a search unit that searches whether or not the authentication information storage unit stores the first authentication information by using the first authentication information as a search key, and an output unit that outputs a search result of the search unit.

摘要翻译： 提供了一种认证装置，其包括认证信息存储单元，其存储从包括形成在电子部件上的斑驳图案或点图案的一部分或全部的认证图案获取的认证信息，作为用于识别多个电子 认证信息获取单元，其获取从作为要认证对象的第一电子部件形成的认证图案获取的第一认证信息;检索部，检索认证信息存储部是否存储第一认证信息 通过使用第一认证信息作为搜索关键字，以及输出单元，其输出搜索单元的搜索结果。

公开(公告)号：US20110241165A1

公开(公告)日：2011-10-06

申请号：US13067548

申请日：2011-06-08

申请人： Yasutaka Nakashiba ,  Kenta Ogawa

发明人： Yasutaka Nakashiba ,  Kenta Ogawa

IPC分类号： H01L29/02

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/645 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor module includes a semiconductor device including a mounting board, a semiconductor chip disposed at a first surface of the mounting board, a first inductor which is provided at a surface side of the semiconductor chip not facing the mounting board in order to perform communication between the semiconductor chip and the outside, a sealing resin layer which is formed at the first surface of the mounting board in order to seal the semiconductor chip, and a recess or an opening which is provided in the sealing resin layer and which includes the inductor inside when seen in a plan view; and a second inductor, which is located in the recess or the opening of the semiconductor device so that the second inductor performs communication with the first inductor.

摘要翻译： 半导体模块包括：半导体器件，包括安装板，设置在安装板的第一表面的半导体芯片;第一电感器，设置在不面向安装板的半导体芯片的表面侧，以便执行 半导体芯片和外部，形成在安装板的第一表面以密封半导体芯片的密封树脂层，以及设置在密封树脂层中并且包括电感器内部的凹部或开口的密封树脂层 当在平面图中看到; 以及第二电感器，其位于半导体器件的凹部或开口中，使得第二电感器执行与第一电感器的连通。

公开(公告)号：US07701726B2

公开(公告)日：2010-04-20

申请号：US12340267

申请日：2008-12-19

申请人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

发明人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

IPC分类号： H05K1/11 ,  H01K1/14

CPC分类号： H05K1/0271 ,  H01L21/4846 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/09018 ,  H05K2201/09481 ,  H05K2201/09781 ,  H01L2924/00 ,  H01L2224/0401

摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via hole formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film, the second interconnection being connected to the first interconnection via the via conductor. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via conductor, and the second interconnection are formed.

摘要翻译： 布线基板包括基底绝缘膜，形成在基底绝缘膜的上表面侧上的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底面侧的第二互连 基底绝缘膜，第二互连件经由通孔导体连接到第一互连件。 布线基板包括分割的基板单元区域，其中形成有第一互连，通孔导体和第二互连。

公开(公告)号：US07649749B2

公开(公告)日：2010-01-19

申请号：US11822599

申请日：2007-07-09

申请人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

发明人： Jun Tsukano ,  Kenta Ogawa ,  Takehiko Maeda ,  Shintaro Yamamichi ,  Katsumi Kikuchi

IPC分类号： H05K1/11 ,  H05K1/14

CPC分类号： H05K1/0271 ,  H01L21/4846 ,  H01L21/563 ,  H01L21/6835 ,  H01L23/13 ,  H01L23/49816 ,  H01L23/49827 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H05K3/205 ,  H05K3/4644 ,  H05K2201/09018 ,  H05K2201/09481 ,  H05K2201/09781 ,  H01L2924/00 ,  H01L2224/0401

摘要： A wiring substrate includes a base insulating film, a first interconnection formed on a top surface side of the base insulating film, a via conductor provided in a via formed in the base insulating film, and a second interconnection provided on a bottom surface side of the base insulating film. The second interconnection is connected to the first interconnection via the via. The wiring substrate includes divided-substrate-unit regions, in each of which the first interconnection, the via, and the second interconnection are formed. The wiring substrate includes a warpage-controlling pattern on the base insulating film, with a warped shape such that when the wiring substrate rests on a horizontal plate, at least a central part of a plane surface of the substrate contacts the horizontal plate, with both ends of the side raised.

摘要翻译： 布线基板包括基底绝缘膜，形成在基底绝缘膜的顶表面侧的第一互连，设置在形成在基底绝缘膜中的通孔中的通孔导体，以及设置在基底绝缘膜的底表面侧的第二互连 基底绝缘膜。 第二互连通过通孔连接到第一互连。 布线基板包括分开的基板单元区域，其中形成有第一互连，通孔和第二互连。 布线基板包括在基底绝缘膜上的翘曲控制图案，具有翘曲形状，使得当布线基板搁置在水平板上时，基板的平面的至少中心部分接触水平板，两者 一边抬起头。

公开(公告)号：US20060192287A1

公开(公告)日：2006-08-31

申请号：US11341445

申请日：2006-01-30

申请人： Kenta Ogawa ,  Jun Tsukano ,  Takehiko Maeda ,  Tadanori Shimoto ,  Shintaro Yamamichi ,  Kazuhiro Baba

发明人： Kenta Ogawa ,  Jun Tsukano ,  Takehiko Maeda ,  Tadanori Shimoto ,  Shintaro Yamamichi ,  Kazuhiro Baba

IPC分类号： H01L23/52

CPC分类号： H05K3/205 ,  H01L21/6835 ,  H01L23/49816 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/49838 ,  H01L25/0657 ,  H01L2221/68345 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2225/06517 ,  H01L2225/06541 ,  H01L2225/06572 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/09701 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/3511 ,  H05K1/113 ,  H05K3/107 ,  H05K3/4682 ,  H05K2201/09472 ,  H05K2201/096 ,  H05K2203/0384 ,  H01L2924/00 ,  H01L2224/0401

摘要： An interconnecting substrate is provided with a base insulating film having a sunken section in a bottom surface thereof, a first interconnection provided in the sunken section, a via hole formed in the base insulating film, and a second interconnection which is connected to the first interconnection via a conductor within the via hole and is formed on a top surface of the base insulating film, wherein the interconnecting substrate comprises a first interconnection pattern formed of the first interconnection which comprises at least a linear pattern which extends along a second direction orthogonal to a first direction, and a warpage-controlling pattern which is provided in the sunken section in the bottom surface of the base insulating film and is formed in such a manner as to suppress a warpage of the interconnecting substrate toward a bottom side on both sides of the first direction.

摘要翻译： 互连基板设置有在底面具有下沉部分的基底绝缘膜，设置在凹陷部分中的第一互连，形成在基底绝缘膜中的通孔，以及连接到第一互连件的第二互连 通过所述通孔内的导体，并形成在所述基底绝缘膜的顶表面上，其中所述互连衬底包括由所述第一互连形成的第一互连图案，所述第一互连图案至少包括沿着与第一互连正交的第二方向延伸的线状图案 第一方向和翘曲控制图案，其设置在基底绝缘膜的底面的下沉部分中，并且形成为抑制互连基板朝向底部绝缘膜两侧的底侧的翘曲 第一个方向

公开(公告)号：US08357935B2

公开(公告)日：2013-01-22

申请号：US13137247

申请日：2011-08-01

申请人： Yasuhiro Matsumaru ,  Kenta Ogawa

发明人： Yasuhiro Matsumaru ,  Kenta Ogawa

IPC分类号： H01L23/58 ,  H01L29/10 ,  H01L23/544 ,  H01L21/66 ,  H01L21/76 ,  H01L21/00 ,  G01R31/26

CPC分类号： H01L21/56 ,  H01L21/565 ,  H01L23/295 ,  H01L23/3107 ,  H01L23/544 ,  H01L24/16 ,  H01L2223/54406 ,  H01L2223/54413 ,  H01L2223/54426 ,  H01L2223/54433 ,  H01L2223/54486 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2924/00014 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/1815 ,  H01L2924/18161 ,  H01L2924/00 ,  H01L2224/0401

摘要： In order to solve the above problem, provided is an electronic component having an authentication pattern formed on an exposed surface, in which the authentication pattern includes a base section including a resin and colored particles having a hue that can be identified in the base section, and the colored particles are dispersed so as to form dotted pattern in the base section.

摘要翻译： 为了解决上述问题，提供了一种具有形成在暴露表面上的认证图案的电子部件，其中认证图案包括具有树脂的基部和具有可在基部中识别的色调的着色颗粒， 并且着色颗粒被分散以在基部中形成点状图案。

公开(公告)号：US08283770B2

公开(公告)日：2012-10-09

申请号：US13067548

申请日：2011-06-08

申请人： Yasutaka Nakashiba ,  Kenta Ogawa

发明人： Yasutaka Nakashiba ,  Kenta Ogawa

IPC分类号： H01L23/48

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/645 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor module includes a semiconductor device including a mounting board, a semiconductor chip disposed at a first surface of the mounting board, a first inductor which is provided at a surface side of the semiconductor chip not facing the mounting board in order to perform communication between the semiconductor chip and the outside, a sealing resin layer which is formed at the first surface of the mounting board in order to seal the semiconductor chip, and a recess or an opening which is provided in the sealing resin layer and which includes the inductor inside when seen in a plan view; and a second inductor, which is located in the recess or the opening of the semiconductor device so that the second inductor performs communication with the first inductor.

摘要翻译： 半导体模块包括：半导体器件，包括安装板，设置在安装板的第一表面的半导体芯片;第一电感器，设置在不面向安装板的半导体芯片的表面侧，以便执行 半导体芯片和外部，形成在安装板的第一表面以密封半导体芯片的密封树脂层，以及设置在密封树脂层中并且包括电感器内部的凹部或开口的密封树脂层 当在平面图中看到; 以及第二电感器，其位于半导体器件的凹部或开口中，使得第二电感器执行与第一电感器的连通。

公开(公告)号：US20110143662A1

公开(公告)日：2011-06-16

申请号：US12926709

申请日：2010-12-06

申请人： Yasutaka Nakashiba ,  Kenta Ogawa

发明人： Yasutaka Nakashiba ,  Kenta Ogawa

IPC分类号： H04B5/00 ,  H01L29/66

CPC分类号： H01L23/3128 ,  H01L21/561 ,  H01L23/645 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/30107 ,  H01L2924/351 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor chip is disposed on a first surface of a mounting board with its active surface upward. An inductor is provided at the active surface side, that is, at the surface side of the semiconductor chip not facing the mounting board in order to perform communication between the semiconductor chip and the outside. A sealing resin layer is formed on the first surface of the mounting board in order to seal the semiconductor chip. In addition, a recess or an opening (in the present embodiment, a recess) is provided in the sealing resin layer. The recess includes the inductor thereinside when seen in a plan view.

摘要翻译： 半导体芯片设置在其主动表面向上的安装板的第一表面上。 在半导体芯片的表面侧，在半导体芯片与外部之间进行通信时，在有源面侧设置电感器，不面向安装基板。 为了密封半导体芯片，在安装基板的第一面上形成密封树脂层。 此外，在密封树脂层中设置有凹部或开口（在本实施方式中为凹部）。 当在平面图中看时，该凹槽包括其内部的电感器。