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公开(公告)号:US10381998B2
公开(公告)日:2019-08-13
申请号:US15087423
申请日:2016-03-31
发明人: Shogo Inoue , Marc Solal , Robert Aigner
摘要: A method of fabricating a bonded wafer with low carrier lifetime in silicon comprises providing a silicon substrate having opposing top and bottom surfaces, modifying a top portion of the silicon substrate to reduce carrier lifetime in the top portion relative to the carrier lifetime in portions of the silicon substrate other than the top portion, bonding a piezoelectric layer having opposing top and bottom surfaces separated by a distance T over the top surface of the silicon substrate, and providing a pair of electrodes having fingers that are inter-digitally dispersed on a top surface of the piezoelectric layer, the electrodes comprising a portion of a Surface Acoustic Wave (SAW) device. The modifying and bonding steps may be performed in any order. The modified top portion of the silicon substrate prevents the creation of a parasitic conductance within that portion during operation of the SAW device.
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公开(公告)号:US10374573B2
公开(公告)日:2019-08-06
申请号:US14973295
申请日:2015-12-17
发明人: Kushal Bhattacharjee
IPC分类号: H01L41/047 , H03H3/02 , H03H9/25 , H01L41/33 , H01L41/312 , H03H9/02
摘要: A micro-electrical-mechanical system (MEMS) guided wave device includes a single crystal piezoelectric layer and at least one guided wave confinement structure configured to confine a laterally excited wave in the single crystal piezoelectric layer. A bonded interface is provided between the single crystal piezoelectric layer and at least one underlying layer. A multi-frequency device includes first and second groups of electrodes arranged on or in different thickness regions of a single crystal piezoelectric layer, with at least one guided wave confinement structure. Segments of a segmented piezoelectric layer and a segmented layer of electrodes are substantially registered in a device including at least one guided wave confinement structure.
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公开(公告)号:US10298288B2
公开(公告)日:2019-05-21
申请号:US13952880
申请日:2013-07-29
发明人: Nadim Khlat
摘要: This disclosure relates to antenna switching circuitry and other radio frequency (RF) front-end circuitry. In one embodiment, the antenna switching circuitry includes a multiple throw solid-state transistor switch (MTSTS), a multiple throw microelectromechanical switch (MTMEMS), and a control circuit. The MTSTS is configured to selectively couple a first pole port to any one of a first set of throw ports and to selectively couple a second pole port to any one of a second set of throw ports. The MTMEMS is configured to selectively couple a third pole port to any one of a third set of throw ports. The control circuit is configured to control the selective coupling of the MTSTS and the MTMEMS. In this manner, the control circuit may operate the antenna switching circuitry so that RF signals may be routed in accordance with Long Term Evolution (LTE) Multiple-Input and Multiple-Output (MIMO) and/or LTE diversity specifications.
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公开(公告)号:US10276941B2
公开(公告)日:2019-04-30
申请号:US14600977
申请日:2015-01-20
发明人: Ruediger Bauder
摘要: RF communications circuitry, which includes a first RF antenna element, a second RF antenna element, a third RF antenna element, and a fourth RF antenna element is disclosed. The first RF antenna element is proximal to the second RF antenna element. The third RF antenna element is proximal to the fourth RF antenna element. A primary axis of the first RF antenna element is about perpendicular to a primary axis of one of the third RF antenna element and the fourth RF antenna element.
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公开(公告)号:US10224891B2
公开(公告)日:2019-03-05
申请号:US14568495
申请日:2014-12-12
摘要: RF PA circuitry includes an RF signal path, an adjustable component, a distortion compensation feedback loop including distortion compensation circuitry, RF noise filtering circuitry, and baseband noise filtering circuitry. The adjustable component is located in the RF signal path. The distortion compensation feedback loop is coupled in parallel with at least a portion of the RF signal path, and includes the distortion compensation circuitry. Further, the distortion compensation circuitry is configured to adjust one or more parameters of the adjustable component via a component adjustment signal based on a measurement of a signal at an output of the RF signal path. The RF noise filtering circuitry is coupled in the RF signal path and configured to attenuate noise therein. The baseband noise filtering circuitry is coupled between the distortion compensation circuitry and the adjustable component and configured to attenuate noise in the component adjustment signal.
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公开(公告)号:US10062629B2
公开(公告)日:2018-08-28
申请号:US14931720
申请日:2015-11-03
IPC分类号: H03H7/38 , H01L23/31 , H01L21/304 , H01L21/02 , H01L21/683 , H01L23/29 , H01L23/373 , H01L23/00 , H05K1/02 , H05K1/18 , H01Q1/50 , H01L23/36 , H01L21/56 , H01L23/20 , H01L23/367 , H01L21/306 , H01L23/522 , H01L49/02
CPC分类号: H01L23/315 , H01L21/02266 , H01L21/02282 , H01L21/304 , H01L21/30604 , H01L21/565 , H01L21/6835 , H01L23/20 , H01L23/291 , H01L23/293 , H01L23/3121 , H01L23/3135 , H01L23/36 , H01L23/367 , H01L23/3731 , H01L23/3737 , H01L23/5223 , H01L23/5227 , H01L23/5228 , H01L23/562 , H01L24/17 , H01L28/10 , H01L28/20 , H01L28/40 , H01L2221/68327 , H01L2221/6834 , H01L2221/68381 , H01L2224/131 , H01L2224/13147 , H01L2224/16225 , H01L2224/16227 , H01L2224/73204 , H01L2224/92125 , H01L2924/0002 , H01L2924/19011 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01Q1/50 , H05K1/0203 , H05K1/181 , H01L2924/00 , H01L2924/014 , H01L2924/00014
摘要: Antenna aperture tuning circuitry includes a first signal path and a second signal path coupled in parallel between an antenna radiating element and ground. A first LC resonator and a second LC resonator are each coupled between the first signal path and ground. The first LC resonator and the second LC resonator are electromagnetically coupled such that a coupling factor between the first LC resonator and the second LC resonator is between about 1.0% and 40.0%. A third LC resonator and a fourth LC resonator are each coupled between the second signal path and ground. The third LC resonator and the fourth LC resonator are electromagnetically coupled such that a coupling factor between the third LC resonator and the fourth LC resonator is between about 1.0% and 40.0%.
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公开(公告)号:US10028390B2
公开(公告)日:2018-07-17
申请号:US14872910
申请日:2015-10-01
IPC分类号: H01L21/50 , H01L21/56 , H01L23/48 , H05K3/30 , H05K3/28 , H01F27/24 , H01L23/31 , H01L23/36 , H01L23/373 , H01L23/498 , H05K3/46 , H05K1/18
摘要: This disclosure relates to integrated circuit (IC) packages and methods of manufacturing the same. In one method, a printed circuit board is provided with semiconductor die. The semiconductor die includes a Back-End-of-Line (BEOL) region, a Front-End-of-Line (FEOL) region, and a semiconductor handle such that the BEOL region, the FEOL region, and the semiconductor handle are stacked. A first polymer layer is provided over the printed circuit board so as to cover the semiconductor die. The semiconductor handle of the semiconductor die is exposed through the first polymer layer and removed. A second polymer layer is then provided so that the BEOL region, the FEOL region, and at least a portion of the second polymer layer are stacked. The second polymer layer may be provided to have high thermal conductivity and electric isolation properties thereby providing advantageous package characteristics.
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公开(公告)号:US10008431B2
公开(公告)日:2018-06-26
申请号:US14885202
申请日:2015-10-16
IPC分类号: H01L23/29 , H01L23/31 , H01L21/304 , H01L21/02 , H01L21/683 , H01L23/373 , H01L23/00 , H05K1/02 , H05K1/18 , H01Q1/50 , H01L23/36 , H01L21/56 , H01L23/20 , H01L23/367 , H01L21/306 , H01L23/522 , H01L49/02
摘要: A printed circuit module having a protective layer in place of a low-resistivity handle layer and methods for manufacturing the same are disclosed. The printed circuit module includes a printed circuit substrate with a thinned die attached to the printed circuit substrate. The thinned die includes at least one device layer over the printed circuit substrate and at least one deep well within the at least one device layer. A protective layer is disposed over the at least one deep well, wherein the protective layer has a thermal conductivity greater than 2 watts per meter Kelvin (W/mK) and an electrical resistivity of greater than 106 Ohm-cm.
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公开(公告)号:US09998088B2
公开(公告)日:2018-06-12
申请号:US14703060
申请日:2015-05-04
CPC分类号: H03H9/02228 , H03H9/02338 , H03H9/172 , H03H2009/155 , H03H2009/241
摘要: A MEMS vibrating device includes a substrate, at least one anchor on a surface of the substrate, and a vibrating body suspended over the substrate by the at least one anchor. The vibrating body includes a first piezoelectric thin-film layer, a second piezoelectric thin-film layer over the first piezoelectric thin-film layer, and an inter-digital transducer embedded between the first piezoelectric thin-film layer and the second piezoelectric thin-film layer. Embedding the inter-digital transducer between the first piezoelectric thin-film layer and the second piezoelectric thin-film layer may result in enhanced vibrational characteristics of the MEMS vibrating device, thereby increasing the performance thereof.
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公开(公告)号:US09997509B2
公开(公告)日:2018-06-12
申请号:US14687310
申请日:2015-04-15
CPC分类号: H01L27/0251 , H01L27/0259
摘要: Aspects disclosed in the detailed description include an electrostatic discharge (ESD) protection circuit. In this regard, in one aspect, an ESD protection circuit is provided to protect an integrated circuit (IC) during fabrication and production. An ESD detection circuitry detects an ESD event by detecting a voltage spike between a supply rail and a ground rail exceeding an ESD threshold voltage. In response to detecting the ESD event, an ESD clamping circuitry is activated to discharge the ESD event, thus protecting the IC from being damaged by the ESD event. By detecting the ESD event based on the ESD threshold voltage, as opposed to detecting the ESD event based on rise time of the voltage spike, it is possible to prevent the ESD clamping circuitry from missing voltage spikes associated with a slow rise time or being falsely activated by a normal power-on voltage associated with a fast rise time.
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