公开(公告)号：US20120248458A1

公开(公告)日：2012-10-04

申请号：US13503582

申请日：2009-11-05

申请人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Tatsunori Toyota ,  Yoshitaka Kadowaki

发明人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Tatsunori Toyota ,  Yoshitaka Kadowaki

IPC分类号： H01L33/40 ,  H01L33/08

CPC分类号： H01L33/32 ,  H01L33/0079 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0066 ,  H01L2924/00

摘要： A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon en” is a positive integer) having rounded corners.

摘要翻译： 一种用于制造垂直结构的III族氮化物半导体LED芯片的方法包括在生长衬底上形成发光层压体的步骤; 通过部分去除所述发光层压体以部分地暴露所述生长衬底来形成多个分离的发光结构的步骤; 在所述多个发光结构上形成导电支撑体的步骤; 从多个发光结构剥离生长衬底的步骤; 以及切割导电支撑件的步骤，从而将每个具有发光结构的多个LED芯片分离。 执行部分去除发光层压体的步骤，使得多个发光结构中的每一个具有圆角的顶视图形状或具有圆角的4n-gon en为正整数）。

公开(公告)号：US20120061683A1

公开(公告)日：2012-03-15

申请号：US13259788

申请日：2010-03-25

申请人： Ryuichi Toba ,  Masahito Miyashita ,  Tatsunori Toyota ,  Yoshitaka Kadowaki

发明人： Ryuichi Toba ,  Masahito Miyashita ,  Tatsunori Toyota ,  Yoshitaka Kadowaki

IPC分类号： H01L29/16 ,  H01L21/20 ,  H01L29/20

CPC分类号： H01L21/02365 ,  H01L21/0237 ,  H01L21/02439 ,  H01L21/02458 ,  H01L21/02488 ,  H01L21/02505 ,  H01L21/0254 ,  H01L21/02664

摘要： An object of the present invention is to provide a Group III nitride semiconductor epitaxial substrate, a Group III nitride semiconductor element, and a Group III nitride semiconductor free-standing substrate, which have good crystallinity, with not only AlGaN, GaN, and GaInN the growth temperature of which is 1050° C. or less, but also with AlxGa1-xN having a high Al composition, the growth temperature of which is high; a Group III nitride semiconductor growth substrate used for producing these, and a method for efficiently producing those. The present invention provides a Group III nitride semiconductor growth substrate comprising a crystal growth substrate including a surface portion composed of a Group III nitride semiconductor which contains at least Al, and a scandium nitride film formed on the surface portion are provided.

摘要翻译： 本发明的目的是提供具有良好结晶性的III族氮化物半导体外延衬底，III族氮化物半导体元件和III族氮化物半导体独立衬底，不仅AlGaN，GaN和GaInN 其生长温度为1050℃以下，同时也具有Al生成温度高的Al组分的Al x Ga 1-x N; 用于制造它们的III族氮化物半导体生长衬底及其有效生产方法。 本发明提供了一种III族氮化物半导体生长衬底，其包括晶体生长衬底，该晶体生长衬底包括由至少含有Al的III族氮化物半导体构成的表面部分和在表面部分上形成的钪氮化物膜。

公开(公告)号：US07256476B2

公开(公告)日：2007-08-14

申请号：US11267968

申请日：2005-11-07

申请人： Ryuichi Toba ,  Naoya Sunachi

发明人： Ryuichi Toba ,  Naoya Sunachi

IPC分类号： H01L29/04 ,  H01L31/036 ,  H01L29/06

CPC分类号： C30B29/42 ,  C30B33/00 ,  H01L23/544 ,  H01L33/16 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a notched compound semiconductor crystal having the same specification even if it is turned over. With respect to a compound semiconductor wafer produced by slicing a compound semiconductor crystal having a crystal plane of (100) plane, the crystal is sliced so as to be tilted from the (100) plane in a direction of [101] or [10-1] when a notch is formed in a direction of [010], or the crystal is sliced so as to be tilted from the (100) plane in a direction of [0-10] or [010] when a notch is formed in a direction of [001], or the crystal is sliced so as to be tilted from the (100) plane in a direction of [001] or [00-1] when a notch is formed in a direction of [0-10] , or the crystal is sliced so as to be tilted from the (100) plane in a direction of [010] or [0-10] when a notch is formed in a direction of [00-1].

摘要翻译： 提供了具有相同规格的缺口化合物半导体晶体，即使它被翻转。 对于通过对具有（100）面的晶面的化合物半导体晶体进行切片而制作的复合半导体晶片，将晶体从（100）面向[101]或[10- 1]当在[010]的方向上形成切口时，或者当在[0-10]或[010]的方向上形成在[0-10]或[010]的方向上时，晶体被切割成从（100）面倾斜 或者在[0-10]的方向上形成切口时，[001]的方向或者晶体被切割成从（100）面向[001]或[00-1]的方向倾斜， 或者当在[00-1]的方向上形成凹口时，晶体被切割成从（100）面向[010]或[0-10]的方向倾斜。

公开(公告)号：US06336970B1

公开(公告)日：2002-01-08

申请号：US09415459

申请日：1999-10-14

申请人： Ryo Sakamoto ,  Ryuichi Toba ,  Hiroyuki Ikeda

发明人： Ryo Sakamoto ,  Ryuichi Toba ,  Hiroyuki Ikeda

IPC分类号： C30B2516

CPC分类号： H01L21/02046 ,  H01L21/02395 ,  H01L21/02463 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02661

摘要： A surface preparation method and semiconductor device constituted so as to enable the prevention of carrier accumulation resulting from Si acting as a donor, without making the constitution of a semiconductor manufacturing apparatus complex. When forming an epitaxial layer either on the surface of a substrate, or on the surface of a base layer, Si or an Si compound that exists on the surface of a substrate, or on the surface of a base layer, is removed in accordance with a thermal cleaning process that uses an As hydride gas as the cleaning gas.

摘要翻译： 一种表面制备方法和半导体器件，其构成为能够防止由作为供体的Si产生的载流子聚集，而不会使半导体制造装置的结构复杂化。 当在衬底的表面或基底层的表面上形成外延层时，根据存在于基底表面上或基底表面上的Si或Si化合物，根据 使用As氢化物气体作为清洁气体的热清洗方法。

公开(公告)号：US08962362B2

公开(公告)日：2015-02-24

申请号：US13503582

申请日：2009-11-05

申请人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Tatsunori Toyota ,  Yoshitaka Kadowaki

发明人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Tatsunori Toyota ,  Yoshitaka Kadowaki

IPC分类号： H01L33/40 ,  H01L33/08 ,  H01L33/32 ,  H01L33/00 ,  H01L33/62

CPC分类号： H01L33/32 ,  H01L33/0079 ,  H01L33/62 ,  H01L2924/0002 ,  H01L2933/0066 ,  H01L2924/00

摘要： A method for manufacturing vertically structured Group III nitride semiconductor LED chips includes a step of forming a light emitting laminate on a growth substrate; a step of forming a plurality of separate light emitting structures by partially removing the light emitting laminate to partially expose the growth substrate; a step of forming a conductive support on the plurality of light emitting structures; a step of lifting off the growth substrate from the plurality of light emitting structures; and a step of cutting the conductive support thereby singulating a plurality of LED chips each having the light emitting structure. The step of partially removing the light emitting laminate is performed such that each of the plurality of light emitting structures has a top view shape of a circle or a 4n-gon (“n” is a positive integer) having rounded corners.

摘要翻译： 一种用于制造垂直结构的III族氮化物半导体LED芯片的方法包括在生长衬底上形成发光层压体的步骤; 通过部分去除所述发光层压体以部分地暴露所述生长衬底来形成多个分离的发光结构的步骤; 在所述多个发光结构上形成导电支撑体的步骤; 从多个发光结构剥离生长衬底的步骤; 以及切割导电支撑件的步骤，从而将每个具有发光结构的多个LED芯片分离。 执行部分去除发光层压体的步骤，使得多个发光结构中的每一个具有圆形的顶视图形状或具有圆角的4n-gon（“n”是正整数）。

公开(公告)号：US20140217457A1

公开(公告)日：2014-08-07

申请号：US14117301

申请日：2011-05-25

申请人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Yoshitaka Kadowaki

发明人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Yoshitaka Kadowaki

IPC分类号： H01L33/36 ,  H01L33/22

CPC分类号： H01L33/36 ,  H01L33/0079 ,  H01L33/0095 ,  H01L33/20 ,  H01L33/22 ,  H01L33/46 ,  H01L2933/0016

摘要： There is provided a light-emitting element chip which can be safely assembled and a manufacturing method therefor. A light-emitting element chip 10 has a semiconductor layer 12 including a luminescent layer 12a on a supporting portion 11. The supporting portion 11 has a concave shape, providing a support substrate in this light-emitting element chip 10, and being connected to one electrode on the semiconductor layer 12. The outer peripheral portion of the supporting portion 11 (a supporting portion outer peripheral portion 11a) surrounds the semiconductor layer 12, and is protruded to be set at a level higher than the other face 12d and the n-side electrode 15 of the semiconductor layer 12.

摘要翻译： 提供了可以安全组装的发光元件芯片及其制造方法。 发光元件芯片10具有在支撑部分11上包括发光层12a的半导体层12.支撑部分11具有凹形，在该发光元件芯片10中提供支撑基板，并连接到一个 电极。半导体层12的外周部（支撑部外周部11a）围绕半导体层12突出，设定为高于另一面12d的高度， 半导体层12的侧面电极15。

公开(公告)号：US20090057835A1

公开(公告)日：2009-03-05

申请号：US12230284

申请日：2008-08-27

申请人： Takafumi Yao ,  Meoung-Whan Cho ,  Ryuichi Toba

发明人： Takafumi Yao ,  Meoung-Whan Cho ,  Ryuichi Toba

IPC分类号： H01L29/20 ,  H01L21/20

CPC分类号： H01L21/02664 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/02491 ,  H01L21/02502 ,  H01L21/02513 ,  H01L21/0254 ,  H01L21/0262

摘要： A manufacturing method of a group III nitride semiconductor includes the steps of: depositing a metal layer on an AlN template substrate or an AlN single crystal substrate formed by depositing an AlN single crystal layer with a thickness of not less than 0.1 μm nor more than 10 μm on a substrate made of either one of sapphire, SiC, and Si; forming a metal nitride layer having a plurality of substantially triangular-pyramid-shaped or triangular-trapezoid-shaped microcrystals by performing a heating nitridation process on the metal layer under a mixed gas atmosphere of ammonia; and depositing a group III nitride semiconductor layer on the metal nitride layer.

摘要翻译： III族氮化物半导体的制造方法包括以下步骤：在AlN模板衬底或AlN单晶衬底上沉积金属层，所述AlN单晶衬底通过沉积厚度不小于0.1μm而不大于10nm的AlN单晶层而形成 在由蓝宝石，SiC和Si中的任一个制成的衬底上的母体; 通过在氨的混合气体气氛下对所述金属层进行加热氮化处理，形成具有多个大致三角锥形或三角形梯形微晶的金属氮化物层; 以及在所述金属氮化物层上沉积III族氮化物半导体层。

公开(公告)号：US07256477B2

公开(公告)日：2007-08-14

申请号：US11268028

申请日：2005-11-07

申请人： Ryuichi Toba ,  Naoya Sunachi

发明人： Ryuichi Toba ,  Naoya Sunachi

IPC分类号： H01L29/04 ,  H01L29/06 ,  H01L31/036

CPC分类号： C30B29/42 ,  C30B33/00 ,  H01L23/544 ,  H01L33/16 ,  H01L2223/54493 ,  H01L2924/0002 ,  H01L2924/00

摘要： There is provided a notched compound semiconductor crystal having the same specification even if it is turned over. With respect to a compound semiconductor wafer produced by slicing a compound semiconductor crystal having a crystal plane of (100) plane, the crystal is sliced so as to be tilted from the (100) plane in a direction of [101] or [10-1] when a notch is formed in a direction of [010], or the crystal is sliced so as to be tilted from the (100) plane in a direction of [0-10] or [010] when a notch is formed in a direction of [001], or the crystal is sliced so as to be tilted from the (100) plane in a direction of [001] or [00-1] when a notch is formed in a direction of [0-10], or the crystal is sliced so as to be tilted from the (100) plane in a direction of [010] or [0-10] when a notch is formed in a direction of [00-1].

摘要翻译： 提供了具有相同规格的缺口化合物半导体晶体，即使它被翻转。 对于通过将具有（100）面的晶面的化合物半导体晶体切片而制造的复合半导体晶片，将晶体从（100）面向[101]或[10- 1]当在[010]的方向上形成切口时，或者当在[0-10]或[010]的方向上形成在[0-10]或[010]的方向上时，晶体被切割成从（100）面倾斜 或者在[0-10]的方向上形成切口时，[001]的方向或者晶体被切割成从（100）面向[001]或[00-1]的方向倾斜， 或者当在[00-1]的方向上形成凹口时，晶体被切割成从（100）面向[010]或[0-10]的方向倾斜。

公开(公告)号：US09502603B2

公开(公告)日：2016-11-22

申请号：US14117281

申请日：2011-05-12

申请人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Yoshitaka Kadowaki

发明人： Meoung Whan Cho ,  Seog Woo Lee ,  Pil Guk Jang ,  Ryuichi Toba ,  Yoshitaka Kadowaki

IPC分类号： H01L33/00 ,  H01L33/32 ,  H01L33/38

CPC分类号： H01L33/0025 ,  H01L33/007 ,  H01L33/0075 ,  H01L33/0079 ,  H01L33/32 ,  H01L33/38

摘要： A method for manufacturing a vertically structured Group III nitride semiconductor LED chip includes a first step of forming a light emitting structure laminate; a second step of forming a plurality of separate light emitting structures by partially removing the light emitting structure laminate to partially expose the growth substrate; a third step of forming a conductive support, which conductive support integrally supporting the light emitting structures; a fourth step of separating the growth substrate by removing the lift-off layer; and a fifth step of dividing the conductive support between the light emitting structures thereby singulating a plurality of LED chips each having the light emitting structure. A first through-hole is formed to open in a central region of each of the light emitting structures such that at least the lift-off layer is exposed, and an etchant is supplied from the first through-hole in the fourth step.

摘要翻译： 一种用于制造垂直结构的III族氮化物半导体LED芯片的方法包括：形成发光结构层压体的第一步骤; 通过部分去除所述发光结构层压体以部分地暴露所述生长衬底来形成多个分离的发光结构的第二步骤; 形成导电支撑件的第三步骤，所述导电支撑件一体地支撑所述发光结构; 通过去除剥离层分离生长衬底的第四步骤; 以及第五步骤，在发光结构之间分隔导电支撑体，由此分离出具有发光结构的多个LED芯片。 第一通孔形成为在每个发光结构的中心区域中开口，使得至少剥离层被暴露，并且在第四步骤中从第一通孔提供蚀刻剂。

公开(公告)号：US20140284770A1

公开(公告)日：2014-09-25

申请号：US14347443

申请日：2011-09-28

申请人： Meoung Whan Cho ,  Seog Woo Lee ,  Ryuichi Toba ,  Yoshitaka Kadowaki

发明人： Meoung Whan Cho ,  Seog Woo Lee ,  Ryuichi Toba ,  Yoshitaka Kadowaki

IPC分类号： H01L33/00 ,  H01L33/20 ,  H01L21/02 ,  H01L21/78 ,  H01L29/06

CPC分类号： H01L33/0075 ,  H01L21/02365 ,  H01L21/78 ,  H01L29/0603 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/20

摘要： The method of manufacturing a semiconductor device according to the present invention includes: a step of forming a semiconductor laminate on a growth substrate with a lift-off layer therebetween; a step of providing grooves in a grid pattern in the semiconductor laminate, thereby forming a plurality of semiconductor structures each having a nearly quadrangular transverse cross-sectional shape; a step of forming a conductive support body; and a step of removing the lift-off layer using a chemical lift-off process, in which step, in supplying an etchant to the grooves via through-holes provided in a portion above the grooves, the lift-off layer is etched from only one side surface of each semiconductor structure.

摘要翻译： 根据本发明的制造半导体器件的方法包括：在其上具有剥离层的生长衬底上形成半导体层叠体的步骤; 在半导体层叠体中设置栅格图案的槽，由此形成多个具有近似四边形横截面形状的半导体结构; 形成导电性支撑体的工序; 以及使用化学剥离处理去除剥离层的步骤，其中通过设置在沟槽上方的通孔的沟槽向槽施加蚀刻剂，仅剥离层仅从蚀刻 每个半导体结构的一个侧表面。