利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

26 条记录 (耗时 0.022 秒)

    Method of manufacturing semiconductor device using stress memorization technique
    2.
    发明授权
    Method of manufacturing semiconductor device using stress memorization technique 有权
    使用应力记忆技术制造半导体器件的方法

    公开(公告)号：US08772095B2

    公开(公告)日：2014-07-08

    申请号：US13495062

    申请日：2012-06-13

    申请人： Seok-Hoon Kim ,  Sang-Su Kim ,  Chung-Geun Koh ,  Sun-Ghil Lee ,  Jin-Yeong Joe

    发明人： Seok-Hoon Kim ,  Sang-Su Kim ,  Chung-Geun Koh ,  Sun-Ghil Lee ,  Jin-Yeong Joe

    IPC分类号： H01L21/00

    CPC分类号： H01L29/7847 ,  H01L21/26506 ,  H01L21/26593 ,  H01L21/823412 ,  H01L21/823425 ,  H01L21/823807 ,  H01L21/823814 ,  H01L29/7843

    摘要： The manufacturing a semiconductor device includes providing a substrate supporting a gate electrode, amorphizing and doping the source/drain regions located on both sides of the gate electrode by performing a pre-amorphization implant (PAI) process and implanting C or N into the source/drain regions in or separately from the PAI process, forming a stress inducing layer on the substrate to cover the amorphized source/drain regions, and subsequently recrystallizing the source/drain regions by annealing the substrate. The stress inducing layer may then be removed. Also, the C or N may be implanted into the entirety of the source/drain regions after the regions have been amorphized, or only into upper portions of the amorphized source/drain regions.

    摘要翻译： 制造半导体器件包括提供支撑栅电极的衬底，通过执行预非晶化注入（PAI）工艺并且将C或N注入到源/漏区中来对位于栅电极的两侧的源/漏区进行非晶化和掺杂， 漏极区域或与PAI工艺分离，在衬底上形成应力诱导层以覆盖非晶化源极/漏极区域，并且随后通过对衬底退火来使源极/漏极区域再结晶。 然后可以去除应力诱导层。 此外，在区域已经非晶化之后，或仅仅在非晶化源极/漏极区域的上部，C或N可以被注入到整个源极/漏极区域中。

    Refueling apparatus for sodium-cooled fast reactor and method for the same
    4.
    发明申请
    Refueling apparatus for sodium-cooled fast reactor and method for the same 有权
    用于钠冷快堆的加油装置及其方法

    公开(公告)号：US20090129527A1

    公开(公告)日：2009-05-21

    申请号：US12291681

    申请日：2008-11-12

    申请人： Young- Sang Joo ,  Chang- Gyu Park ,  Seok- Hoon Kim ,  Gyeong- Hoi Koo ,  Jae- Han Lee

    发明人： Young- Sang Joo ,  Chang- Gyu Park ,  Seok- Hoon Kim ,  Gyeong- Hoi Koo ,  Jae- Han Lee

    IPC分类号： G21C17/00 ,  G21C19/00

    CPC分类号： G21C19/205 ,  G21Y2002/201 ,  G21Y2002/207 ,  G21Y2002/304 ,  G21Y2002/402 ,  G21Y2004/30 ,  G21Y2004/40 ,  G21Y2004/504

    摘要： A refueling apparatus for charging nuclear fuel in a reactor vessel, the refueling apparatus including: a refueling unit loading new nuclear fuel to a core or extracting spent nuclear fuel from the core; and a waveguide sensor unit including an ultrasonic wedge to form a Lamb wave, a waveguide with an end connected to the ultrasonic wedge and with another end transmitting the Lamb wave into the reactor vessel, and an ultrasonic sensor connected to the ultrasonic wedge and sensing a reflection signal reflected from an inside of the reactor vessel, the waveguide being formed in a plate shape and mounted in an end of the refueling unit. The waveguide integrally moves with the refueling unit, and the waveguide sensor unit detects a condition of the inside of the reactor vessel, while the refueling unit refuels the fuel assembly in the reactor vessel.

    摘要翻译： 一种用于在反应堆容器中装入核燃料的加油装置，所述加油装置包括：加油单元，将新的核燃料装载到核心或从核心提取废核燃料; 以及波导传感器单元，其包括用于形成兰姆波的超声波楔形件，波导，其端部连接到所述超声波楔块，并且另一端部将所述兰姆波传输到所述反应器容器中;以及超声波传感器，连接到所述超声波楔块并感测 反射信号从反应堆容器的内部反射，波导形成为板状并安装在加油单元的一端。 波导与加油单元一体地移动，并且波导传感器单元检测反应堆容器内部的状态，同时加油单元将反应器容器中的燃料组件重新燃烧。

    Semiconductor Devices Having Source/Drain Regions with Strain-Inducing Layers and Methods of Manufacturing Such Semiconductor Devices
    8.
    发明申请
    Semiconductor Devices Having Source/Drain Regions with Strain-Inducing Layers and Methods of Manufacturing Such Semiconductor Devices 有权
    具有应变诱导层的源极/漏极区域的半导体器件以及制造这种半导体器件的方法

    公开(公告)号：US20160027875A1

    公开(公告)日：2016-01-28

    申请号：US14680458

    申请日：2015-04-07

    申请人： Seok-hoon Kim ,  Jin-bum Kim ,  Kwan-heum Lee ,  Byeong-chan Lee ,  Cho-eun Lee ,  Su-jin Jung

    发明人： Seok-hoon Kim ,  Jin-bum Kim ,  Kwan-heum Lee ,  Byeong-chan Lee ,  Cho-eun Lee ,  Su-jin Jung

    IPC分类号： H01L29/10 ,  H01L29/78

    CPC分类号： H01L29/7848 ,  H01L21/02236 ,  H01L21/02255 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/823431 ,  H01L21/823821 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/1033 ,  H01L29/1054 ,  H01L29/165 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/7831 ,  H01L29/785 ,  H01L29/7851 ,  H01L29/7856

    摘要： Semiconductor devices include a strain-inducing layer capable of applying a strain to a channel region of a transistor included in a miniaturized electronic device, and a method of manufacturing the semiconductor device. The semiconductor device includes a substrate having a channel region; a pair of source/drain regions provided on the substrate and arranged on both sides of the channel region in a first direction; and a gate structure provided on the channel region and comprising a gate electrode pattern extending in a second direction that is different from the first direction, a gate dielectric layer disposed between the channel region and the gate electrode pattern, and a gate spacer covering respective lateral surfaces of the gate electrode pattern and the gate dielectric layer. At least one of the source/drain regions includes a first strain-inducing layer and a second strain-inducing layer. The first strain-inducing layer is disposed between a lateral surface of the channel region and the second strain-inducing layer and contacts at least a portion of the gate dielectric layer.

    摘要翻译： 半导体器件包括能够对包括在小型化电子器件中的晶体管的沟道区域施加应变的应变诱导层以及半导体器件的制造方法。 半导体器件包括具有沟道区的衬底; 一对源极/漏极区，设置在所述衬底上并沿第一方向布置在所述沟道区的两侧; 以及栅极结构，设置在所述沟道区上并且包括在与所述第一方向不同的第二方向上延伸的栅极电极图案，设置在所述沟道区域和所述栅极电极图案之间的栅极介电层以及覆盖相应侧面的栅极间隔件 栅电极图案和栅介质层的表面。 源极/漏极区域中的至少一个包括第一应变诱导层和第二应变诱导层。 第一应变诱导层设置在沟道区的侧表面和第二应变诱导层之间，并与栅介质层的至少一部分接触。

    Non-Volatile Memory Devices and Methods of Manufacturing the Same
    9.
    发明申请
    Non-Volatile Memory Devices and Methods of Manufacturing the Same 审中-公开
    非易失性存储器件及其制造方法

    公开(公告)号：US20150099353A1

    公开(公告)日：2015-04-09

    申请号：US14568653

    申请日：2014-12-12

    申请人： Jung-Geun JEE ,  Seok-Hoon KIM ,  Su-Jin SHIN ,  Woo-Sung LEE ,  Tae-Ouk KWON

    发明人： Jung-Geun JEE ,  Seok-Hoon KIM ,  Su-Jin SHIN ,  Woo-Sung LEE ,  Tae-Ouk KWON

    IPC分类号： H01L27/115 ,  H01L21/28

    CPC分类号： H01L27/11558 ,  H01L21/2807 ,  H01L21/28273 ,  H01L21/28556 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42336 ,  H01L29/66825 ,  H01L29/7881

    摘要： A non-volatile memory device includes a field region that defines an active region in a semiconductor substrate, a floating gate pattern on the active region, a dielectric layer on the floating gate pattern and a control gate on the dielectric layer. The control gate includes a first conductive pattern that has a first composition that crystallizes in a first temperature range, and a second conductive pattern that has a second composition that is different from the first composition and that crystallizes in a second temperature range that is lower than the first temperature range, the first conductive pattern being between the dielectric layer and the second conductive pattern.

    摘要翻译： 非易失性存储器件包括限定半导体衬底中的有源区域的场区域，有源区域上的浮置栅极图案，浮置栅极图案上的介电层和介电层上的控制栅极。 控制栅极包括具有在第一温度范围内结晶的第一组成的第一导电图案和具有与第一组成不同的第二组成的第二导电图案，并且在低于第一组成的第二温度范围内结晶 第一温度范围，第一导电图案在介电层和第二导电图案之间。