公开(公告)号：US08575739B2

公开(公告)日：2013-11-05

申请号：US13102291

申请日：2011-05-06

Applicant: Suresh Upadhyayula ,  Ming Hsun Lee ,  Hem Takiar

Inventor： Suresh Upadhyayula ,  Ming Hsun Lee ,  Hem Takiar

IPC: H01L23/02

CPC classification number: H01L23/4951 ,  H01L23/49548 ,  H01L23/49575 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/32245 ,  H01L2224/48145 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/181 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A semiconductor package is disclosed including a leadframe, memory die and controller die, one or more of which are customized to facilitate electrical connection of the memory and controller die bond pads to the contact pads of the host device via the leadframe. By customizing one or more of the leadframe, memory die and controller die, an interposer layer normally required to connect the die in the semiconductor package with a host device may be omitted.

Abstract translation: 公开了一种半导体封装，其包括引线框架，存储器管芯和控制器管芯，其中一个或多个被定制以促进存储器和控制器管芯接合焊盘经由引线框架将电连接到主机设备的接触焊盘。 通过定制引线框，存储管芯和控制器管芯中的一个或多个，可以省略通常需要将半导体封装中的管芯与主机器件连接的插入层。

公开(公告)号：US08022417B2

公开(公告)日：2011-09-20

申请号：US12901787

申请日：2010-10-11

Applicant: Hem Takiar ,  Suresh Upadhyayula

Inventor： Hem Takiar ,  Suresh Upadhyayula

IPC: H01L27/15 ,  H01L29/161 ,  H01L31/12 ,  H01L31/153 ,  H01L33/00

CPC classification number: H01L24/97 ,  H01L25/167 ,  H01L2224/48227 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/30107 ,  Y10T29/49002 ,  H01L2924/00

Abstract: Methods of forming integrated circuit packages having an LED molded into the package, and the integrated circuit package formed thereby. An integrated circuit including one or more semiconductor die, passive components and an LED may be assembled on a panel. The one or more semiconductor die, passive components and LED may all then be encapsulated in a molding compound, and the integrated circuits then singularized to form individual integrated circuit packages. The integrated circuits are cut from the panel so that a portion of the lens of the LED is severed during the singularization process, and an end of the lens remaining within the package lies flush with an edge of the package to emit light outside of the package.

Abstract translation: 形成具有模制到封装中的LED的集成电路封装的方法和由此形成的集成电路封装。 包括一个或多个半导体管芯，无源部件和LED的集成电路可以组装在面板上。 一个或多个半导体管芯，无源部件和LED可以随后被封装在模制化合物中，然后将集成电路单数化以形成单独的集成电路封装。 集成电路从面板切割，使得在奇异化处理期间LED的透镜的一部分被切断，并且保留在封装内的透镜的端部与封装的边缘齐平以在封装外部发光 。

公开(公告)号：US20090166828A1

公开(公告)日：2009-07-02

申请号：US11966303

申请日：2007-12-28

Applicant: Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

Inventor： Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

IPC: H01L21/60 ,  H01L23/495

CPC classification number: H01L23/49541 ,  H01L23/49548 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.

Abstract translation: 公开了一种制造基于引线框的半导体封装的方法以及由此形成的半导体封装。 半导体封装包括引线框和固定到引线框的管芯焊盘的一个或多个半导体管芯。 引线框形成有多个电端子，其表面安装到主机PCB。 引线框还包括一个或多个延伸导线，其中至少一个包括导电岛，该导电岛用电端子表面安装到主机PCB。 岛屿有效地增加了封装内的数字端子，而不会增加封装的占位面积。

公开(公告)号：US08373268B2

公开(公告)日：2013-02-12

申请号：US12986927

申请日：2011-01-07

Applicant: Suresh Upadhyayula ,  Hem Takiar

Inventor： Suresh Upadhyayula ,  Hem Takiar

IPC: H01L23/34 ,  H01L23/48

CPC classification number: H01L25/50 ,  H01L21/561 ,  H01L24/06 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/86 ,  H01L25/0657 ,  H01L25/18 ,  H01L2224/0401 ,  H01L2224/05554 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/4912 ,  H01L2224/49175 ,  H01L2224/73265 ,  H01L2224/81205 ,  H01L2224/81801 ,  H01L2224/83 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/06575 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/12042 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00012

Abstract: A semiconductor package including a plurality of stacked semiconductor die, and methods of forming the semiconductor package, are disclosed. In order to ease wirebonding requirements on the controller die, the controller die may be mounted directly to the substrate in a flip chip arrangement requiring no wire bonds or footprint outside of the controller die. Thereafter, a spacer layer may be affixed to the substrate around the controller die to provide a level surface on which to mount one or more flash memory die. The spacer layer may be provided in a variety of different configurations.

公开(公告)号：US20110309485A1

公开(公告)日：2011-12-22

申请号：US13220354

申请日：2011-08-29

Applicant: Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

Inventor： Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

IPC: H01L23/495

CPC classification number: H01L23/49541 ,  H01L23/49548 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.

Abstract translation: 公开了一种制造基于引线框的半导体封装的方法以及由此形成的半导体封装。 半导体封装包括引线框和固定到引线框的管芯焊盘的一个或多个半导体管芯。 引线框形成有多个电端子，其表面安装到主机PCB。 引线框还包括一个或多个延伸导线，其中至少一个包括导电岛，该导电岛用电端子表面安装到主机PCB。 岛屿有效地增加了封装内的数字端子，而不会增加封装的占位面积。

公开(公告)号：US08947883B2

公开(公告)日：2015-02-03

申请号：US11965691

申请日：2007-12-27

Applicant: Suresh Upadhyayula ,  Robert C. Miller ,  Hem Takiar ,  Steven Sprouse ,  Ka Ian Yung

Inventor： Suresh Upadhyayula ,  Robert C. Miller ,  Hem Takiar ,  Steven Sprouse ,  Ka Ian Yung

IPC: H05K7/00 ,  G06K19/077 ,  H01L23/00

CPC classification number: H01L21/02 ,  G06K19/07732 ,  G06K19/07735 ,  G06K19/07743 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/85 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  Y10T29/41 ,  Y10T29/49117 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.

Abstract translation: 公开了一种低调USB闪存设备及其形成方法。 USB闪存设备包括集成电路存储器部分和USB连接器。 存储器部分和USB连接器可以整体地形成在同一基板上。 USB闪存设备包括一个基板，在该基板上安装有一个或多个闪存芯片，控制器芯片，无源元件和LED，用于指示何时访问存储器。 与使用安装在印刷电路板上的TSOP封装的现有技术的USB存储器装置相比，本发明的半导体管芯被固定到衬底上并以SIP构造接合。 省略封装的TSOP封装允许减少USB闪存设备的总体厚度。

公开(公告)号：US08659133B2

公开(公告)日：2014-02-25

申请号：US13220354

申请日：2011-08-29

Applicant: Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

Inventor： Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

IPC: H01L23/48 ,  H01L29/66

CPC classification number: H01L23/49541 ,  H01L23/49548 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.

Abstract translation: 公开了一种制造基于引线框的半导体封装的方法以及由此形成的半导体封装。 半导体封装包括引线框和固定到引线框的管芯焊盘的一个或多个半导体管芯。 引线框形成有多个电端子，其表面安装到主机PCB。 引线框还包括一个或多个延伸导线，其中至少一个包括导电岛，该导电岛用电端子表面安装到主机PCB。 岛屿有效地增加了封装内的数字端子，而不会增加封装的占位面积。

公开(公告)号：US08637779B2

公开(公告)日：2014-01-28

申请号：US13151145

申请日：2011-06-01

Applicant: Suresh Upadhyayula ,  Naveen Kini

Inventor： Suresh Upadhyayula ,  Naveen Kini

IPC: H01L23/488 ,  H05K1/11

CPC classification number: H01L23/49816 ,  H01L23/49838 ,  H01L24/73 ,  H01L2224/32145 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06562 ,  H01L2924/15311 ,  H05K1/111 ,  H05K3/3436 ,  H05K2201/09427 ,  H01L2924/00012

Abstract: A system of micro balls is disclosed for coupling an electronic component to a printed circuit board. The micro balls have a small diameter, and each contact pad may include an array of two or more micro balls. An example of a micro ball may include a polymer core, surrounded by a copper layer, which is in turn surrounded by a layer of solder.

Abstract translation: 公开了一种用于将电子部件耦合到印刷电路板的微球系统。 微球具有小直径，并且每个接触垫可以包括两个或更多个微球的阵列。 微球的例子可以包括由铜层包围的聚合物芯，该铜层又被一层焊料包围。

公开(公告)号：US08008132B2

公开(公告)日：2011-08-30

申请号：US11966303

申请日：2007-12-28

Applicant: Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

Inventor： Suresh Upadhyayula ,  Bonnie Ming-Yan Chan ,  Shih-Ping Fan-chiang ,  Hem Takiar

IPC: H01L21/00

CPC classification number: H01L23/49541 ,  H01L23/49548 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/85399 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2224/45099 ,  H01L2924/00 ,  H01L2924/00012

Abstract: A method of fabricating a leadframe-based semiconductor package, and a semiconductor package formed thereby, are disclosed. The semiconductor package includes a leadframe and one or more semiconductor die affixed to a die paddle of the leadframe. The leadframe is formed with a plurality of electrical terminals that get surface mounted to a host PCB. The leadframe further includes one or more extended leads, at least one of which includes an electrically conductive island which gets surface mounted to the host PCB with the electrical terminals. The islands effectively increase the number terminals within the package without adding footprint to the package.

Abstract translation: 公开了一种制造基于引线框的半导体封装的方法以及由此形成的半导体封装。 半导体封装包括引线框和固定到引线框的管芯焊盘的一个或多个半导体管芯。 引线框形成有多个电端子，其表面安装到主机PCB。 引线框还包括一个或多个延伸导线，其中至少一个包括导电岛，该导电岛用电端子表面安装到主机PCB。 岛屿有效地增加了封装内的数字端子，而不会增加封装的占位面积。

公开(公告)号：US20090165294A1

公开(公告)日：2009-07-02

申请号：US11965691

申请日：2007-12-27

Applicant: Suresh Upadhyayula ,  Robert C. Miller ,  Hem Takiar ,  Steven Sprouse ,  Ka Ian Yung

Inventor： Suresh Upadhyayula ,  Robert C. Miller ,  Hem Takiar ,  Steven Sprouse ,  Ka Ian Yung

IPC: H01R43/00 ,  H01R33/90

CPC classification number: H01L21/02 ,  G06K19/07732 ,  G06K19/07735 ,  G06K19/07743 ,  H01L24/48 ,  H01L24/49 ,  H01L24/85 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2224/85 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/3025 ,  Y10T29/41 ,  Y10T29/49117 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

Abstract: A low profile USB flash memory device, and methods of forming same, are disclosed. The USB flash memory device includes an integrated circuit memory portion and a USB connector. The memory portion and the USB connector may be integrally formed on the same substrate. The USB flash memory device includes a substrate on which is mounted one or more flash memory die, a controller die, passive components and an LED for indicating when the memory is being accessed. In contrast to prior art USB memory devices which used TSOP packages mounted on a printed circuit board, the semiconductor die of the present invention are affixed to the substrate and wire bonded in a SIP configuration. Omitting the encapsulated TSOP packages allows a reduction in the overall thickness of the USB flash memory device.

Abstract translation: 公开了一种低调USB闪存设备及其形成方法。 USB闪存设备包括集成电路存储器部分和USB连接器。 存储器部分和USB连接器可以整体地形成在同一基板上。 USB闪存设备包括一个基板，在该基板上安装有一个或多个闪存芯片，控制器芯片，无源元件和LED，用于指示何时访问存储器。 与使用安装在印刷电路板上的TSOP封装的现有技术的USB存储器装置相比，本发明的半导体管芯被固定到衬底上并以SIP构造接合。 省略封装的TSOP封装允许减少USB闪存设备的总体厚度。