公开(公告)号：US07166917B2

公开(公告)日：2007-01-23

申请号：US11028757

申请日：2005-01-05

申请人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

发明人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

IPC分类号： H01L23/34 ,  H01L23/02 ,  H01L23/06 ,  H01L23/04

CPC分类号： H01L23/13 ,  H01L23/3121 ,  H01L24/32 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/32014 ,  H01L2224/32057 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2224/83385 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/07802 ,  H01L2924/1515 ,  H01L2924/15153 ,  H01L2924/15159 ,  H01L2924/15165 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H05K1/023 ,  H05K1/183 ,  H05K2201/09036 ,  H05K2201/10515 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes a semiconductor device and a passive component mounted and electrically coupled to a substrate. The passive component is disposed within a cavity portion formed on an upper surface of the substrate and the semiconductor device is disposed across the cavity portion of the substrate above the passive component.

摘要翻译： 半导体封装包括半导体器件和安装并电耦合到衬底的无源器件。 无源部件设置在形成在基板的上表面上的空腔部分内，并且半导体器件横跨无源部件上方的基板的空腔部分设置​​。

公开(公告)号：US07656047B2

公开(公告)日：2010-02-02

申请号：US11898006

申请日：2007-09-07

申请人： Jun Young Yang ,  You Ock Joo ,  You Pil Jung

发明人： Jun Young Yang ,  You Ock Joo ,  You Pil Jung

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/29 ,  H01L21/561 ,  H01L23/3121 ,  H01L23/3135 ,  H01L23/552 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The electromagnetic interference shielding layer is a plated metal layer in contact with the package body, and the plated metal layer is connected to a ground trace extending on the upper surface of the substrate.

摘要翻译： 半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。 电磁干扰屏蔽层是与封装体接触的电镀金属层，并且电镀金属层连接到在基板的上表面上延伸的接地迹线。

公开(公告)号：US07633170B2

公开(公告)日：2009-12-15

申请号：US11028670

申请日：2005-01-05

申请人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

发明人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

摘要翻译： 半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。 本发明还提供了制造半导体器件封装的方法。

公开(公告)号：US07833837B2

公开(公告)日：2010-11-16

申请号：US11757795

申请日：2007-06-04

申请人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

发明人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

IPC分类号： H01L21/00

CPC分类号： H01L23/3114 ,  H01L24/11 ,  H01L24/13 ,  H01L2224/05001 ,  H01L2224/05026 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/11 ,  H01L2224/11334 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01087 ,  H01L2924/014 ,  H01L2924/07811 ,  H01L2924/14 ,  H01L2924/30107 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2224/05099

摘要： A chip scale package includes a patterned circuit layer attached to the active surface of a semiconductor chip through an anisotropic conductive adhesive layer such that contact pads on a lower surface of the patterned circuit layer are electrically coupled to corresponding bonding pads on the semiconductor chip. The patterned circuit layer has a plurality of openings formed therein at locations corresponding to the contact pads such that each of the contact pads has a portion exposed from an upper surface of the patterned circuit layer through the corresponding opening. A plurality of metal bumps are respectively disposed in the openings and mounted to the exposed portions of the contact pads for making external electrical connection. The present invention further provides a method for manufacturing the chip scale package at the wafer-level.

摘要翻译： 芯片级封装包括通过各向异性导电粘合剂层附着到半导体芯片的有源表面的图案化电路层，使得图案化电路层的下表面上的接触焊盘电耦合到半导体芯片上的对应焊盘。 图案化电路层在对应于接触焊盘的位置处具有形成在其中的多个开口，使得每个接触焊盘具有通过相应的开口从图案化电路层的上表面露出的部分。 多个金属凸块分别设置在开口中并安装到接触垫的暴露部分以进行外部电连接。 本发明还提供了一种在晶片级制造芯片级封装的方法。

公开(公告)号：US20050258518A1

公开(公告)日：2005-11-24

申请号：US10851170

申请日：2004-05-24

申请人： Jun-Young Yang ,  You-Ock Joo ,  Kwan-Yong Chung

发明人： Jun-Young Yang ,  You-Ock Joo ,  Kwan-Yong Chung

IPC分类号： H01L23/02 ,  H01L27/146 ,  H01L31/0203 ,  H01L31/0232

CPC分类号： H01L27/14625 ,  H01L24/73 ,  H01L27/14618 ,  H01L31/0203 ,  H01L31/02325 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/16195 ,  H01L2224/48091 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2924/00012

摘要： An image sensor package module with a leadless leadframe between chips includes a chip carrier, an image sensor chip, an integrated circuit chip, and a flexible printed circuit board. The chip carrier comprises a leadless leadframe and a pre-molded body. The leadless leadframe has a plurality of leads. The pre-molded body is completely filled among the leads and has a dam on the upper surfaces of the leads. The upper surfaces and lower surfaces of the leads are exposed on the pre-molded body. The image sensor chip is attached to the chip carrier inside the dam and electrically connected to the upper surfaces of the leads. The integrated circuit chip is mounted on the lower surfaces of the leads via bumps. The flexible printed circuit board is electrically connected to the leads for signal transmission.

摘要翻译： 具有芯片之间的无引线框架的图像传感器封装模块包括芯片载体，图像传感器芯片，集成电路芯片和柔性印刷电路板。 芯片载体包括无引线框架和预成型体。 无引线框架具有多个引线。 预成型体完全填充在引线之间，并且在引线的上表面上具有坝。 引线的上表面和下表面暴露在预成型体上。 图像传感器芯片安装在坝内的芯片载体上并电连接到引线的上表面。 集成电路芯片通过凸块安装在引线的下表面上。 柔性印刷电路板电连接到引线用于信号传输。

公开(公告)号：US07439098B2

公开(公告)日：2008-10-21

申请号：US11221812

申请日：2005-09-09

申请人： Jun-Young Yang ,  Tae-Seog Kim ,  You-Ock Joo

发明人： Jun-Young Yang ,  Tae-Seog Kim ,  You-Ock Joo

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/538 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/157 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package comprises a silicon substrate having an insulative surface; a patterned metal layer, formed on the insulative surface of the silicon substrate; an insulation layer formed on the patterned metal layer, and the patterned metal layer being partially exposed for functioning as at least a set of the device attaching pads and ball attaching pads; at least a device electrically connected to the set of the device attaching pads; a sealing compound for covering portions of the insulative surface of the silicon substrate and encapsulating the devices; and a plurality of solder balls attached to the set of ball attaching pads.

摘要翻译： 半导体封装包括具有绝缘表面的硅衬底; 形成在硅衬底的绝缘表面上的图案化金属层; 形成在所述图案化金属层上的绝缘层，并且所述图案化金属层被部分地暴露以用作至少一组所述装置附接垫和球附着垫; 至少一个电连接到该组装置连接焊盘的装置; 用于覆盖硅衬底的绝缘表面的部分并封装器件的密封化合物; 以及附接到所述一组球附着垫的多个焊球。

公开(公告)号：US07700411B2

公开(公告)日：2010-04-20

申请号：US11852079

申请日：2007-09-07

申请人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

发明人： Jun Young Yang ,  You Ock Joo ,  Dong Pil Jung

IPC分类号： H01L21/44 ,  H01L21/48

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper surface of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

摘要翻译： 半导体器件封装包括安装并电耦合到衬底的半导体器件，封装体，其将半导体器件封装在衬底的上表面的一部分上; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。 本发明还提供了制造半导体器件封装的方法。

公开(公告)号：US20080174013A1

公开(公告)日：2008-07-24

申请号：US12038621

申请日：2008-02-27

申请人： Jun Young YANG ,  You Ock JOO ,  Dong Pil JUNG

发明人： Jun Young YANG ,  You Ock JOO ,  Dong Pil JUNG

IPC分类号： H01L23/48

CPC分类号： H01L23/552 ,  H01L21/561 ,  H01L23/29 ,  H01L23/3121 ,  H01L23/3135 ,  H01L24/48 ,  H01L24/97 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/07802 ,  H01L2924/15787 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/19105 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/85 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor device package includes a semiconductor device mounted and electrically coupled to a substrate, a package body encapsulating the semiconductor device against a portion of an upper of the substrate; and an electromagnetic interference shielding layer formed over the package body and substantially enclosing the semiconductor device. The present invention further provides methods for manufacturing the semiconductor device package.

摘要翻译： 半导体器件封装包括安装并电耦合到衬底的半导体器件，将半导体器件封装在衬底的上部的一部分上的封装体; 以及形成在封装主体上并且基本上包围半导体器件的电磁干扰屏蔽层。 本发明还提供了制造半导体器件封装的方法。

公开(公告)号：US20070087471A1

公开(公告)日：2007-04-19

申请号：US11221812

申请日：2005-09-09

申请人： Jun-Young Yang ,  Tae-Suk Kim ,  You-Ock Joo

发明人： Jun-Young Yang ,  Tae-Suk Kim ,  You-Ock Joo

IPC分类号： H01L21/00

CPC分类号： H01L25/50 ,  H01L23/3128 ,  H01L23/538 ,  H01L24/73 ,  H01L25/0655 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32014 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/10253 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/157 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/00014 ,  H01L2924/00012 ,  H01L2924/00

摘要： A semiconductor package comprises a silicon substrate having an insulative surface; a patterned metal layer, formed on the insulative surface of the silicon substrate; an insulation layer formed on the patterned metal layer, and the patterned metal layer being partially exposed for functioning as at least a set of the device attaching pads and ball attaching pads; at least a device electrically connected to the set of the device attaching pads; a sealing compound for covering portions of the insulative surface of the silicon substrate and encapsulating the devices; and a plurality of solder balls attached to the set of ball attaching pads.

摘要翻译： 半导体封装包括具有绝缘表面的硅衬底; 形成在硅衬底的绝缘表面上的图案化金属层; 形成在所述图案化金属层上的绝缘层，并且所述图案化金属层被部分地暴露以用作至少一组所述装置附接垫和球附着垫; 至少一个电连接到该组装置连接焊盘的装置; 用于覆盖硅衬底的绝缘表面的部分并封装器件的密封化合物; 以及附接到所述一组球附着垫的多个焊球。

公开(公告)号：US20060216868A1

公开(公告)日：2006-09-28

申请号：US11088773

申请日：2005-03-25

申请人： Jun-Young Yang ,  You-Ock Joo ,  Chang-Kyu Ahn ,  Jung-Tae Kim ,  Sung-Sig Kang

发明人： Jun-Young Yang ,  You-Ock Joo ,  Chang-Kyu Ahn ,  Jung-Tae Kim ,  Sung-Sig Kang

IPC分类号： H01L21/00

CPC分类号： H01L23/5389 ,  H01L23/3114 ,  H01L24/19 ,  H01L24/48 ,  H01L24/73 ,  H01L24/82 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/16 ,  H01L2224/16145 ,  H01L2224/32145 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/73209 ,  H01L2224/73217 ,  H01L2224/73265 ,  H01L2224/73267 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2225/06506 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/181 ,  H01L2924/3025 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2224/85 ,  H01L2224/81 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： The fabrication and device of package structure with a plurality of conductive contacts are provided herein. At least one chip is attached among the conductive pads on the surface of a wafer. A number of conductive wires are attached on the conductive pads and encapsulated by a layer. The layer is removed from the top thereof until to expose the conductive contacts derived from the conductive wires.

摘要翻译： 本文提供具有多个导电触点的封装结构的制造和器件。 在晶片表面的导电焊盘中至少安装一个芯片。 多个导线附着在导电焊盘上并被一层封装。 该层从其顶部移除，直到暴露出从导线导出的导电接触点。