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    Thin layer structure and method of forming the same
    3.
    发明授权
    Thin layer structure and method of forming the same 失效
    薄层结构及其形成方法

    公开(公告)号：US07534704B2

    公开(公告)日：2009-05-19

    申请号：US11449839

    申请日：2006-06-09

    Applicant: Jae-Kyu Ha ,  Jun Seo ,  Min-Chul Chae ,  Yong-Sun Ko ,  Young-Mi Lee ,  Jae-Seung Hwang

    Inventor： Jae-Kyu Ha ,  Jun Seo ,  Min-Chul Chae ,  Yong-Sun Ko ,  Young-Mi Lee ,  Jae-Seung Hwang

    IPC: H01L21/20

    CPC classification number: H01L21/84 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/02667 ,  H01L21/76262 ,  H01L27/1203

    Abstract: In a thin layer structure and a method of forming the same, a first preliminary insulation pattern is formed on a substrate and includes a first opening exposing the substrate. One or more preliminary seed patterns including single crystalline silicon are formed in the first opening. A second insulation layer is formed on the first preliminary insulation pattern and the one or more preliminary seed patterns. A second insulation pattern, a first insulation pattern and one or more seed patterns are formed by etching the first and second insulation layers and the one or more preliminary seed patterns. The second insulation pattern includes a second opening having a flat bottom portion. A single crystalline silicon pattern is formed in the second opening, wherein a central thickness of the single crystalline silicon pattern is substantially identical to a peripheral thickness thereof, thereby reducing or preventing a thinning defect in a semiconductor device.

    Abstract translation: 在薄层结构及其形成方法中，在基板上形成第一预备绝缘图案，并且包括暴露基板的第一开口。 在第一开口中形成包括单晶硅的一种或多种初步种子图案。 在第一预备绝缘图案和一个或多个初步种子图案上形成第二绝缘层。 通过蚀刻第一和第二绝缘层和一个或多个初步种子图案来形成第二绝缘图案，第一绝缘图案和一个或多个种子图案。 第二绝缘图案包括具有平坦底部的第二开口。 在第二开口中形成单晶硅图案，其中单晶硅图案的中心厚度与其周边厚度基本相同，从而减少或防止半导体器件中的变薄缺陷。

    Printed circuit board
    4.
    发明申请
    Printed circuit board 审中-公开
    印刷电路板

    公开(公告)号：US20090097220A1

    公开(公告)日：2009-04-16

    申请号：US12010749

    申请日：2008-01-29

    Applicant: Young-Mi Lee ,  Suk-Chang Hong ,  Yong-Bin Lee ,  Chin-Kwan Kim

    Inventor： Young-Mi Lee ,  Suk-Chang Hong ,  Yong-Bin Lee ,  Chin-Kwan Kim

    IPC: H05K1/02

    CPC classification number: H05K3/3452 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/05552 ,  H01L2224/05567 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10734 ,  H05K2203/041 ,  H01L2924/00012

    Abstract: A printed circuit board is disclosed. The printed circuit board, which has at least one pad on which a solder ball is to be placed, includes a solder resist that covers a surface of the printed circuit board, an opening part that exposes the pad and supports the solder ball, and an extended portion formed in a perimeter of the opening part that allows an underfill to flow in between the printed circuit board and the solder ball. With this printed circuit board, the underfill can be filled in more readily between the printed circuit board and the solder balls, when mounting a component on the printed circuit board.

    Abstract translation: 公开了印刷电路板。 具有至少一个其上要放置焊球的焊盘的印刷电路板包括覆盖印刷电路板的表面的阻焊剂，露出焊盘并支撑焊球的开口部分，以及 延伸部分形成在开口部分的周边，允许底部填充物在印刷电路板和焊球之间流动。 使用该印刷电路板，当将部件安装在印刷电路板上时，底部填充物可以更容易地填充在印刷电路板和焊球之间。

    Food Grade Thermophilic Arabinose Isomerase Expressed from Gras, and Tagatose Manufacturing Method By Using It
    5.
    发明申请
    Food Grade Thermophilic Arabinose Isomerase Expressed from Gras, and Tagatose Manufacturing Method By Using It 审中-公开
    食品级嗜热阿拉伯糖异构酶表达从Gras和Tagatose制造方法使用它

    公开(公告)号：US20080124771A1

    公开(公告)日：2008-05-29

    申请号：US11564936

    申请日：2006-11-30

    Applicant: Seong-bo Kim ,  Young-mi Lee ,  Seung-won Park ,  Jung-hoon Kim ,  Sang-hoon Song ,  Kang-pyo Lee

    Inventor： Seong-bo Kim ,  Young-mi Lee ,  Seung-won Park ,  Jung-hoon Kim ,  Sang-hoon Song ,  Kang-pyo Lee

    IPC: C12P19/24 ,  C12N9/90

    CPC classification number: C12N9/90 ,  C12P19/24

    Abstract: The present invention relates to a thermophilic arabinose isomerase and a method of manufacturing tagatose using the same, and more precisely, a gene encoding arabinose isomerase originating from the thermophile Geobacillus stearothermophilus DSM22, a recombinant expression vector containing the gene, a method of preparing a food grade thermophilic arabinose isomerase from the recombinant GRAS (Generally Recognized As Safe) strain transformed with the said expression vector, and a method of preparing tagatose from galactose using the said enzyme.

    Abstract translation: 本发明涉及嗜热阿拉伯糖异构酶和使用其制备塔格糖的方法，更确切地说，编码来源于嗜热土嗜热脂肪芽孢杆菌DSM22的阿拉伯糖异构酶的基因，含该基因的重组表达载体，制备食物的方法 由所述表达载体转化的重组GRAS（通常认可的安全）菌株的高级嗜热阿拉伯糖异构酶，以及使用所述酶从半乳糖制备塔格糖的方法。

    Methods of fabricating semiconductor device including fin-fet
    8.
    发明授权
    Methods of fabricating semiconductor device including fin-fet 失效
    制造半导体器件的方法包括鳍片

    公开(公告)号：US07745290B2

    公开(公告)日：2010-06-29

    申请号：US11773372

    申请日：2007-07-03

    Applicant: Jun Seo ,  Jong-Heui Song ,  Jae-Seung Hwang ,  Min-Chul Chae ,  Woo-Jin Cho ,  Yun-Seung Kang ,  Young-Mi Lee

    Inventor： Jun Seo ,  Jong-Heui Song ,  Jae-Seung Hwang ,  Min-Chul Chae ,  Woo-Jin Cho ,  Yun-Seung Kang ,  Young-Mi Lee

    IPC: H01L21/336

    CPC classification number: H01L29/66795 ,  H01L29/7851

    Abstract: A method of fabricating a semiconductor device including a fin field effect transistor (Fin-FET) includes forming sacrificial bars on a semiconductor substrate, patterning the sacrificial bars to form sacrificial islands on the semiconductor substrate, forming a device isolation layer to fill a space between the sacrificial islands, selectively removing the sacrificial islands to expose the semiconductor substrate below the sacrificial islands, and anisotropically etching the exposed semiconductor substrate using the device isolation layer as an etch mask to form a recessed channel region. The recessed channel region allows the channel width and channel length of a transistor to be increased, thereby reducing the occurrence of short channel effects and narrow channel effects in highly integrated semiconductor devices.

    Abstract translation: 一种制造包括鳍状场效应晶体管（Fin-FET）的半导体器件的方法包括：在半导体衬底上形成牺牲棒，对牺牲棒进行构图以在半导体衬底上形成牺牲岛，形成器件隔离层以填充第 牺牲岛，选择性地去除牺牲岛以将牺牲岛下方的半导体衬底暴露出来，并且使用器件隔离层作为蚀刻掩模来各向异性蚀刻暴露的半导体衬底以形成凹陷沟道区。 凹陷沟道区域允许晶体管的沟道宽度和沟道长度增加，从而减少在高度集成的半导体器件中的短沟道效应和窄沟道效应的发生。

    NON-VOLATILE MEMORY DEVICE FOR 2-BIT OPERATION AND METHOD OF FABRICATING THE SAME
    9.
    发明申请
    NON-VOLATILE MEMORY DEVICE FOR 2-BIT OPERATION AND METHOD OF FABRICATING THE SAME 有权
    用于2位操作的非易失性存储器件及其制造方法

    公开(公告)号：US20100117140A1

    公开(公告)日：2010-05-13

    申请号：US12692197

    申请日：2010-01-22

    Applicant: Byung-yong Choi ,  Dong-gun Park ,  Yun-gi Kim ,  Choong-ho Lee ,  Young-mi Lee ,  Hye-jin Cho

    Inventor： Byung-yong Choi ,  Dong-gun Park ,  Yun-gi Kim ,  Choong-ho Lee ,  Young-mi Lee ,  Hye-jin Cho

    IPC: H01L29/792

    CPC classification number: H01L27/11568 ,  H01L21/28273 ,  H01L21/28282 ,  H01L27/0207 ,  H01L27/115 ,  H01L27/11519 ,  H01L27/11521 ,  H01L29/7887 ,  H01L29/7923

    Abstract: A non-volatile memory device for 2-bit operation and a method of fabricating the same are provided. The non-volatile memory device includes an active region and a gate extending in a word line direction on a semiconductor substrate, and crossing each other repeatedly; a charge storage layer disposed below the gate, and confined at a portion where the gate and the active region cross; a charge blocking layer formed on the charge storage layer; a tunnel dielectric layer formed below the charge storage layer; first and second source/drain regions formed in the active region exposed by the gate; and first and second bit lines crossing the word line direction. The active region may be formed in a first zigzag pattern and/or the gate may be formed in a second zigzag pattern in symmetry with the first zigzag pattern.

    Abstract translation: 提供一种用于2位操作的非易失性存储器件及其制造方法。 非易失性存储器件包括在半导体衬底上沿着字线方向延伸的有源区和栅极，并且重复地交叉; 电荷存储层，设置在所述栅极的下方，并限制在所述栅极和所述有源区域交叉的部分; 形成在电荷存储层上的电荷阻挡层; 形成在电荷存储层下面的隧道介电层; 在由栅极暴露的有源区中形成的第一和第二源/漏区; 以及与字线方向交叉的第一和第二位线。 有源区可以形成为第一之字形图案和/或栅极可以以与第一曲折图案对称的第二曲折图案形成。

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