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公开(公告)号:US12237171B1
公开(公告)日:2025-02-25
申请号:US18379228
申请日:2023-10-12
Applicant: ASM IP Holding B.V.
Inventor: Giuseppe Alessio Verni , Qi Xie , Henri Jussila , Charles Dezelah , Jiyeon Kim , Eric James Shero , Paul Ma
IPC: H01L21/285 , H01L29/49
Abstract: Methods and systems for depositing vanadium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium nitride layer onto a surface of the substrate. The cyclical deposition process can include providing a vanadium halide precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process.
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公开(公告)号:US20230298902A1
公开(公告)日:2023-09-21
申请号:US18121064
申请日:2023-03-14
Applicant: ASM IP HOLDING B.V.
Inventor: Jiyeon Kim , Petri Raisanen , Dong Li , Eric James Shero
IPC: H01L21/3205 , H01L29/40 , H01L21/02 , H01L21/285
CPC classification number: H01L21/32051 , H01L29/401 , H01L21/02046 , H01L21/28556
Abstract: Disclosed herein are systems and methods method for thin film deposition of molybdenum for source/drain formation. A deposition process may be performed in which the surface is contacted in the reaction chamber with a first oxygen-free molybdenum halide reactant at a first temperature, wherein said contacting with the first oxygen-free molybdenum halide reactant forms at least one layer of molybdenum on the substrate. In some embodiments, the temperature of the reaction chamber may be raised from the first temperature to a second temperature. In some embodiments, the substrate in the reaction chamber may be contacted with a second oxygen-free molybdenum halide reactant at the second temperature, wherein said contacting with the second oxygen-free molybdenum halide reactant forms at least one layer of molybdenum on the substrate. In some embodiments, the deposition at the second temperature may be repeated until a molybdenum-containing film of desired thickness is formed.
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公开(公告)号:US20240425987A1
公开(公告)日:2024-12-26
申请号:US18746191
申请日:2024-06-18
Applicant: ASM IP Holding B.V.
Inventor: Qi Qi , Rajmohan Muthaiah , Shubham Garg , Jaebeom Lee , YoungChol Byun , Daniel Maurice , Nirmal Gokuldas Waykole , Jiyeon Kim , Jacqueline Wrench , Neelam Sheoran , Guannan Chen
IPC: C23C16/455
Abstract: Various embodiments of the present technology may provide a showerhead assembly that includes a showerhead plate having a plurality of through-holes. Each through-hole has a conical-shaped inlet and a conical-shaped outlet. The showerhead plate may include through-holes in a center region having first dimensions and through-holes in an outer region having second dimensions that are different from the first dimensions.
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公开(公告)号:US11854876B2
公开(公告)日:2023-12-26
申请号:US17110709
申请日:2020-12-03
Applicant: ASM IP Holding B.V.
Inventor: Chiyu Zhu , Shinya Iwashita , Jan Willem Maes , Jiyeon Kim
IPC: H01L21/768 , H01L21/67 , C23C16/46 , C23C16/455 , C23C16/34 , C23C16/06 , C23C16/52
CPC classification number: H01L21/76876 , C23C16/06 , C23C16/34 , C23C16/45546 , C23C16/463 , C23C16/52 , H01L21/67167 , H01L21/76864
Abstract: Systems and methods are described for depositing a TiN liner layer and a cobalt seed layer on a semiconductor wafer in a cobalt metallization process. In some embodiments the wafer is cooled after deposition of the TiN liner layer and/or the cobalt seed layer. In some embodiments the TiN liner layer and cobalt seed layer are deposited in process modules that are part of a semiconductor processing apparatus that also includes one or more modules for cooling the substrate. In some embodiments the cobalt seed layer may comprise a mixture of TiN and cobalt, a nanolaminate of TiN and cobalt layers or a graded TiN/Co layer.
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公开(公告)号:US20200263297A1
公开(公告)日:2020-08-20
申请号:US16748299
申请日:2020-01-21
Applicant: ASM IP Holding B.V.
Inventor: Henri Jussila , Chiyu Zhu , Qi Xie , Jiyeon Kim , Tom E. Blomberg
IPC: C23C16/455 , H01L21/02 , C23C16/34 , C23C16/40
Abstract: Vapor deposition processes such as atomic layer deposition (ALD) processes employing a deposition enhancing precursor can be used to form a variety of oxide and nitride films, including metal oxide, metal nitride, metal oxynitride, silicon oxide and silicon nitride films. For example, the methods can be used to deposit transition metal nitrides, transition metal oxides, and silicon oxides and nitrides. In some embodiments the deposition enhancing precursor comprises a Group II metal such as Mg, Sr, Ba or Ca. Atomic layer deposition processes may comprise a deposition cycle comprising a first sub-cycle in which a substrate is contacted with a deposition enhancing precursor and an oxygen or nitrogen reactant and a second sub-cycle in which the substrate is contacted with a metal or silicon precursor and an oxygen or nitrogen reactant. In some embodiments the methods advantageously enable improved thin film formation, for example increased deposition rates.
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公开(公告)号:US20230349040A1
公开(公告)日:2023-11-02
申请号:US18141694
申请日:2023-05-01
Applicant: ASM IP Holding B.V.
Inventor: Moataz Bellah Mousa , Jiyeon Kim , Jaebeom Lee , Charith Eranga Nanayakkara , Paul Ma , Chuandao Wang , YoungChol Byun , Jacqueline Wrench , Guannan Chen
IPC: C23C16/22 , C23C16/455 , C23C16/04 , C23C16/06
CPC classification number: C23C16/22 , C23C16/45525 , C23C16/045 , C23C16/06
Abstract: A method and system for forming a structure are disclosed. An exemplary method includes providing a substrate comprising a plurality of gaps within a first reaction chamber, forming a doped adhesion film on the surface of a substrate and within the plurality of gaps, wherein the doped adhesion film comprises a first material and a second material, and depositing a metal overlying the doped adhesion film. Exemplary methods can further include a step of depositing a nucleation layer overlying the doped adhesion film. An exemplary system can perform the method of forming the structure.
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公开(公告)号:US20220165575A1
公开(公告)日:2022-05-26
申请号:US17529562
申请日:2021-11-18
Applicant: ASM IP Holding B.V.
Inventor: Qi Xie , Giuseppe Alessio Verni , Tatiana Ivanova , Perttu Sippola , Michael Eugene Givens , Eric Shero , Jiyeon Kim , Charles Dezelah , Petro Deminskyi , Ren-Jie Chang
IPC: H01L21/28 , H01L21/02 , C23C16/52 , C23C16/455
Abstract: Methods and systems for depositing threshold voltage shifting layers onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a threshold voltage shifting layer onto a surface of the substrate.
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公开(公告)号:US20210335612A1
公开(公告)日:2021-10-28
申请号:US17235985
申请日:2021-04-21
Applicant: ASM IP Holding B.V
Inventor: Petro Deminskyi , Charles Dezelah , Jiyeon Kim , Giuseppe Alessio Verni , Maart Van Druenen , Qi Xie , Petri Räisänen
IPC: H01L21/28 , H01L29/49 , C23C16/38 , C23C16/455 , C23C16/50
Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
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9.
公开(公告)号:US20210180184A1
公开(公告)日:2021-06-17
申请号:US17113242
申请日:2020-12-07
Applicant: ASM IP Holding B.V.
Inventor: Giuseppe Alessio Verni , Qi Xie , Henri Jussila , Charles Dezelah , Jiyeon Kim , Eric James Shero , Paul Ma
IPC: C23C16/34 , C23C16/455 , C23C16/52 , H01L29/43
Abstract: Methods and systems for depositing vanadium nitride layers onto a surface of the substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a cyclical deposition process, depositing a vanadium nitride layer onto a surface of the substrate. The cyclical deposition process can include providing a vanadium halide precursor to the reaction chamber and separately providing a nitrogen reactant to the reaction chamber. The cyclical deposition process may desirably be a thermal cyclical deposition process.
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公开(公告)号:US12243747B2
公开(公告)日:2025-03-04
申请号:US17235985
申请日:2021-04-21
Applicant: ASM IP Holding B.V.
Inventor: Petro Deminskyi , Charles Dezelah , Jiyeon Kim , Giuseppe Alessio Verni , Maart Van Druenen , Qi Xie , Petri Räisänen
IPC: H01L21/28 , C23C16/38 , C23C16/455 , C23C16/50 , H01L29/49
Abstract: Methods and systems for depositing a layer, comprising one or more of vanadium boride and vanadium phosphide, onto a surface of a substrate and structures and devices formed using the methods are disclosed. An exemplary method includes using a deposition process. The deposition process can include providing a vanadium precursor to the reaction chamber and separately providing a reactant to the reaction chamber. Exemplary structures can include field effect transistor structures, such as gate all around structures. The layer comprising one or more of vanadium boride and vanadium phosphide can be used, for example, as barrier layers or liners, as work function layers, as dipole shifter layers, or the like.
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