公开(公告)号：US20230340663A1

公开(公告)日：2023-10-26

申请号：US18137930

申请日：2023-04-21

Applicant: ASM IP Holding B.V.

Inventor： Fanyong Ran ,  Zecheng Liu ,  Tomohiro Kubota ,  Takashi Yoshida ,  Kai Okabe

IPC: C23C16/455 ,  C23C16/32 ,  C23C16/52

CPC classification number: C23C16/32 ,  C23C16/45531 ,  C23C16/4554 ,  C23C16/45553 ,  C23C16/52

Abstract: Methods of forming a silicon oxycarbide layer on a surface of a substrate are disclosed. Exemplary methods include providing an oxygen-free reactant to a reaction chamber and performing one or more deposition cycles, wherein each deposition cycle includes providing a silicon precursor to the reaction chamber for a silicon precursor pulse period and providing plasma power for a plasma power period to form the silicon oxycarbide layer. Exemplary silicon precursors comprise a molecule comprising silicon, oxygen, carbon, and optionally nitrogen. The silicon precursor can further include one or more of (i) one or two silicon-oxygen bonds, (ii) one or two silicon-carbon bonds, or (iii) one carbon-carbon double bond.

公开(公告)号：US20230235453A1

公开(公告)日：2023-07-27

申请号：US18149744

申请日：2023-01-04

Applicant: ASM IP Holding B.V.

Inventor： Takashi Yoshida ,  Kai Okabe ,  Zecheng Liu

IPC: C23C16/40 ,  C23C16/513

CPC classification number: C23C16/401 ,  C23C16/513

Abstract: Methods of forming a silicon oxycarbide layer on a surface of a substrate are disclosed. Exemplary methods include providing an oxygen-free reactant to a reaction chamber and performing one or more deposition cycles, wherein each deposition cycle includes providing a silicon precursor to the reaction chamber for a silicon precursor pulse period and providing pulsed plasma power for a plasma power period to form the silicon oxycarbide layer.

公开(公告)号：US11551912B2

公开(公告)日：2023-01-10

申请号：US17151219

申请日：2021-01-18

Applicant: ASM IP Holding B.V.

Inventor： Takashi Yoshida

IPC: H01L21/02 ,  H01J37/32

Abstract: A method including: a plasma contact step including supplying treatment gas including a reactant gas into a chamber, activating a reactant component included in the treatment gas by generating plasma from the reactant component by applying high-frequency power, and bringing the treatment gas including the reactant component activated into contact with the surface of the substrate, in which in the plasma contact step, a first plasma generation condition in which stable plasma is generated by applying high-frequency power of a first power level while supplying treatment gas of a first concentration is changed to a second plasma generation condition in which a desired thin film is obtained by performing at least one of increasing the high-frequency power to a second power level and gradually decreasing the treatment gas to a second concentration, and of gradually increasing the high-frequency power to the second power level, and abnormal electrical discharge is suppressed.

公开(公告)号：US20220350248A1

公开(公告)日：2022-11-03

申请号：US17724457

申请日：2022-04-19

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Takashi Yoshida ,  Tomohiro Kubota ,  Hideaki Fukuda

IPC: G03F7/11 ,  H01L21/033 ,  H01J37/32 ,  C23C16/455 ,  C23C16/02 ,  C23C16/50 ,  C23C16/52

Abstract: Methods of forming structures including a photoresist underlayer and an adhesion layer and structures including the photoresist underlayer and adhesion layer are disclosed. Exemplary methods include forming the photoresist underlayer and forming an adhesion layer using a cyclical deposition process. The adhesion layer can be formed within the same reaction chamber used to form the photoresist underlayer.

公开(公告)号：US20220216059A1

公开(公告)日：2022-07-07

申请号：US17568027

申请日：2022-01-04

Applicant: ASM IP Holding B.V.

Inventor： Zecheng Liu ,  Takashi Yoshida ,  Ryu Nakano ,  Ivan Zyulkov ,  Yiting Sun ,  Yoann Francis Tomczak ,  David de Roest

IPC: H01L21/285 ,  H01L21/02 ,  H01J37/32 ,  C23C16/455 ,  C23C16/50 ,  C23C16/02 ,  C23C16/52

Abstract: Methods and related systems for lithographically defining patterns on a substrate are disclosed. An exemplary method includes forming a structure. The method includes providing a substrate to a reaction chamber. The substrate comprises a semiconductor and a surface layer. The surface layer comprises amorphous carbon. The method further comprises forming a barrier layer on the surface layer and depositing a metal-containing layer on the substrate. The metal- containing layer comprises oxygen and a metal.

公开(公告)号：US20230407465A1

公开(公告)日：2023-12-21

申请号：US18209640

申请日：2023-06-14

Applicant: ASM IP Holding B.V.

Inventor： Takashi Yoshida

IPC: C23C16/36 ,  H01L21/02 ,  C23C16/32 ,  C23C16/455 ,  C23C16/50

CPC classification number: C23C16/36 ,  H01L21/022 ,  H01L21/02126 ,  H01L21/02167 ,  H01L21/02274 ,  H01L21/0228 ,  C23C16/325 ,  C23C16/45536 ,  C23C16/50 ,  C23C16/45529 ,  H01L21/02211 ,  H01L21/02214 ,  H01L21/02219

Abstract: A method of forming a silicon oxycarbonitride layer on a substrate is disclosed. An exemplary method includes forming a layer comprising SiOC and forming a layer comprising SiCN, which together form the silicon oxycarbonitride layer.

公开(公告)号：US20230349043A1

公开(公告)日：2023-11-02

申请号：US18207806

申请日：2023-06-09

Applicant: ASM IP Holding B.V.

Inventor： Takashi Yoshida ,  René Vervuurt

IPC: C23C16/455 ,  C23C16/52 ,  C23C16/458

CPC classification number: C23C16/45553 ,  C23C16/45502 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/458 ,  C23C16/52 ,  C23C16/308

Abstract: Methods of forming metal silicon oxide layers and metal silicon oxynitride layers are disclosed. Exemplary methods include providing a silicon precursor to the reaction chamber for a silicon precursor pulse period, providing a first metal precursor to the reaction chamber for a first metal precursor pulse period, and providing a first reactant to the reaction chamber for a first reactant pulse period, wherein the silicon precursor pulse period and the first metal precursor pulse period overlap.

公开(公告)号：US20220064795A1

公开(公告)日：2022-03-03

申请号：US17408940

申请日：2021-08-23

Applicant: ASM IP Holding B.V.

Inventor： Takashi Yoshida ,  René Vervuurt

IPC: C23C16/455 ,  C23C16/458 ,  C23C16/52

Abstract: Methods of forming metal silicon oxide layers and metal silicon oxynitride layers are disclosed. Exemplary methods include providing a silicon precursor to the reaction chamber for a silicon precursor pulse period, providing a first metal precursor to the reaction chamber for a first metal precursor pulse period, and providing a first reactant to the reaction chamber for a first reactant pulse period, wherein the silicon precursor pulse period and the first metal precursor pulse period overlap.

公开(公告)号：US11725280B2

公开(公告)日：2023-08-15

申请号：US17408940

申请日：2021-08-23

Applicant: ASM IP Holding B.V.

Inventor： Takashi Yoshida ,  René Vervuurt

IPC: C23C16/40 ,  C23C16/455 ,  C23C16/458 ,  C23C16/52 ,  C23C16/30

CPC classification number: C23C16/45553 ,  C23C16/458 ,  C23C16/45502 ,  C23C16/45534 ,  C23C16/45542 ,  C23C16/52 ,  C23C16/308 ,  C23C16/402

Abstract: Methods of forming metal silicon oxide layers and metal silicon oxynitride layers are disclosed. Exemplary methods include providing a silicon precursor to the reaction chamber for a silicon precursor pulse period, providing a first metal precursor to the reaction chamber for a first metal precursor pulse period, and providing a first reactant to the reaction chamber for a first reactant pulse period, wherein the silicon precursor pulse period and the first metal precursor pulse period overlap.

公开(公告)号：US10770257B2

公开(公告)日：2020-09-08

申请号：US16040755

申请日：2018-07-20

Applicant: ASM IP Holding B.V.

Inventor： Yuko Kengoyama ,  Takashi Yoshida

IPC: H05H1/46 ,  H01J37/02 ,  C23C16/56 ,  C23C16/509 ,  H01L21/687 ,  H01L21/3065 ,  H01L21/31

Abstract: Examples of a substrate processing method include subjecting a substrate placed on a susceptor to plasma processing, applying power to an RF electrode facing the susceptor for only a predetermined static electricity removal time to generate plasma, thereby reducing an amount of charge of the substrate, measuring a self-bias voltage of the RF electrode while susceptor pins are made to protrude from a top surface of the susceptor and lift up the substrate, and by a controller, shortening the static electricity removal time when the self-bias voltage has a positive value, and lengthening the static electricity removal time when the self-bias voltage has a negative value.