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公开(公告)号：US20060131724A1
公开(公告)日：2006-06-22
申请号：US11314039
申请日：2005-12-20
申请人： Akihiro Sato , Satoru Sekiguchi , Kiyokazu Kamado , Kazunari Kurokawa , Makoto Tsubonoya , Kiyoshi Mita , Yoichi Nabeta , Tetsuro Sawai , Toshikazu Imaoka
发明人： Akihiro Sato , Satoru Sekiguchi , Kiyokazu Kamado , Kazunari Kurokawa , Makoto Tsubonoya , Kiyoshi Mita , Yoichi Nabeta , Tetsuro Sawai , Toshikazu Imaoka
IPC分类号： H01L23/48
CPC分类号： H01L23/645 , H01F2017/008 , H01F2017/0086 , H01L23/49827 , H01L23/49838 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/16 , H01L2224/32225 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/07802 , H01L2924/12034 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19106 , H01L2924/30107 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor apparatus comprises a substrate, a semiconductor chip fixedly secured on one side of the substrate, a spirally shaped coil formed on the other side of the substrate and electrically connected to the semiconductor chip, and a conductive pattern formed on a surface of the one side of the substrate facing to the semiconductor chip for stabilizing an inductance characteristic of the coil.
摘要翻译： 一种半导体装置，包括基板，固定在基板的一侧的半导体芯片，形成在基板的另一侧并与半导体芯片电连接的螺旋形线圈，以及形成在该基板的表面上的导电图案 面向半导体芯片的衬底的侧面，用于稳定线圈的电感特性。
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公开(公告)号：US07432580B2
公开(公告)日：2008-10-07
申请号：US11314039
申请日：2005-12-20
申请人： Akihiro Sato , Satoru Sekiguchi , Kiyokazu Kamado , Kazunari Kurokawa , Makoto Tsubonoya , Kiyoshi Mita , Yoichi Nabeta , Tetsuro Sawai , Toshikazu Imaoka
发明人： Akihiro Sato , Satoru Sekiguchi , Kiyokazu Kamado , Kazunari Kurokawa , Makoto Tsubonoya , Kiyoshi Mita , Yoichi Nabeta , Tetsuro Sawai , Toshikazu Imaoka
CPC分类号： H01L23/645 , H01F2017/008 , H01F2017/0086 , H01L23/49827 , H01L23/49838 , H01L23/552 , H01L24/48 , H01L24/49 , H01L24/73 , H01L25/16 , H01L2224/32225 , H01L2224/48227 , H01L2224/48228 , H01L2224/48465 , H01L2224/49171 , H01L2224/73265 , H01L2924/00014 , H01L2924/07802 , H01L2924/12034 , H01L2924/15183 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19106 , H01L2924/30107 , H01L2924/3025 , H01L2924/00012 , H01L2924/00 , H01L2224/45099 , H01L2224/45015 , H01L2924/207
摘要： A semiconductor apparatus comprises a substrate, a semiconductor chip fixedly secured on one side of the substrate, a spirally shaped coil formed on the other side of the substrate and electrically connected to the semiconductor chip, and a conductive pattern formed on a surface of the one side of the substrate facing to the semiconductor chip for stabilizing an inductance characteristic of the coil.
摘要翻译： 一种半导体装置，包括基板，固定在基板的一侧的半导体芯片，形成在基板的另一侧并与半导体芯片电连接的螺旋形线圈，以及形成在该基板的表面上的导电图案 面向半导体芯片的衬底的侧面，用于稳定线圈的电感特性。
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公开(公告)号：US07750434B2
公开(公告)日：2010-07-06
申请号：US11336091
申请日：2006-01-20
申请人： Toshikazu Imaoka , Tetsuro Sawai , Atsushi Saita , Takeshi Yamaguchi , Makoto Tsubonoya , Kazunari Kurokawa
发明人： Toshikazu Imaoka , Tetsuro Sawai , Atsushi Saita , Takeshi Yamaguchi , Makoto Tsubonoya , Kazunari Kurokawa
IPC分类号： H01L27/08
CPC分类号： H01L23/49838 , H01F17/0006 , H01L23/49822 , H01L23/645 , H01L25/0657 , H01L2224/32145 , H01L2225/06568 , H01L2924/1305 , H01L2924/13091 , H01L2924/3011 , H05K1/0218 , H05K1/165 , H05K3/4685 , H05K2201/0715 , H01L2924/00
摘要： A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: a bridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.
摘要翻译： 电路基板结构中的第一布线层设置有第一电感器和第二电感器。 电介质层设置有分别电连接到第一电感器和第二电感器的第一通孔和第二通孔。 第二布线层设置有：电连接第一通孔和第二通孔的桥; 以及设置在桥周围的导电图案，导电图案的外边缘位于第一布线图案的外边缘的外侧，第二布线图案位于第一布线层的外侧。 该桥作为共面线，抑制电磁场的产生。
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公开(公告)号：US20060170071A1
公开(公告)日：2006-08-03
申请号：US11336091
申请日：2006-01-20
申请人： Toshikazu Imaoka , Tetsuro Sawai , Atsushi Saita , Takeshi Yamaguchi , Makoto Tsubonoya , Kazunari Kurokawa
发明人： Toshikazu Imaoka , Tetsuro Sawai , Atsushi Saita , Takeshi Yamaguchi , Makoto Tsubonoya , Kazunari Kurokawa
IPC分类号： H01L29/00
CPC分类号： H01L23/49838 , H01F17/0006 , H01L23/49822 , H01L23/645 , H01L25/0657 , H01L2224/32145 , H01L2225/06568 , H01L2924/1305 , H01L2924/13091 , H01L2924/3011 , H05K1/0218 , H05K1/165 , H05K3/4685 , H05K2201/0715 , H01L2924/00
摘要： A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: abridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.
摘要翻译： 电路基板结构中的第一布线层设置有第一电感器和第二电感器。 电介质层设置有分别电连接到第一电感器和第二电感器的第一通孔和第二通孔。 第二布线层设置有：电连接第一通孔和第二通孔的电路; 以及设置在桥周围的导电图案，导电图案的外边缘位于第一布线图案的外边缘的外侧，第二布线图案位于第一布线层的外侧。 桥作为共面线，抑制电磁场的产生。
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公开(公告)号：US08110929B2
公开(公告)日：2012-02-07
申请号：US12602462
申请日：2008-05-27
IPC分类号： H01L23/48
CPC分类号： H05K1/141 , H01L24/73 , H01L25/0657 , H01L2223/6638 , H01L2224/16225 , H01L2224/32225 , H01L2224/48091 , H01L2224/48227 , H01L2224/49175 , H01L2224/73265 , H01L2225/06517 , H01L2225/06527 , H01L2225/06572 , H01L2924/00011 , H01L2924/00014 , H01L2924/15174 , H01L2924/15182 , H01L2924/15184 , H01L2924/15311 , H01L2924/3011 , H01L2924/3511 , H05K1/181 , H05K1/182 , H05K3/3436 , H05K2201/09136 , H05K2201/09418 , H05K2201/10545 , H01L2924/00012 , H01L2924/00 , H01L2224/0401
摘要： A semiconductor module includes: a substrate having a wiring layer; a first rectangular-shaped semiconductor device mounted on one surface of the substrate; a second rectangular-shaped semiconductor device mounted on the other surface of the substrate. The first semiconductor device is arranged such that each side thereof is not parallel to that of the second semiconductor device, and that the first semiconductor device is superimposed on the second semiconductor device, when seen from the direction perpendicular to the surface of the substrate.
摘要翻译： 半导体模块包括：具有布线层的基板; 安装在所述基板的一个表面上的第一矩形半导体器件; 安装在所述基板的另一表面上的第二矩形半导体器件。 第一半导体器件布置成使得其每侧不与第二半导体器件的平行平行，并且当从垂直于衬底的表面的方向看时，第一半导体器件重叠在第二半导体器件上。
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公开(公告)号：US08110895B2
公开(公告)日：2012-02-07
申请号：US12789341
申请日：2010-05-27
IPC分类号： H01L27/08
CPC分类号： H01L23/49838 , H01F17/0006 , H01L23/49822 , H01L23/645 , H01L25/0657 , H01L2224/32145 , H01L2225/06568 , H01L2924/1305 , H01L2924/13091 , H01L2924/3011 , H05K1/0218 , H05K1/165 , H05K3/4685 , H05K2201/0715 , H01L2924/00
摘要： A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: a bridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.
摘要翻译： 电路基板结构中的第一布线层设置有第一电感器和第二电感器。 电介质层设置有分别电连接到第一电感器和第二电感器的第一通孔和第二通孔。 第二布线层设置有：电连接第一通孔和第二通孔的桥; 以及设置在桥周围的导电图案，导电图案的外边缘位于第一布线图案的外边缘的外侧，第二布线图案位于第一布线层的外侧。 桥作为共面线，抑制电磁场的产生。
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公开(公告)号：US07453153B2
公开(公告)日：2008-11-18
申请号：US11391680
申请日：2006-03-29
申请人： Atsushi Saita , Toshikazu Imaoka , Tetsuro Sawai , Yasunori Inoue
发明人： Atsushi Saita , Toshikazu Imaoka , Tetsuro Sawai , Yasunori Inoue
IPC分类号： H01L23/552 , H01L23/34
CPC分类号： H01L23/50 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L25/0657 , H01L2224/05554 , H01L2224/16225 , H01L2224/32145 , H01L2224/45015 , H01L2224/45144 , H01L2224/48091 , H01L2224/48145 , H01L2224/48237 , H01L2224/49109 , H01L2224/49175 , H01L2224/4943 , H01L2224/73253 , H01L2224/73257 , H01L2224/73265 , H01L2224/92247 , H01L2225/06506 , H01L2225/0651 , H01L2225/06527 , H01L2225/06572 , H01L2225/06582 , H01L2924/00011 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/10162 , H01L2924/14 , H01L2924/15311 , H01L2924/181 , H01L2924/19041 , H01L2924/19104 , H01L2924/19107 , H01L2924/20752 , H01L2924/30105 , H01L2924/30107 , H01L2924/00 , H01L2924/00012 , H01L2224/0401
摘要： The ground noise is reduced which propagates between circuit elements in a circuit device having a multiple stack structure. A grounding bonding pad provided on the surface of a second circuit element is connected to a bonding wire provided on the surface of a conduction layer via a grounding wire such as gold. A bonding pad provided on the surface of the conductive layer is connected to a lead provided on a ground wire via a grounding wire such as gold. This structure creates a capacitance between the second circuit element and the conduction layer so as to prevent the propagation of noise circuit from element to the ground wiring.
摘要翻译： 降低了在具有多堆叠结构的电路装置中的电路元件之间传播的接地噪声。 设置在第二电路元件的表面上的接地焊盘通过诸如金的接地线连接到设置在导电层的表面上的接合线。 设置在导电层的表面上的接合焊盘通过诸如金的接地线连接到设置在接地线上的引线。 该结构在第二电路元件和导电层之间产生电容，以防止噪声电路从元件传播到接地布线。
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公开(公告)号：US20060216484A1
公开(公告)日：2006-09-28
申请号：US11388705
申请日：2006-03-24
申请人： Atsushi Saita , Toshikazu Imaoka , Tetsuro Sawai
发明人： Atsushi Saita , Toshikazu Imaoka , Tetsuro Sawai
CPC分类号： H05K1/024 , B32B15/08 , H05K1/0242 , H05K1/0298 , H05K3/4688 , H05K2201/0191 , H05K2201/035 , H05K2201/0715 , H05K2201/098 , Y10T428/24917 , Y10T428/24926
摘要： A wiring board in which a line can be made narrower and/or a transmission loss can be reduced is developed. The wiring board includes a first conductor and a second conductor maintained at the same potential, a dielectric material layer provided between the first and second conductors, and a third conductor embedded in the dielectric material layer. In the wiring board, a thickness of the dielectric material layer in a first region located between the third conductor and the first conductor is larger than a thickness of the dielectric material layer in a second region located between the third conductor and the second conductor. Moreover, a cross-sectional shape of the third conductor is trapezoidal in which angles of respective ends of the third conductor on a side closer to the second conductor are obtuse.
摘要翻译： 开发了可以使线路变窄和/或可以减小传输损耗的布线板。 布线板包括保持在相同电位的第一导体和第二导体，设置在第一和第二导体之间的介电材料层和嵌入电介质材料层中的第三导体。 在布线板中，位于第三导体和第一导体之间的第一区域中的电介质材料层的厚度大于位于第三导体和第二导体之间的第二区域中的电介质材料层的厚度。 此外，第三导体的横截面形状是梯形的，其中第三导体在更靠近第二导体的一侧的各端的角度是钝的。
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9.发明授权
公开(公告)号：US5590412A
公开(公告)日：1996-12-31
申请号：US342220
申请日：1994-11-18
申请人： Tetsuro Sawai , Hisanori Uda , Toshikazu Hirai , Toshikazu Imaoka , Yasoo Harada , Keiichi Honda , Masao Nishida
发明人： Tetsuro Sawai , Hisanori Uda , Toshikazu Hirai , Toshikazu Imaoka , Yasoo Harada , Keiichi Honda , Masao Nishida
CPC分类号： H04B1/44 , H03F3/1935 , H03F3/72 , H04B1/48
摘要： A communication apparatus for use in a portable telephone is disclosed which has a transmit-receive common amplifier for amplifying a transmitted signal or received signal, and a mixer for frequency-mixing the transmitted signal or the received signal with a local oscillator output, wherein connection between the mixer and an input side of the amplifier and connection between the mixer and an output side of the amplifier are made by means of respective signal-path selector switches. During reception, a deep bias is applied to an FET of the transmit-receive common amplifier to reduce current consumption, and during transmission, a shallow bias is applied to the FET of the transmit-receive common amplifier for increased output.
摘要翻译： 公开了一种用于便携式电话的通信装置，其具有用于放大发射信号或接收信号的发射 - 接收公共放大器，以及用本地振荡器输出对发射信号或接收信号进行频率混频的混频器，其中连接 在混频器和放大器的输入侧之间，混频器和放大器的输出侧之间的连接通过相应的信号路径选择器开关进行。 在接收期间，向发射接收公共放大器的FET施加深偏压以减少电流消耗，并且在传输期间，将浅偏压施加到发射 - 接收公共放大器的FET以增加输出。
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公开(公告)号：US20100315790A1
公开(公告)日：2010-12-16
申请号：US12789341
申请日：2010-05-27
CPC分类号： H01L23/49838 , H01F17/0006 , H01L23/49822 , H01L23/645 , H01L25/0657 , H01L2224/32145 , H01L2225/06568 , H01L2924/1305 , H01L2924/13091 , H01L2924/3011 , H05K1/0218 , H05K1/165 , H05K3/4685 , H05K2201/0715 , H01L2924/00
摘要： A first wiring layer in a circuit substrate structure is provided with a first inductor and a second inductor. A dielectric layer is provided with a first via and a second via electrically connected to the first inductor and the second inductor, respectively. A second wiring layer is provided with: a bridge electrically connecting the first via and the second via; and a conductive pattern provided around the bridge, the outer edge of the conductive pattern being located outside the outer edge of the first wiring pattern and the second wiring pattern in the first wiring layer. The bridge functions as a coplanar line and suppresses generation of electromagnetic field.
摘要翻译： 电路基板结构中的第一布线层设置有第一电感器和第二电感器。 电介质层设置有分别电连接到第一电感器和第二电感器的第一通孔和第二通孔。 第二布线层设置有：电连接第一通孔和第二通孔的桥; 以及设置在桥周围的导电图案，导电图案的外边缘位于第一布线图案的外边缘的外侧，第二布线图案位于第一布线层的外侧。 桥作为共面线，抑制电磁场的产生。
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