Memory interface
    2.
    发明授权
    Memory interface 有权
    内存界面

    公开(公告)号:US09411757B2

    公开(公告)日:2016-08-09

    申请号:US14005196

    申请日:2011-03-14

    摘要: The present disclosure provides a method for processing memory access operations. The method includes determining a fixed response time based at least in part, on a total memory latency of a memory module. The method also includes identifying an available time slot for receiving return data from the memory module over a data bus, wherein the time difference between a current clock cycle and the available time slot is greater than or equal to the fixed response time. The method also includes creating a first slot reservation by reserving the available time slot. The method also includes issuing as read request to the memory module over the data bus, wherein the read request is issued at a clock cycle determined by subtracting the fixed response time from a time of the first slot reservation.

    摘要翻译: 本公开提供了一种用于处理存储器存取操作的方法。 该方法包括至少部分地基于存储器模块的总存储器延迟来确定固定响应时间。 该方法还包括通过数据总线识别从存储器模块接收返回数据的可用时隙,其中当前时钟周期与可用时隙之间的时间差大于或等于固定响应时间。 该方法还包括通过预留可用时隙来创建第一时隙预留。 该方法还包括通过数据总线向存储器模块发出读取请求,其中读取请求以从第一时隙预留时间减去固定响应时间确定的时钟周期发出。

    MEMORY INTERFACE
    3.
    发明申请
    MEMORY INTERFACE 有权
    记忆界面

    公开(公告)号:US20140040518A1

    公开(公告)日:2014-02-06

    申请号:US14005196

    申请日:2011-03-14

    IPC分类号: G06F13/362

    摘要: The present disclosure provides a method for processing memory access operations. The method includes determining a fixed response time based at least in part, on a total memory latency of a memory module. The method also includes identifying an available time slot for receiving return data from the memory module over a data bus, wherein the time difference between a current clock cycle and the available time slot is greater than or equal to the fixed response time. The method also includes creating a first slot reservation by reserving the available time slot. The method also includes issuing as read request to the memory module over the data bus, wherein the read request is issued at a clock cycle determined by subtracting the fixed response time from a time of the first slot reservation.

    摘要翻译: 本公开提供了一种用于处理存储器存取操作的方法。 该方法包括至少部分地基于存储器模块的总存储器延迟来确定固定响应时间。 该方法还包括通过数据总线识别从存储器模块接收返回数据的可用时隙,其中当前时钟周期与可用时隙之间的时间差大于或等于固定响应时间。 该方法还包括通过预留可用时隙来创建第一时隙预留。 该方法还包括通过数据总线向存储器模块发出读取请求,其中读取请求以从第一时隙预留时间减去固定响应时间确定的时钟周期发出。

    PREDICTOR-BASED MANAGEMENT OF DRAM ROW-BUFFERS
    8.
    发明申请
    PREDICTOR-BASED MANAGEMENT OF DRAM ROW-BUFFERS 审中-公开
    基于预测的DRAM缓存器管理

    公开(公告)号:US20120059983A1

    公开(公告)日:2012-03-08

    申请号:US12875314

    申请日:2010-09-03

    IPC分类号: G06F12/00

    CPC分类号: G06F12/0215 G06F2212/6024

    摘要: A method for managing memory includes storing a history of accesses to a memory page, and determining whether to keep the memory page open or to close the memory page based on the stored history. A memory system includes a plurality of memory cells arranged in rows and columns, a row buffer, and a memory controller configured to manage the row buffer at a per-page level using a history-based predictor. A non-transitory computer readable medium is also provided containing instructions therein, wherein the instructions include storing an access history of a memory page in a lookup table, and determining an optimal closing policy for the memory page based on the stored histories. The histories can include access numbers or access durations.

    摘要翻译: 一种用于管理存储器的方法,包括存储对存储器页面的存取历史,以及基于所存储的历史来确定是否保持存储器页面打开或关闭存储器页面。 存储器系统包括以行和列布置的多个存储器单元,行缓冲器和配置为使用基于历史的预测器以每页级别管理行缓冲器的存储器控​​制器。 还提供了包含其中的指令的非暂时性计算机可读介质,其中所述指令包括存储查找表中的存储器页面的访问历史,以及基于所存储的历史来确定存储器页面的最佳关闭策略。 历史可以包括访问号码或访问持续时间。